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Steve Sakoman1ad21582010-06-08 13:07:46 -07001/*
2 *
Sricharan9310ff72011-11-15 09:49:55 -05003 * Common functions for OMAP4/5 based boards
Steve Sakoman1ad21582010-06-08 13:07:46 -07004 *
5 * (C) Copyright 2010
6 * Texas Instruments, <www.ti.com>
7 *
8 * Author :
9 * Aneesh V <aneesh@ti.com>
10 * Steve Sakoman <steve@sakoman.com>
11 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020012 * SPDX-License-Identifier: GPL-2.0+
Steve Sakoman1ad21582010-06-08 13:07:46 -070013 */
14#include <common.h>
Lokesh Vutlaac8bd3c2017-05-05 13:45:27 +053015#include <debug_uart.h>
Tom Rini28591df2012-08-13 12:03:19 -070016#include <spl.h>
Steve Sakoman1ad21582010-06-08 13:07:46 -070017#include <asm/arch/sys_proto.h>
Alexey Brodkin267d8e22014-02-26 17:47:58 +040018#include <linux/sizes.h>
Sricharan62a86502011-11-15 09:50:00 -050019#include <asm/emif.h>
SRICHARAN Rfb6aa1f2013-02-04 04:22:00 +000020#include <asm/omap_common.h>
Lokesh Vutla28049632013-02-12 01:33:45 +000021#include <linux/compiler.h>
R Sricharan06396c12013-03-04 20:04:45 +000022#include <asm/system.h>
23
Nishanth Menon4e5dd662010-11-19 11:19:40 -050024DECLARE_GLOBAL_DATA_PTR;
25
Aneesh Vf908b632011-07-21 09:10:01 -040026void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
27{
28 int i;
29 struct pad_conf_entry *pad = (struct pad_conf_entry *) array;
30
31 for (i = 0; i < size; i++, pad++)
32 writew(pad->val, base + pad->offset);
33}
34
Aneesh Vf908b632011-07-21 09:10:01 -040035static void set_mux_conf_regs(void)
36{
Sricharan9310ff72011-11-15 09:49:55 -050037 switch (omap_hw_init_context()) {
Aneesh Vf908b632011-07-21 09:10:01 -040038 case OMAP_INIT_CONTEXT_SPL:
Paul Kocialkowskia00b1e52016-02-27 19:18:56 +010039 set_muxconf_regs();
Aneesh Vf908b632011-07-21 09:10:01 -040040 break;
41 case OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL:
Aneesh Vf908b632011-07-21 09:10:01 -040042 break;
43 case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
44 case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
Paul Kocialkowskia00b1e52016-02-27 19:18:56 +010045 set_muxconf_regs();
Aneesh Vf908b632011-07-21 09:10:01 -040046 break;
47 }
48}
49
Sricharan9310ff72011-11-15 09:49:55 -050050u32 cortex_rev(void)
Aneesh V162ced32011-07-21 09:10:04 -040051{
52
53 unsigned int rev;
54
55 /* Read Main ID Register (MIDR) */
56 asm ("mrc p15, 0, %0, c0, c0, 0" : "=r" (rev));
57
58 return rev;
59}
60
Tom Rini01b2dd92013-05-31 10:44:23 -040061static void omap_rev_string(void)
Aneesh V162ced32011-07-21 09:10:04 -040062{
Sricharan9310ff72011-11-15 09:49:55 -050063 u32 omap_rev = omap_revision();
Lokesh Vutla43c296f2013-02-12 21:29:03 +000064 u32 soc_variant = (omap_rev & 0xF0000000) >> 28;
Sricharan9310ff72011-11-15 09:49:55 -050065 u32 omap_variant = (omap_rev & 0xFFFF0000) >> 16;
66 u32 major_rev = (omap_rev & 0x00000F00) >> 8;
67 u32 minor_rev = (omap_rev & 0x000000F0) >> 4;
Aneesh V162ced32011-07-21 09:10:04 -040068
Lokesh Vutla69483e62017-12-29 11:47:51 +053069 const char *sec_s, *package = NULL;
Daniel Allredfd684b22016-05-19 19:10:52 -050070
71 switch (get_device_type()) {
72 case TST_DEVICE:
73 sec_s = "TST";
74 break;
75 case EMU_DEVICE:
76 sec_s = "EMU";
77 break;
78 case HS_DEVICE:
79 sec_s = "HS";
80 break;
81 case GP_DEVICE:
82 sec_s = "GP";
83 break;
84 default:
85 sec_s = "?";
86 }
87
Lokesh Vutla69483e62017-12-29 11:47:51 +053088#if defined(CONFIG_DRA7XX)
89 if (is_dra76x()) {
90 switch (omap_rev & 0xF) {
91 case DRA762_ABZ_PACKAGE:
92 package = "ABZ";
93 break;
94 case DRA762_ACD_PACKAGE:
95 default:
96 package = "ACD";
97 break;
98 }
99 }
100#endif
101
Lokesh Vutla43c296f2013-02-12 21:29:03 +0000102 if (soc_variant)
103 printf("OMAP");
104 else
105 printf("DRA");
Lokesh Vutla69483e62017-12-29 11:47:51 +0530106 printf("%x-%s ES%x.%x", omap_variant, sec_s, major_rev, minor_rev);
107 if (package)
108 printf(" %s package\n", package);
109 else
110 puts("\n");
Aneesh V162ced32011-07-21 09:10:04 -0400111}
112
Sricharan308fe922011-11-15 09:50:03 -0500113#ifdef CONFIG_SPL_BUILD
Tom Rinife3b0c72012-08-13 11:37:56 -0700114void spl_display_print(void)
115{
116 omap_rev_string();
117}
Sricharan308fe922011-11-15 09:50:03 -0500118#endif
119
Lokesh Vutla28049632013-02-12 01:33:45 +0000120void __weak srcomp_enable(void)
121{
SRICHARAN R4af19882013-04-24 00:41:23 +0000122}
123
Kipisz, Steven4466dfb2016-02-24 12:30:57 -0600124/**
125 * do_board_detect() - Detect board description
126 *
127 * Function to detect board description. This is expected to be
128 * overridden in the SoC family board file where desired.
129 */
130void __weak do_board_detect(void)
131{
132}
133
Keerthy35740ec2016-05-24 11:45:05 +0530134/**
135 * vcores_init() - Assign omap_vcores based on board
136 *
137 * Function to pick the vcores based on board. This is expected to be
138 * overridden in the SoC family board file where desired.
139 */
140void __weak vcores_init(void)
141{
142}
143
Lokesh Vutlae8534d22016-03-07 14:49:54 +0530144void s_init(void)
145{
146}
147
148/**
Lokesh Vutla69483e62017-12-29 11:47:51 +0530149 * init_package_revision() - Initialize package revision
150 *
151 * Function to get the pacakage information. This is expected to be
152 * overridden in the SoC family file where desired.
153 */
154void __weak init_package_revision(void)
155{
156}
157
158/**
Lokesh Vutlae8534d22016-03-07 14:49:54 +0530159 * early_system_init - Does Early system initialization.
160 *
161 * Does early system init of watchdog, muxing, andclocks
Aneesh Vf908b632011-07-21 09:10:01 -0400162 * Watchdog disable is done always. For the rest what gets done
Lokesh Vutlae8534d22016-03-07 14:49:54 +0530163 * depends on the boot mode in which this function is executed when
164 * 1. SPL running from SRAM
165 * 2. U-Boot running from FLASH
166 * 3. U-Boot loaded to SDRAM by SPL
167 * 4. U-Boot loaded to SDRAM by ROM code using the
Aneesh Vf908b632011-07-21 09:10:01 -0400168 * Configuration Header feature
169 * Please have a look at the respective functions to see what gets
170 * done in each of these cases
171 * This function is called with SRAM stack.
Steve Sakoman1ad21582010-06-08 13:07:46 -0700172 */
Lokesh Vutlae8534d22016-03-07 14:49:54 +0530173void early_system_init(void)
Steve Sakoman1ad21582010-06-08 13:07:46 -0700174{
Sricharan9310ff72011-11-15 09:49:55 -0500175 init_omap_revision();
SRICHARAN Rfb6aa1f2013-02-04 04:22:00 +0000176 hw_data_init();
Lokesh Vutla69483e62017-12-29 11:47:51 +0530177 init_package_revision();
SRICHARAN Rfb6aa1f2013-02-04 04:22:00 +0000178
Lokesh Vutlaba873772012-05-29 19:26:43 +0000179#ifdef CONFIG_SPL_BUILD
Lokesh Vutlae38b45a2016-07-12 14:47:41 +0530180 if (warm_reset())
Lokesh Vutlaba873772012-05-29 19:26:43 +0000181 force_emif_self_refresh();
182#endif
Steve Sakoman1ad21582010-06-08 13:07:46 -0700183 watchdog_init();
Aneesh Vf908b632011-07-21 09:10:01 -0400184 set_mux_conf_regs();
Aneesh Vb8e60b92011-07-21 09:10:21 -0400185#ifdef CONFIG_SPL_BUILD
Lokesh Vutla28049632013-02-12 01:33:45 +0000186 srcomp_enable();
Aneesh Vb35f7cb2011-09-08 11:05:56 -0400187 do_io_settings();
Aneesh Vb8e60b92011-07-21 09:10:21 -0400188#endif
Kipisz, Stevenebe86dc2016-02-24 12:30:52 -0600189 setup_early_clocks();
Lokesh Vutlaca23da12017-06-27 13:50:56 +0530190#ifdef CONFIG_SPL_BUILD
191 /*
192 * Save the boot parameters passed from romcode.
193 * We cannot delay the saving further than this,
194 * to prevent overwrites.
195 */
196 save_omap_boot_params();
197#endif
Kipisz, Steven4466dfb2016-02-24 12:30:57 -0600198 do_board_detect();
Jean-Jacques Hiblota68ca9e2017-09-15 12:57:33 +0200199#ifdef CONFIG_SPL_BUILD
200 spl_early_init();
201#endif
Keerthy35740ec2016-05-24 11:45:05 +0530202 vcores_init();
Lokesh Vutlaac8bd3c2017-05-05 13:45:27 +0530203#ifdef CONFIG_DEBUG_UART_OMAP
204 debug_uart_init();
205#endif
Aneesh V0d2628b2011-07-21 09:10:07 -0400206 prcm_init();
Simon Glass0c078ea2015-03-03 08:03:02 -0700207}
208
Aneesh Vb8e60b92011-07-21 09:10:21 -0400209#ifdef CONFIG_SPL_BUILD
Simon Glass0c078ea2015-03-03 08:03:02 -0700210void board_init_f(ulong dummy)
211{
Lokesh Vutlae8534d22016-03-07 14:49:54 +0530212 early_system_init();
Lokesh Vutlabe86f0e2014-08-04 19:42:24 +0530213#ifdef CONFIG_BOARD_EARLY_INIT_F
214 board_early_init_f();
215#endif
Aneesh Vb8e60b92011-07-21 09:10:21 -0400216 /* For regular u-boot sdram_init() is called from dram_init() */
217 sdram_init();
Lokesh Vutlabed46ef2017-04-18 17:27:24 +0530218 gd->ram_size = omap_sdram_size();
Steve Sakoman1ad21582010-06-08 13:07:46 -0700219}
Simon Glass0c078ea2015-03-03 08:03:02 -0700220#endif
Steve Sakoman1ad21582010-06-08 13:07:46 -0700221
Lokesh Vutlae8534d22016-03-07 14:49:54 +0530222int arch_cpu_init_dm(void)
223{
224 early_system_init();
225 return 0;
226}
227
Steve Sakoman1ad21582010-06-08 13:07:46 -0700228/*
229 * Routine: wait_for_command_complete
230 * Description: Wait for posting to finish on watchdog
231 */
232void wait_for_command_complete(struct watchdog *wd_base)
233{
234 int pending = 1;
235 do {
236 pending = readl(&wd_base->wwps);
237 } while (pending);
238}
239
240/*
241 * Routine: watchdog_init
242 * Description: Shut down watch dogs
243 */
244void watchdog_init(void)
245{
246 struct watchdog *wd2_base = (struct watchdog *)WDT2_BASE;
247
248 writel(WD_UNLOCK1, &wd2_base->wspr);
249 wait_for_command_complete(wd2_base);
250 writel(WD_UNLOCK2, &wd2_base->wspr);
251}
252
Aneesh V04bd2b92010-09-12 10:32:55 +0530253
254/*
255 * This function finds the SDRAM size available in the system
256 * based on DMM section configurations
257 * This is needed because the size of memory installed may be
258 * different on different versions of the board
259 */
Sricharan9310ff72011-11-15 09:49:55 -0500260u32 omap_sdram_size(void)
Aneesh V04bd2b92010-09-12 10:32:55 +0530261{
SRICHARAN R015be792012-05-17 00:12:06 +0000262 u32 section, i, valid;
263 u64 sdram_start = 0, sdram_end = 0, addr,
Lokesh Vutlae45d3bb2014-05-12 13:49:33 +0530264 size, total_size = 0, trap_size = 0, trap_start = 0;
Sricharan62a86502011-11-15 09:50:00 -0500265
Aneesh V04bd2b92010-09-12 10:32:55 +0530266 for (i = 0; i < 4; i++) {
Sricharan62a86502011-11-15 09:50:00 -0500267 section = __raw_readl(DMM_BASE + i*4);
SRICHARAN R015be792012-05-17 00:12:06 +0000268 valid = (section & EMIF_SDRC_ADDRSPC_MASK) >>
269 (EMIF_SDRC_ADDRSPC_SHIFT);
Sricharan62a86502011-11-15 09:50:00 -0500270 addr = section & EMIF_SYS_ADDR_MASK;
SRICHARAN R015be792012-05-17 00:12:06 +0000271
Aneesh V04bd2b92010-09-12 10:32:55 +0530272 /* See if the address is valid */
Tom Rini72f36002014-05-16 13:02:24 -0400273 if ((addr >= TI_ARMV7_DRAM_ADDR_SPACE_START) &&
274 (addr < TI_ARMV7_DRAM_ADDR_SPACE_END)) {
Sricharan62a86502011-11-15 09:50:00 -0500275 size = ((section & EMIF_SYS_SIZE_MASK) >>
276 EMIF_SYS_SIZE_SHIFT);
277 size = 1 << size;
278 size *= SZ_16M;
SRICHARAN R015be792012-05-17 00:12:06 +0000279
280 if (valid != DMM_SDRC_ADDR_SPC_INVALID) {
281 if (!sdram_start || (addr < sdram_start))
282 sdram_start = addr;
283 if (!sdram_end || ((addr + size) > sdram_end))
284 sdram_end = addr + size;
285 } else {
286 trap_size = size;
Lokesh Vutlae45d3bb2014-05-12 13:49:33 +0530287 trap_start = addr;
SRICHARAN R015be792012-05-17 00:12:06 +0000288 }
Aneesh V04bd2b92010-09-12 10:32:55 +0530289 }
290 }
Lokesh Vutlae45d3bb2014-05-12 13:49:33 +0530291
292 if ((trap_start >= sdram_start) && (trap_start < sdram_end))
293 total_size = (sdram_end - sdram_start) - (trap_size);
294 else
295 total_size = sdram_end - sdram_start;
Sricharan62a86502011-11-15 09:50:00 -0500296
Aneesh V04bd2b92010-09-12 10:32:55 +0530297 return total_size;
298}
299
300
Steve Sakoman1ad21582010-06-08 13:07:46 -0700301/*
302 * Routine: dram_init
303 * Description: sets uboots idea of sdram size
304 */
305int dram_init(void)
306{
Aneesh Vcc565582011-07-21 09:10:09 -0400307 sdram_init();
Sricharan9310ff72011-11-15 09:49:55 -0500308 gd->ram_size = omap_sdram_size();
Steve Sakoman1ad21582010-06-08 13:07:46 -0700309 return 0;
310}
311
312/*
313 * Print board information
314 */
315int checkboard(void)
316{
317 puts(sysinfo.board_string);
318 return 0;
319}
320
Masahiro Yamada81a689e2014-02-13 18:30:26 +0900321#if defined(CONFIG_DISPLAY_CPUINFO)
Sricharan9310ff72011-11-15 09:49:55 -0500322/*
323 * Print CPU information
324 */
325int print_cpuinfo(void)
Aneesh Ve3405bd2011-06-16 23:30:52 +0000326{
Andreas Müller0cda7a42012-01-04 15:26:24 +0000327 puts("CPU : ");
328 omap_rev_string();
Sricharan9310ff72011-11-15 09:49:55 -0500329
330 return 0;
331}
Masahiro Yamada81a689e2014-02-13 18:30:26 +0900332#endif