blob: 6258788f53ffbd45904b730d323c00a33da22234 [file] [log] [blame]
Tom Rinie33610c2021-12-14 13:36:35 -05001config ARCH_MAP_SYSMEM
Tom Rini53320122022-04-06 09:21:25 -04002 depends on SANDBOX
Tom Rinie33610c2021-12-14 13:36:35 -05003 def_bool y
4
Masahiro Yamada58654502015-07-15 20:59:29 +09005config CREATE_ARCH_SYMLINK
6 bool
7
Masahiro Yamada332b8292016-06-28 10:48:42 +09008config HAVE_ARCH_IOREMAP
9 bool
10
Heinrich Schuchardt8593a632024-11-03 18:54:00 +010011config HAVE_SETJMP
12 bool
13 help
14 The architecture supports setjmp() and longjmp().
15
Jiaxun Yang33e289a2024-07-17 16:07:02 +080016config SUPPORT_BIG_ENDIAN
17 bool
18
19config SUPPORT_LITTLE_ENDIAN
20 bool
21 default y if !SUPPORT_BIG_ENDIAN
22
Tom Rini3ef67ae2021-08-26 11:47:59 -040023config SYS_CACHE_SHIFT_4
24 bool
25
26config SYS_CACHE_SHIFT_5
27 bool
28
29config SYS_CACHE_SHIFT_6
30 bool
31
32config SYS_CACHE_SHIFT_7
33 bool
34
Dan Carpenter13ec9f82024-03-04 10:04:15 +030035config 32BIT
36 bool
37
38config 64BIT
39 bool
40
Tom Rini3ef67ae2021-08-26 11:47:59 -040041config SYS_CACHELINE_SIZE
42 int
43 default 128 if SYS_CACHE_SHIFT_7
44 default 64 if SYS_CACHE_SHIFT_6
45 default 32 if SYS_CACHE_SHIFT_5
46 default 16 if SYS_CACHE_SHIFT_4
47 # Fall-back for MIPS
48 default 32 if MIPS
49
Simon Glassb87153c2020-12-16 21:20:06 -070050config LINKER_LIST_ALIGN
51 int
52 default 32 if SANDBOX
53 default 8 if ARM64 || X86
54 default 4
55 help
56 Force the each linker list to be aligned to this boundary. This
57 is required if ll_entry_get() is used, since otherwise the linker
58 may add padding into the table, thus breaking it.
59 See linker_lists.rst for full details.
60
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090061choice
62 prompt "Architecture select"
63 default SANDBOX
64
65config ARC
66 bool "ARC architecture"
Michal Simek84f3dec2018-07-23 15:55:13 +020067 select ARC_TIMER
Vlad Zakharova465df72017-03-21 14:49:49 +030068 select CLK
Michal Simekd5d59bd2020-08-19 10:44:20 +020069 select DM
Michal Simek84f3dec2018-07-23 15:55:13 +020070 select HAVE_PRIVATE_LIBGCC
71 select SUPPORT_OF_CONTROL
Tom Rini3ef67ae2021-08-26 11:47:59 -040072 select SYS_CACHE_SHIFT_7
Vlad Zakharova465df72017-03-21 14:49:49 +030073 select TIMER
Jiaxun Yang33e289a2024-07-17 16:07:02 +080074 select SUPPORT_BIG_ENDIAN
75 select SUPPORT_LITTLE_ENDIAN
Tom Rini7b7e0ad2022-07-31 21:08:23 -040076 select SYS_BIG_ENDIAN if CPU_BIG_ENDIAN
77 select SYS_LITTLE_ENDIAN if !CPU_BIG_ENDIAN
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090078
79config ARM
80 bool "ARM architecture"
Heinrich Schuchardt8593a632024-11-03 18:54:00 +010081 select HAVE_SETJMP
Marek Behún4778a582021-05-20 13:24:22 +020082 select ARCH_SUPPORTS_LTO
Masahiro Yamada58654502015-07-15 20:59:29 +090083 select CREATE_ARCH_SYMLINK
Masahiro Yamada06280592015-07-03 16:13:09 +090084 select HAVE_PRIVATE_LIBGCC if !ARM64
Simon Glasse170f682021-12-01 09:02:38 -070085 select SUPPORT_ACPI
Jiaxun Yang33e289a2024-07-17 16:07:02 +080086 select SUPPORT_LITTLE_ENDIAN
Masahiro Yamada9fadbc82014-09-22 19:59:05 +090087 select SUPPORT_OF_CONTROL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090088
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090089config M68K
90 bool "M68000 architecture"
angelo@sysam.it5e798172015-12-06 17:47:59 +010091 select HAVE_PRIVATE_LIBGCC
Angelo Dureghello6000ebc2023-02-07 23:45:03 +010092 select USE_PRIVATE_LIBGCC
Derald D. Woodseb730bd2018-01-22 17:17:10 -060093 select SYS_BOOT_GET_CMDLINE
94 select SYS_BOOT_GET_KBD
Tom Rini3ef67ae2021-08-26 11:47:59 -040095 select SYS_CACHE_SHIFT_4
Jiaxun Yang33e289a2024-07-17 16:07:02 +080096 select SUPPORT_BIG_ENDIAN
Angelo Dureghelloe007b152019-03-13 21:46:51 +010097 select SUPPORT_OF_CONTROL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +090098
99config MICROBLAZE
100 bool "MicroBlaze architecture"
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800101 select SUPPORT_BIG_ENDIAN
102 select SUPPORT_LITTLE_ENDIAN
Masahiro Yamada9fadbc82014-09-22 19:59:05 +0900103 select SUPPORT_OF_CONTROL
Michal Simeke8e52772022-06-24 14:16:32 +0200104 imply CMD_TIMER
105 imply SPL_REGMAP if SPL
106 imply SPL_TIMER if SPL
107 imply TIMER
108 imply XILINX_TIMER
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900109
110config MIPS
111 bool "MIPS architecture"
Masahiro Yamada332b8292016-06-28 10:48:42 +0900112 select HAVE_ARCH_IOREMAP
Masahiro Yamada9520b712014-10-24 01:30:43 +0900113 select HAVE_PRIVATE_LIBGCC
Daniel Schwierzeckde5b6e22015-12-19 20:20:48 +0100114 select SUPPORT_OF_CONTROL
Sean Anderson13871e12022-04-12 10:59:04 -0400115 select SPL_SEPARATE_BSS if SPL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900116
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900117config NIOS2
118 bool "Nios II architecture"
Thomas Chouc6170262015-10-21 21:34:57 +0800119 select CPU
Michal Simek84f3dec2018-07-23 15:55:13 +0200120 select DM
Tom Rini7d3684a2023-01-16 15:46:49 -0500121 select DM_EVENT
Michal Simek84f3dec2018-07-23 15:55:13 +0200122 select OF_CONTROL
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800123 select SUPPORT_LITTLE_ENDIAN
Michal Simek84f3dec2018-07-23 15:55:13 +0200124 select SUPPORT_OF_CONTROL
Michal Simek2e7c8192018-07-23 15:55:14 +0200125 imply CMD_DM
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900126
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900127config PPC
128 bool "PowerPC architecture"
Masahiro Yamada9520b712014-10-24 01:30:43 +0900129 select HAVE_PRIVATE_LIBGCC
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800130 select SUPPORT_BIG_ENDIAN
Simon Glass90f83c82015-02-07 11:51:35 -0700131 select SUPPORT_OF_CONTROL
Derald D. Woodseb730bd2018-01-22 17:17:10 -0600132 select SYS_BOOT_GET_CMDLINE
133 select SYS_BOOT_GET_KBD
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900134
Rick Chen3301bfc2017-12-26 13:55:58 +0800135config RISCV
Bin Meng6b697752018-09-26 06:55:06 -0700136 bool "RISC-V architecture"
Anup Patel0af3e852019-02-25 08:14:04 +0000137 select CREATE_ARCH_SYMLINK
Heinrich Schuchardt8593a632024-11-03 18:54:00 +0100138 select HAVE_SETJMP
Heinrich Schuchardt934addc2023-12-19 16:04:06 +0100139 select SUPPORT_ACPI
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800140 select SUPPORT_LITTLE_ENDIAN
Rick Chen3301bfc2017-12-26 13:55:58 +0800141 select SUPPORT_OF_CONTROL
Bin Menga760eba2018-09-26 06:55:19 -0700142 select OF_CONTROL
143 select DM
Tom Rini7d3684a2023-01-16 15:46:49 -0500144 select DM_EVENT
Zong Li324463e2022-11-16 07:08:39 +0000145 imply SPL_SEPARATE_BSS if SPL
Bin Meng3880c382018-09-26 06:55:20 -0700146 imply DM_SERIAL
Bin Meng3880c382018-09-26 06:55:20 -0700147 imply DM_MMC
148 imply DM_SPI
149 imply DM_SPI_FLASH
150 imply BLK
151 imply CLK
152 imply MTD
153 imply TIMER
Bin Menga760eba2018-09-26 06:55:19 -0700154 imply CMD_DM
Lukas Auer396f0bd2019-08-21 21:14:45 +0200155 imply SPL_DM
156 imply SPL_OF_CONTROL
157 imply SPL_LIBCOMMON_SUPPORT
158 imply SPL_LIBGENERIC_SUPPORT
Simon Glassf4d60392021-08-08 12:20:12 -0600159 imply SPL_SERIAL
Lukas Auer396f0bd2019-08-21 21:14:45 +0200160 imply SPL_TIMER
Rick Chen3301bfc2017-12-26 13:55:58 +0800161
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900162config SANDBOX
163 bool "Sandbox"
Heinrich Schuchardt8593a632024-11-03 18:54:00 +0100164 select HAVE_SETJMP
Marek Behún72434932021-05-20 13:24:07 +0200165 select ARCH_SUPPORTS_LTO
Tom Rini22d567e2017-01-22 19:43:11 -0500166 select BOARD_LATE_INIT
Michael Walle8ffe86c2020-05-22 14:07:38 +0200167 select BZIP2
Simon Glassc13bbdc2023-10-26 14:31:34 -0400168 select CMD_POWEROFF if CMDLINE
Masahiro Yamada5ef5ccc2015-03-31 12:47:53 +0900169 select DM
Tom Rini7d3684a2023-01-16 15:46:49 -0500170 select DM_EVENT
Andrew Scull451b8b12022-05-30 10:00:12 +0000171 select DM_FUZZING_ENGINE
Michal Simek84f3dec2018-07-23 15:55:13 +0200172 select DM_GPIO
173 select DM_I2C
Masahiro Yamadab11b2352016-09-08 18:47:35 +0900174 select DM_KEYBOARD
Michal Simek84f3dec2018-07-23 15:55:13 +0200175 select DM_MMC
Masahiro Yamada5ef5ccc2015-03-31 12:47:53 +0900176 select DM_SERIAL
Masahiro Yamada5ef5ccc2015-03-31 12:47:53 +0900177 select DM_SPI
Michal Simek84f3dec2018-07-23 15:55:13 +0200178 select DM_SPI_FLASH
Michael Walle8ffe86c2020-05-22 14:07:38 +0200179 select GZIP_COMPRESSED
Tom Rini6a4a9082022-11-19 18:45:23 -0500180 select IO_TRACE
Tom Rinic20bb732017-07-22 18:36:16 -0400181 select LZO
Tom Riniddb1ec12024-01-10 13:46:10 -0500182 select MTD
Heinrich Schuchardta3fc9a42020-03-14 12:13:40 +0100183 select OF_BOARD_SETUP
Ramon Friedc64f19b2019-04-27 11:15:23 +0300184 select PCI_ENDPOINT
Michal Simek84f3dec2018-07-23 15:55:13 +0200185 select SPI
186 select SUPPORT_OF_CONTROL
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800187 select SUPPORT_BIG_ENDIAN
188 select SUPPORT_LITTLE_ENDIAN
Simon Glassc13bbdc2023-10-26 14:31:34 -0400189 select SYSRESET_CMD_POWEROFF if CMD_POWEROFF
Tom Rini3ef67ae2021-08-26 11:47:59 -0400190 select SYS_CACHE_SHIFT_4
Wasim Khan4dab60b2021-03-08 16:48:16 +0100191 select IRQ
Simon Glassc13bbdc2023-10-26 14:31:34 -0400192 select SUPPORT_EXTENSION_SCAN if CMDLINE
Simon Glassa6cee932021-12-01 09:02:36 -0700193 select SUPPORT_ACPI
Bin Meng0c0d9b02018-08-02 23:58:03 -0700194 imply BITREVERSE
Simon Glass78b0ef52018-11-15 18:43:53 -0700195 select BLOBLIST
Marek Behúnf8bd43f2021-05-20 13:24:08 +0200196 imply LTO
Michal Simek2e7c8192018-07-23 15:55:14 +0200197 imply CMD_DM
Heinrich Schuchardt0e298732020-11-12 00:29:59 +0100198 imply CMD_EXCEPTION
Simon Glassf4cb4742017-05-17 03:25:44 -0600199 imply CMD_GETTIME
Simon Glass027608e2017-05-17 03:25:25 -0600200 imply CMD_HASH
Simon Glass3bebbe62017-05-17 03:25:34 -0600201 imply CMD_IO
Simon Glass30daabc2017-05-17 03:25:36 -0600202 imply CMD_IOTRACE
Simon Glassbecaa8f2017-05-17 03:25:43 -0600203 imply CMD_LZMADEC
Tom Rinie5289a72019-05-29 17:01:28 -0400204 imply CMD_SF
Michal Simek84f3dec2018-07-23 15:55:13 +0200205 imply CMD_SF_TEST
Tom Rinid8532af2017-06-02 11:03:50 -0400206 imply CRC32_VERIFY
207 imply FAT_WRITE
Rajan Vajab3b2ddb2018-09-19 03:43:46 -0700208 imply FIRMWARE
Andrew Scull451b8b12022-05-30 10:00:12 +0000209 imply FUZZING_ENGINE_SANDBOX
Daniel Thompsona9e2c672017-05-19 17:26:58 +0100210 imply HASH_VERIFY
Tom Rinid8532af2017-06-02 11:03:50 -0400211 imply LZMA
Jens Wiklanderdca252d2018-09-25 16:40:17 +0200212 imply TEE
Jens Wiklanderf1edae92018-09-25 16:40:23 +0200213 imply AVB_VERIFY
214 imply LIBAVB
215 imply CMD_AVB
Heinrich Schuchardtce33bcd2022-01-16 13:04:06 +0100216 imply PARTITION_TYPE_GUID
Igor Opaniuk623369c2021-02-14 16:27:27 +0100217 imply SCP03
218 imply CMD_SCP03
Jens Wiklanderf1edae92018-09-25 16:40:23 +0200219 imply UDP_FUNCTION_FASTBOOT
Bin Meng1bb290d2018-10-15 02:21:26 -0700220 imply VIRTIO_MMIO
221 imply VIRTIO_PCI
222 imply VIRTIO_SANDBOX
Simon Glasse6832e62024-11-07 14:31:48 -0700223 # Re-enable this when fully implemented
224 # imply VIRTIO_BLK
Bin Meng1bb290d2018-10-15 02:21:26 -0700225 imply VIRTIO_NET
Simon Glass799b29b2018-12-10 10:37:31 -0700226 imply DM_SOUND
Ramon Friedc64f19b2019-04-27 11:15:23 +0300227 imply PCI_SANDBOX_EP
Simon Glass98d88f82019-02-16 20:24:49 -0700228 imply PCH
Alex Marginean0daa53a2019-06-03 19:12:28 +0300229 imply PHYLIB
230 imply DM_MDIO
Alex Marginean0649be52019-07-12 10:13:53 +0300231 imply DM_MDIO_MUX
Simon Glasse264be42023-05-04 16:54:57 -0600232 imply ACPI
Simon Glass8c501022019-12-06 21:41:54 -0700233 imply ACPI_PMC
234 imply ACPI_PMC_SANDBOX
235 imply CMD_PMC
John Chaufce6f982020-07-02 12:01:21 +0800236 imply CMD_CLONE
Simon Glass07a88862020-11-05 10:33:38 -0700237 imply SILENT_CONSOLE
Simon Glass529e2082020-11-05 10:33:48 -0700238 imply BOOTARGS_SUBST
Claudiu Manoild9eaa922021-03-14 20:14:57 +0800239 imply PHY_FIXED
240 imply DM_DSA
Kory Maincent965a34f2021-05-04 19:31:23 +0200241 imply CMD_EXTENSION
Simon Glass278efc682021-11-24 09:26:44 -0700242 imply KEYBOARD
Simon Glassef9e7622021-11-24 09:26:42 -0700243 imply PHYSMEM
Simon Glass29e64b52021-12-01 09:02:43 -0700244 imply GENERATE_ACPI_TABLE
Philippe Reynes462d1632022-03-28 22:56:53 +0200245 imply BINMAN
Alexander Gendin038cb022023-10-09 01:24:36 +0000246 imply CMD_MBR
247 imply CMD_MMC
Simon Glassb1dee9e2023-10-26 14:31:33 -0400248 imply BOOTSTD_DEFAULTS if BOOTSTD_FULL && CMDLINE
249 imply BOOTMETH_DISTRO if BOOTSTD_FULL && CMDLINE
250 imply CMD_SYSBOOT if BOOTSTD_FULL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900251
252config SH
253 bool "SuperH architecture"
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800254 select SUPPORT_LITTLE_ENDIAN
Masahiro Yamada9520b712014-10-24 01:30:43 +0900255 select HAVE_PRIVATE_LIBGCC
Marek Vasut8fc9fa12019-08-31 18:27:58 +0200256 select SUPPORT_OF_CONTROL
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900257
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900258config X86
259 bool "x86 architecture"
Heinrich Schuchardt8593a632024-11-03 18:54:00 +0100260 select HAVE_SETJMP
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600261 select SUPPORT_SPL
262 select SUPPORT_TPL
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800263 select SUPPORT_LITTLE_ENDIAN
Masahiro Yamada58654502015-07-15 20:59:29 +0900264 select CREATE_ARCH_SYMLINK
Masahiro Yamada5ef5ccc2015-03-31 12:47:53 +0900265 select DM
Bin Meng59c4aa42018-10-15 02:21:16 -0700266 select HAVE_ARCH_IOMAP
Michal Simek84f3dec2018-07-23 15:55:13 +0200267 select HAVE_PRIVATE_LIBGCC
268 select OF_CONTROL
Bin Meng0e0204d2017-07-30 06:23:16 -0700269 select PCI
Simon Glassa6cee932021-12-01 09:02:36 -0700270 select SUPPORT_ACPI
Michal Simek84f3dec2018-07-23 15:55:13 +0200271 select SUPPORT_OF_CONTROL
Tom Rini3ef67ae2021-08-26 11:47:59 -0400272 select SYS_CACHE_SHIFT_6
Bin Mengf0e1c3e2017-07-30 06:23:07 -0700273 select TIMER
Michal Simek84f3dec2018-07-23 15:55:13 +0200274 select USE_PRIVATE_LIBGCC
Bin Mengf0e1c3e2017-07-30 06:23:07 -0700275 select X86_TSC_TIMER
Wasim Khan4a7fef72021-03-08 16:48:15 +0100276 select IRQ
Simon Glassf69c0092020-07-19 13:55:52 -0600277 imply HAS_ROM if X86_RESET_VECTOR
Bin Meng73f5bc12017-07-30 19:24:02 -0700278 imply BLK
Michal Simek2e7c8192018-07-23 15:55:14 +0200279 imply CMD_DM
Michal Simek84f3dec2018-07-23 15:55:13 +0200280 imply CMD_FPGA_LOADMK
281 imply CMD_GETTIME
282 imply CMD_IO
283 imply CMD_IRQ
284 imply CMD_PCI
Tom Rinie5289a72019-05-29 17:01:28 -0400285 imply CMD_SF
Michal Simek84f3dec2018-07-23 15:55:13 +0200286 imply CMD_SF_TEST
Bin Meng0e0204d2017-07-30 06:23:16 -0700287 imply DM_GPIO
288 imply DM_KEYBOARD
Simon Glass828b7252017-07-30 19:24:01 -0700289 imply DM_MMC
Bin Meng0e0204d2017-07-30 06:23:16 -0700290 imply DM_RTC
Tom Rini15a2ab52023-10-27 20:59:51 -0400291 imply SCSI
Michal Simek84f3dec2018-07-23 15:55:13 +0200292 imply DM_SERIAL
Tom Riniddb1ec12024-01-10 13:46:10 -0500293 imply MTD
Bin Meng0e0204d2017-07-30 06:23:16 -0700294 imply DM_SPI
295 imply DM_SPI_FLASH
296 imply DM_USB
Simon Glass1cedca12023-08-21 21:17:01 -0600297 imply LAST_STAGE_INIT
Simon Glass52cb5042022-10-18 07:46:31 -0600298 imply VIDEO
Bin Mengaf5b8d22018-07-19 03:07:33 -0700299 imply SYSRESET
Kever Yang525ea472019-04-02 20:41:25 +0800300 imply SPL_SYSRESET
Bin Mengaf5b8d22018-07-19 03:07:33 -0700301 imply SYSRESET_X86
Chris Packhamb110e112017-08-28 20:50:46 +1200302 imply USB_ETHER_ASIX
303 imply USB_ETHER_SMSC95XX
Michal Simek84f3dec2018-07-23 15:55:13 +0200304 imply USB_HOST_ETHER
Simon Glass98d88f82019-02-16 20:24:49 -0700305 imply PCH
Simon Glassef9e7622021-11-24 09:26:42 -0700306 imply PHYSMEM
Simon Glass56382fb2019-05-02 10:52:24 -0600307 imply RTC_MC146818
Simon Glasse264be42023-05-04 16:54:57 -0600308 imply ACPI
Simon Glassb0282282021-12-01 09:02:39 -0700309 imply ACPIGEN if !QEMU && !EFI_APP
Simon Glassbee77f62020-11-05 06:32:17 -0700310 imply SYSINFO if GENERATE_SMBIOS_TABLE
311 imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE
Simon Glass65831d92021-12-18 11:27:50 -0700312 imply TIMESTAMP
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900313
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600314 # Thing to enable for when SPL/TPL are enabled: SPL
315 imply SPL_DM
316 imply SPL_OF_LIBFDT
Simon Glass284cb9c2021-07-10 21:14:31 -0600317 imply SPL_DRIVERS_MISC
Simon Glass035939e2021-07-10 21:14:30 -0600318 imply SPL_GPIO
Simon Glass7b1ecb82019-12-06 21:42:51 -0700319 imply SPL_PINCTRL
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600320 imply SPL_LIBCOMMON_SUPPORT
321 imply SPL_LIBGENERIC_SUPPORT
Simon Glassf4d60392021-08-08 12:20:12 -0600322 imply SPL_SERIAL
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600323 imply SPL_SPI_FLASH_SUPPORT
Simon Glassa5820472021-08-08 12:20:14 -0600324 imply SPL_SPI
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600325 imply SPL_OF_CONTROL
326 imply SPL_TIMER
327 imply SPL_REGMAP
328 imply SPL_SYSCON
329 # TPL
330 imply TPL_DM
Simon Glass284cb9c2021-07-10 21:14:31 -0600331 imply TPL_DRIVERS_MISC
Simon Glass035939e2021-07-10 21:14:30 -0600332 imply TPL_GPIO
Simon Glass7b1ecb82019-12-06 21:42:51 -0700333 imply TPL_PINCTRL
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600334 imply TPL_LIBCOMMON_SUPPORT
335 imply TPL_LIBGENERIC_SUPPORT
Simon Glassf4d60392021-08-08 12:20:12 -0600336 imply TPL_SERIAL
Simon Glassc9ae1ae2019-04-25 21:58:45 -0600337 imply TPL_OF_CONTROL
338 imply TPL_TIMER
339 imply TPL_REGMAP
340 imply TPL_SYSCON
341
Chris Zankel1387dab2016-08-10 18:36:44 +0300342config XTENSA
343 bool "Xtensa architecture"
344 select CREATE_ARCH_SYMLINK
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800345 select SUPPORT_LITTLE_ENDIAN
Chris Zankel1387dab2016-08-10 18:36:44 +0300346 select SUPPORT_OF_CONTROL
347
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900348endchoice
349
Masahiro Yamada52a5f972014-09-14 03:01:48 +0900350config SYS_ARCH
351 string
352 help
353 This option should contain the architecture name to build the
354 appropriate arch/<CONFIG_SYS_ARCH> directory.
355 All the architectures should specify this option correctly.
356
357config SYS_CPU
358 string
359 help
360 This option should contain the CPU name to build the correct
361 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory.
362
363 This is optional. For those targets without the CPU directory,
364 leave this option empty.
365
366config SYS_SOC
367 string
368 help
369 This option should contain the SoC name to build the directory
370 arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>.
371
372 This is optional. For those targets without the SoC directory,
373 leave this option empty.
374
375config SYS_VENDOR
376 string
377 help
378 This option should contain the vendor name of the target board.
379 If it is set and
380 board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common
381 directory is compiled.
382 If CONFIG_SYS_BOARD is also set, the sources under
383 board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled.
384
385 This is optional. For those targets without the vendor directory,
386 leave this option empty.
387
388config SYS_BOARD
389 string
390 help
391 This option should contain the name of the target board.
392 If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD>
393 or board/<CONFIG_SYS_BOARD> directory is compiled depending on
394 whether CONFIG_SYS_VENDOR is set or not.
395
396 This is optional. For those targets without the board directory,
397 leave this option empty.
398
399config SYS_CONFIG_NAME
Tom Rinibce01ee2024-01-22 17:39:20 -0500400 string "Board header file" if ARCH_MESON || ARCH_VERSAL || \
401 ARCH_VERSAL_NET || ARCH_ZYNQ || ARCH_ZYNQMP || \
402 ARCH_ZYNQMP_R5 || MICROBLAZE || NIOS2
403 default "meson64" if ARCH_MESON
404 default "microblaze-generic" if MICROBLAZE
405 default "xilinx_versal" if ARCH_VERSAL
406 default "xilinx_versal_net" if ARCH_VERSAL_NET
407 default "xilinx_zynqmp" if ARCH_ZYNQMP
408 default "xilinx_zynqmp_r5" if ARCH_ZYNQMP_R5
409 default "zynq-common" if ARCH_ZYNQ
Masahiro Yamada52a5f972014-09-14 03:01:48 +0900410 help
411 This option should contain the base name of board header file.
412 The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h
413 should be included from include/config.h.
414
Vignesh Raghavendra384c1412019-04-22 21:43:32 +0530415config SYS_DISABLE_DCACHE_OPS
416 bool
417 help
418 This option disables dcache flush and dcache invalidation
419 operations. For example, on coherent systems where cache
420 operatios are not required, enable this option to avoid them.
421 Note that, its up to the individual architectures to implement
422 this functionality.
423
Tom Rinie9269a02021-12-12 22:12:30 -0500424config SYS_IMMR
Tom Rini0c4dded2022-03-30 09:30:15 -0400425 hex "Address for the Internal Memory-Mapped Registers (IMMR) window"
Tom Rinie9269a02021-12-12 22:12:30 -0500426 depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A
427 default 0xFF000000 if MPC8xx
428 default 0xF0000000 if ARCH_MPC8313
429 default 0xE0000000 if MPC83xx && !ARCH_MPC8313
430 default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3
Pali Rohárc68991e2022-05-02 18:29:25 +0200431 default 0xFFE00000 if ARCH_P1010 || ARCH_P1011 || ARCH_P1020 || \
432 ARCH_P1021 || ARCH_P1024 || ARCH_P1025 || \
433 ARCH_P2020
Tom Rinie9269a02021-12-12 22:12:30 -0500434 default SYS_CCSRBAR_DEFAULT
435 help
436 Address for the Internal Memory-Mapped Registers (IMMR) window used
437 to configure the features of many Freescale / NXP SoCs.
438
Tom Rinib73cd902022-12-02 16:42:36 -0500439config MONITOR_IS_IN_RAM
440 bool "U-Boot is loaded in to RAM by a pre-loader"
441 depends on M68K || NIOS2
442
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100443menu "Skipping low level initialization functions"
Tom Rini53320122022-04-06 09:21:25 -0400444 depends on ARM || MIPS || RISCV
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100445
446config SKIP_LOWLEVEL_INIT
447 bool "Skip calls to certain low level initialization functions"
Tom Rinie1e85442021-08-27 21:18:30 -0400448 help
449 If enabled, then certain low level initializations (like setting up
450 the memory controller) are omitted and/or U-Boot does not relocate
451 itself into RAM.
452 Normally this variable MUST NOT be defined. The only exception is
453 when U-Boot is loaded (to RAM) by some other boot loader or by a
454 debugger which performs these initializations itself.
455
456config SPL_SKIP_LOWLEVEL_INIT
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100457 bool "Skip calls to certain low level initialization functions in SPL"
458 depends on SPL
Tom Rinie1e85442021-08-27 21:18:30 -0400459 help
460 If enabled, then certain low level initializations (like setting up
461 the memory controller) are omitted and/or U-Boot does not relocate
462 itself into RAM.
463 Normally this variable MUST NOT be defined. The only exception is
464 when U-Boot is loaded (to RAM) by some other boot loader or by a
465 debugger which performs these initializations itself.
466
467config TPL_SKIP_LOWLEVEL_INIT
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100468 bool "Skip calls to certain low level initialization functions in TPL"
Tom Rinie1e85442021-08-27 21:18:30 -0400469 depends on SPL && ARM
470 help
471 If enabled, then certain low level initializations (like setting up
472 the memory controller) are omitted and/or U-Boot does not relocate
473 itself into RAM.
474 Normally this variable MUST NOT be defined. The only exception is
475 when U-Boot is loaded (to RAM) by some other boot loader or by a
476 debugger which performs these initializations itself.
477
478config SKIP_LOWLEVEL_INIT_ONLY
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100479 bool "Skip call to lowlevel_init during early boot ONLY"
Tom Rinie1e85442021-08-27 21:18:30 -0400480 depends on ARM
481 help
482 This allows just the call to lowlevel_init() to be skipped. The
483 normal CP15 init (such as enabling the instruction cache) is still
484 performed.
485
486config SPL_SKIP_LOWLEVEL_INIT_ONLY
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100487 bool "Skip call to lowlevel_init during early SPL boot ONLY"
Tom Rinie1e85442021-08-27 21:18:30 -0400488 depends on SPL && ARM
489 help
490 This allows just the call to lowlevel_init() to be skipped. The
491 normal CP15 init (such as enabling the instruction cache) is still
492 performed.
493
494config TPL_SKIP_LOWLEVEL_INIT_ONLY
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100495 bool "Skip call to lowlevel_init during early TPL boot ONLY"
Tom Rinie1e85442021-08-27 21:18:30 -0400496 depends on TPL && ARM
497 help
498 This allows just the call to lowlevel_init() to be skipped. The
499 normal CP15 init (such as enabling the instruction cache) is still
500 performed.
501
Heinrich Schuchardte6e7cb62022-12-30 19:41:28 +0100502endmenu
503
Tom Rini295ab162022-10-28 20:27:10 -0400504config SYS_HAS_NONCACHED_MEMORY
505 bool "Enable reserving a non-cached memory area for drivers"
506 depends on (ARM || MIPS) && (RTL8169 || MEDIATEK_ETH)
507 help
508 This is useful for drivers that would otherwise require a lot of
509 explicit cache maintenance. For some drivers it's also impossible to
510 properly maintain the cache. For example if the regions that need to
511 be flushed are not a multiple of the cache-line size, *and* padding
512 cannot be allocated between the regions to align them (i.e. if the
513 HW requires a contiguous array of regions, and the size of each
514 region is not cache-aligned), then a flush of one region may result
515 in overwriting data that hardware has written to another region in
516 the same cache-line. This can happen for example in network drivers
517 where descriptors for buffers are typically smaller than the CPU
518 cache-line (e.g. 16 bytes vs. 32 or 64 bytes).
519
520config SYS_NONCACHED_MEMORY
521 hex "Size in bytes of the non-cached memory area"
522 depends on SYS_HAS_NONCACHED_MEMORY
523 default 0x100000
524 help
525 Size of non-cached memory area. This area of memory will be typically
526 located right below the malloc() area and mapped uncached in the MMU.
527
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900528source "arch/arc/Kconfig"
529source "arch/arm/Kconfig"
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900530source "arch/m68k/Kconfig"
531source "arch/microblaze/Kconfig"
532source "arch/mips/Kconfig"
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900533source "arch/nios2/Kconfig"
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900534source "arch/powerpc/Kconfig"
535source "arch/sandbox/Kconfig"
536source "arch/sh/Kconfig"
Masahiro Yamada804bc5e2014-07-30 14:08:15 +0900537source "arch/x86/Kconfig"
Chris Zankel1387dab2016-08-10 18:36:44 +0300538source "arch/xtensa/Kconfig"
Rick Chen3301bfc2017-12-26 13:55:58 +0800539source "arch/riscv/Kconfig"
Tom Rinia67ff802022-03-23 17:19:55 -0400540
Tom Rinic4aecf62022-06-16 14:04:36 -0400541if ARM || M68K || PPC
542
543source "arch/Kconfig.nxp"
544
545endif
546
Tom Rinia67ff802022-03-23 17:19:55 -0400547source "board/keymile/Kconfig"
Michal Simek9599f8f2022-06-24 14:14:59 +0200548
Michal Simek9599f8f2022-06-24 14:14:59 +0200549choice
550 prompt "Endianness selection"
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800551 default SYS_BIG_ENDIAN if MIPS || MICROBLAZE
552 default SYS_LITTLE_ENDIAN
Michal Simek9599f8f2022-06-24 14:14:59 +0200553 help
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800554 Some boards can be configured for either little or big endian
Michal Simek9599f8f2022-06-24 14:14:59 +0200555 byte order. These modes require different U-Boot images. In general there
556 is one preferred byteorder for a particular system but some systems are
557 just as commonly used in the one or the other endianness.
558
559config SYS_BIG_ENDIAN
560 bool "Big endian"
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800561 depends on SUPPORT_BIG_ENDIAN
Michal Simek9599f8f2022-06-24 14:14:59 +0200562
563config SYS_LITTLE_ENDIAN
564 bool "Little endian"
Jiaxun Yang33e289a2024-07-17 16:07:02 +0800565 depends on SUPPORT_LITTLE_ENDIAN
Michal Simek9599f8f2022-06-24 14:14:59 +0200566endchoice