Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Michal Simek | 14b4c70 | 2009-09-07 09:08:02 +0200 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2007-2009 Michal Simek |
| 4 | * (C) Copyright 2003 Xilinx Inc. |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 5 | * |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 6 | * Michal SIMEK <monstr@monstr.eu> |
Michal Simek | 14b4c70 | 2009-09-07 09:08:02 +0200 | [diff] [blame] | 7 | */ |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 8 | |
| 9 | #include <common.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 10 | #include <log.h> |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 11 | #include <net.h> |
| 12 | #include <config.h> |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 13 | #include <dm.h> |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 14 | #include <console.h> |
Michal Simek | b4a1d08 | 2010-10-11 11:41:47 +1000 | [diff] [blame] | 15 | #include <malloc.h> |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 16 | #include <asm/io.h> |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 17 | #include <phy.h> |
| 18 | #include <miiphy.h> |
Michal Simek | bb8b27b | 2012-06-28 21:37:57 +0000 | [diff] [blame] | 19 | #include <fdtdec.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 20 | #include <linux/delay.h> |
Masahiro Yamada | 64e4f7f | 2016-09-21 11:28:57 +0900 | [diff] [blame] | 21 | #include <linux/errno.h> |
Michal Simek | 36f7a41 | 2015-12-10 16:31:38 +0100 | [diff] [blame] | 22 | #include <linux/kernel.h> |
Zubair Lutfullah Kakakhel | d23bf84 | 2016-07-27 12:25:07 +0100 | [diff] [blame] | 23 | #include <asm/io.h> |
Michal Simek | bb8b27b | 2012-06-28 21:37:57 +0000 | [diff] [blame] | 24 | |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 25 | DECLARE_GLOBAL_DATA_PTR; |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 26 | |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 27 | #define ENET_ADDR_LENGTH 6 |
Michal Simek | 36f7a41 | 2015-12-10 16:31:38 +0100 | [diff] [blame] | 28 | #define ETH_FCS_LEN 4 /* Octets in the FCS */ |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 29 | |
| 30 | /* Xmit complete */ |
| 31 | #define XEL_TSR_XMIT_BUSY_MASK 0x00000001UL |
| 32 | /* Xmit interrupt enable bit */ |
| 33 | #define XEL_TSR_XMIT_IE_MASK 0x00000008UL |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 34 | /* Program the MAC address */ |
| 35 | #define XEL_TSR_PROGRAM_MASK 0x00000002UL |
| 36 | /* define for programming the MAC address into the EMAC Lite */ |
| 37 | #define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK) |
| 38 | |
| 39 | /* Transmit packet length upper byte */ |
| 40 | #define XEL_TPLR_LENGTH_MASK_HI 0x0000FF00UL |
| 41 | /* Transmit packet length lower byte */ |
| 42 | #define XEL_TPLR_LENGTH_MASK_LO 0x000000FFUL |
| 43 | |
| 44 | /* Recv complete */ |
| 45 | #define XEL_RSR_RECV_DONE_MASK 0x00000001UL |
| 46 | /* Recv interrupt enable bit */ |
| 47 | #define XEL_RSR_RECV_IE_MASK 0x00000008UL |
| 48 | |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 49 | /* MDIO Address Register Bit Masks */ |
| 50 | #define XEL_MDIOADDR_REGADR_MASK 0x0000001F /* Register Address */ |
| 51 | #define XEL_MDIOADDR_PHYADR_MASK 0x000003E0 /* PHY Address */ |
| 52 | #define XEL_MDIOADDR_PHYADR_SHIFT 5 |
| 53 | #define XEL_MDIOADDR_OP_MASK 0x00000400 /* RD/WR Operation */ |
| 54 | |
| 55 | /* MDIO Write Data Register Bit Masks */ |
| 56 | #define XEL_MDIOWR_WRDATA_MASK 0x0000FFFF /* Data to be Written */ |
| 57 | |
| 58 | /* MDIO Read Data Register Bit Masks */ |
| 59 | #define XEL_MDIORD_RDDATA_MASK 0x0000FFFF /* Data to be Read */ |
| 60 | |
| 61 | /* MDIO Control Register Bit Masks */ |
| 62 | #define XEL_MDIOCTRL_MDIOSTS_MASK 0x00000001 /* MDIO Status Mask */ |
| 63 | #define XEL_MDIOCTRL_MDIOEN_MASK 0x00000008 /* MDIO Enable */ |
| 64 | |
Michal Simek | 905f098 | 2015-12-10 14:18:15 +0100 | [diff] [blame] | 65 | struct emaclite_regs { |
| 66 | u32 tx_ping; /* 0x0 - TX Ping buffer */ |
| 67 | u32 reserved1[504]; |
| 68 | u32 mdioaddr; /* 0x7e4 - MDIO Address Register */ |
| 69 | u32 mdiowr; /* 0x7e8 - MDIO Write Data Register */ |
| 70 | u32 mdiord;/* 0x7ec - MDIO Read Data Register */ |
| 71 | u32 mdioctrl; /* 0x7f0 - MDIO Control Register */ |
| 72 | u32 tx_ping_tplr; /* 0x7f4 - Tx packet length */ |
| 73 | u32 global_interrupt; /* 0x7f8 - Global interrupt enable */ |
| 74 | u32 tx_ping_tsr; /* 0x7fc - Tx status */ |
| 75 | u32 tx_pong; /* 0x800 - TX Pong buffer */ |
| 76 | u32 reserved2[508]; |
| 77 | u32 tx_pong_tplr; /* 0xff4 - Tx packet length */ |
| 78 | u32 reserved3; /* 0xff8 */ |
| 79 | u32 tx_pong_tsr; /* 0xffc - Tx status */ |
| 80 | u32 rx_ping; /* 0x1000 - Receive Buffer */ |
| 81 | u32 reserved4[510]; |
| 82 | u32 rx_ping_rsr; /* 0x17fc - Rx status */ |
| 83 | u32 rx_pong; /* 0x1800 - Receive Buffer */ |
| 84 | u32 reserved5[510]; |
| 85 | u32 rx_pong_rsr; /* 0x1ffc - Rx status */ |
| 86 | }; |
| 87 | |
Michal Simek | f35b7cd | 2011-08-25 12:47:56 +0200 | [diff] [blame] | 88 | struct xemaclite { |
Michal Simek | 36f7a41 | 2015-12-10 16:31:38 +0100 | [diff] [blame] | 89 | bool use_rx_pong_buffer_next; /* Next RX buffer to read from */ |
Michal Simek | df40ead | 2011-09-12 21:10:01 +0000 | [diff] [blame] | 90 | u32 txpp; /* TX ping pong buffer */ |
| 91 | u32 rxpp; /* RX ping pong buffer */ |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 92 | int phyaddr; |
Michal Simek | 905f098 | 2015-12-10 14:18:15 +0100 | [diff] [blame] | 93 | struct emaclite_regs *regs; |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 94 | struct phy_device *phydev; |
| 95 | struct mii_dev *bus; |
Michal Simek | f35b7cd | 2011-08-25 12:47:56 +0200 | [diff] [blame] | 96 | }; |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 97 | |
Michal Simek | 641ade0 | 2015-12-16 10:52:39 +0100 | [diff] [blame] | 98 | static uchar etherrxbuff[PKTSIZE_ALIGN]; /* Receive buffer */ |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 99 | |
Michal Simek | 5d1cf6c | 2011-09-12 21:10:05 +0000 | [diff] [blame] | 100 | static void xemaclite_alignedread(u32 *srcptr, void *destptr, u32 bytecount) |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 101 | { |
Michal Simek | b4a1d08 | 2010-10-11 11:41:47 +1000 | [diff] [blame] | 102 | u32 i; |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 103 | u32 alignbuffer; |
| 104 | u32 *to32ptr; |
| 105 | u32 *from32ptr; |
| 106 | u8 *to8ptr; |
| 107 | u8 *from8ptr; |
| 108 | |
| 109 | from32ptr = (u32 *) srcptr; |
| 110 | |
| 111 | /* Word aligned buffer, no correction needed. */ |
| 112 | to32ptr = (u32 *) destptr; |
| 113 | while (bytecount > 3) { |
| 114 | *to32ptr++ = *from32ptr++; |
| 115 | bytecount -= 4; |
| 116 | } |
| 117 | to8ptr = (u8 *) to32ptr; |
| 118 | |
| 119 | alignbuffer = *from32ptr++; |
Michal Simek | 5d1cf6c | 2011-09-12 21:10:05 +0000 | [diff] [blame] | 120 | from8ptr = (u8 *) &alignbuffer; |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 121 | |
Michal Simek | 5d1cf6c | 2011-09-12 21:10:05 +0000 | [diff] [blame] | 122 | for (i = 0; i < bytecount; i++) |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 123 | *to8ptr++ = *from8ptr++; |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 124 | } |
| 125 | |
Michal Simek | 90e89bf | 2015-12-10 16:01:50 +0100 | [diff] [blame] | 126 | static void xemaclite_alignedwrite(void *srcptr, u32 *destptr, u32 bytecount) |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 127 | { |
Michal Simek | b4a1d08 | 2010-10-11 11:41:47 +1000 | [diff] [blame] | 128 | u32 i; |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 129 | u32 alignbuffer; |
| 130 | u32 *to32ptr = (u32 *) destptr; |
| 131 | u32 *from32ptr; |
| 132 | u8 *to8ptr; |
| 133 | u8 *from8ptr; |
| 134 | |
| 135 | from32ptr = (u32 *) srcptr; |
| 136 | while (bytecount > 3) { |
| 137 | |
| 138 | *to32ptr++ = *from32ptr++; |
| 139 | bytecount -= 4; |
| 140 | } |
| 141 | |
| 142 | alignbuffer = 0; |
Michal Simek | 5d1cf6c | 2011-09-12 21:10:05 +0000 | [diff] [blame] | 143 | to8ptr = (u8 *) &alignbuffer; |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 144 | from8ptr = (u8 *) from32ptr; |
| 145 | |
Michal Simek | 5d1cf6c | 2011-09-12 21:10:05 +0000 | [diff] [blame] | 146 | for (i = 0; i < bytecount; i++) |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 147 | *to8ptr++ = *from8ptr++; |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 148 | |
| 149 | *to32ptr++ = alignbuffer; |
| 150 | } |
| 151 | |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 152 | static int wait_for_bit(const char *func, u32 *reg, const u32 mask, |
| 153 | bool set, unsigned int timeout) |
| 154 | { |
| 155 | u32 val; |
| 156 | unsigned long start = get_timer(0); |
| 157 | |
| 158 | while (1) { |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 159 | val = __raw_readl(reg); |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 160 | |
| 161 | if (!set) |
| 162 | val = ~val; |
| 163 | |
| 164 | if ((val & mask) == mask) |
| 165 | return 0; |
| 166 | |
| 167 | if (get_timer(start) > timeout) |
| 168 | break; |
| 169 | |
| 170 | if (ctrlc()) { |
| 171 | puts("Abort\n"); |
| 172 | return -EINTR; |
| 173 | } |
| 174 | |
| 175 | udelay(1); |
| 176 | } |
| 177 | |
| 178 | debug("%s: Timeout (reg=%p mask=%08x wait_set=%i)\n", |
| 179 | func, reg, mask, set); |
| 180 | |
| 181 | return -ETIMEDOUT; |
| 182 | } |
| 183 | |
Michal Simek | 905f098 | 2015-12-10 14:18:15 +0100 | [diff] [blame] | 184 | static int mdio_wait(struct emaclite_regs *regs) |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 185 | { |
Michal Simek | 905f098 | 2015-12-10 14:18:15 +0100 | [diff] [blame] | 186 | return wait_for_bit(__func__, ®s->mdioctrl, |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 187 | XEL_MDIOCTRL_MDIOSTS_MASK, false, 2000); |
| 188 | } |
| 189 | |
Michal Simek | 905f098 | 2015-12-10 14:18:15 +0100 | [diff] [blame] | 190 | static u32 phyread(struct xemaclite *emaclite, u32 phyaddress, u32 registernum, |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 191 | u16 *data) |
| 192 | { |
Michal Simek | 905f098 | 2015-12-10 14:18:15 +0100 | [diff] [blame] | 193 | struct emaclite_regs *regs = emaclite->regs; |
| 194 | |
| 195 | if (mdio_wait(regs)) |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 196 | return 1; |
| 197 | |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 198 | u32 ctrl_reg = __raw_readl(®s->mdioctrl); |
| 199 | __raw_writel(XEL_MDIOADDR_OP_MASK |
| 200 | | ((phyaddress << XEL_MDIOADDR_PHYADR_SHIFT) |
| 201 | | registernum), ®s->mdioaddr); |
| 202 | __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, ®s->mdioctrl); |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 203 | |
Michal Simek | 905f098 | 2015-12-10 14:18:15 +0100 | [diff] [blame] | 204 | if (mdio_wait(regs)) |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 205 | return 1; |
| 206 | |
| 207 | /* Read data */ |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 208 | *data = __raw_readl(®s->mdiord); |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 209 | return 0; |
| 210 | } |
| 211 | |
Michal Simek | 905f098 | 2015-12-10 14:18:15 +0100 | [diff] [blame] | 212 | static u32 phywrite(struct xemaclite *emaclite, u32 phyaddress, u32 registernum, |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 213 | u16 data) |
| 214 | { |
Michal Simek | 905f098 | 2015-12-10 14:18:15 +0100 | [diff] [blame] | 215 | struct emaclite_regs *regs = emaclite->regs; |
| 216 | |
| 217 | if (mdio_wait(regs)) |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 218 | return 1; |
| 219 | |
| 220 | /* |
| 221 | * Write the PHY address, register number and clear the OP bit in the |
| 222 | * MDIO Address register and then write the value into the MDIO Write |
| 223 | * Data register. Finally, set the Status bit in the MDIO Control |
| 224 | * register to start a MDIO write transaction. |
| 225 | */ |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 226 | u32 ctrl_reg = __raw_readl(®s->mdioctrl); |
| 227 | __raw_writel(~XEL_MDIOADDR_OP_MASK |
| 228 | & ((phyaddress << XEL_MDIOADDR_PHYADR_SHIFT) |
| 229 | | registernum), ®s->mdioaddr); |
| 230 | __raw_writel(data, ®s->mdiowr); |
| 231 | __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, ®s->mdioctrl); |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 232 | |
Michal Simek | 905f098 | 2015-12-10 14:18:15 +0100 | [diff] [blame] | 233 | if (mdio_wait(regs)) |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 234 | return 1; |
| 235 | |
| 236 | return 0; |
| 237 | } |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 238 | |
Michal Simek | feebc8a | 2015-12-16 10:40:05 +0100 | [diff] [blame] | 239 | static void emaclite_stop(struct udevice *dev) |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 240 | { |
Michal Simek | feebc8a | 2015-12-16 10:40:05 +0100 | [diff] [blame] | 241 | debug("eth_stop\n"); |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 242 | } |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 243 | |
| 244 | /* Use MII register 1 (MII status register) to detect PHY */ |
| 245 | #define PHY_DETECT_REG 1 |
| 246 | |
| 247 | /* Mask used to verify certain PHY features (or register contents) |
| 248 | * in the register above: |
| 249 | * 0x1000: 10Mbps full duplex support |
| 250 | * 0x0800: 10Mbps half duplex support |
| 251 | * 0x0008: Auto-negotiation support |
| 252 | */ |
| 253 | #define PHY_DETECT_MASK 0x1808 |
| 254 | |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 255 | static int setup_phy(struct udevice *dev) |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 256 | { |
Michal Simek | dbc0cfc | 2016-05-18 12:37:22 +0200 | [diff] [blame] | 257 | int i, ret; |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 258 | u16 phyreg; |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 259 | struct xemaclite *emaclite = dev_get_priv(dev); |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 260 | struct phy_device *phydev; |
| 261 | |
| 262 | u32 supported = SUPPORTED_10baseT_Half | |
| 263 | SUPPORTED_10baseT_Full | |
| 264 | SUPPORTED_100baseT_Half | |
| 265 | SUPPORTED_100baseT_Full; |
| 266 | |
| 267 | if (emaclite->phyaddr != -1) { |
Michal Simek | 905f098 | 2015-12-10 14:18:15 +0100 | [diff] [blame] | 268 | phyread(emaclite, emaclite->phyaddr, PHY_DETECT_REG, &phyreg); |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 269 | if ((phyreg != 0xFFFF) && |
| 270 | ((phyreg & PHY_DETECT_MASK) == PHY_DETECT_MASK)) { |
| 271 | /* Found a valid PHY address */ |
| 272 | debug("Default phy address %d is valid\n", |
| 273 | emaclite->phyaddr); |
| 274 | } else { |
| 275 | debug("PHY address is not setup correctly %d\n", |
| 276 | emaclite->phyaddr); |
| 277 | emaclite->phyaddr = -1; |
| 278 | } |
| 279 | } |
| 280 | |
| 281 | if (emaclite->phyaddr == -1) { |
| 282 | /* detect the PHY address */ |
| 283 | for (i = 31; i >= 0; i--) { |
Michal Simek | 905f098 | 2015-12-10 14:18:15 +0100 | [diff] [blame] | 284 | phyread(emaclite, i, PHY_DETECT_REG, &phyreg); |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 285 | if ((phyreg != 0xFFFF) && |
| 286 | ((phyreg & PHY_DETECT_MASK) == PHY_DETECT_MASK)) { |
| 287 | /* Found a valid PHY address */ |
| 288 | emaclite->phyaddr = i; |
| 289 | debug("emaclite: Found valid phy address, %d\n", |
| 290 | i); |
| 291 | break; |
| 292 | } |
| 293 | } |
| 294 | } |
| 295 | |
| 296 | /* interface - look at tsec */ |
| 297 | phydev = phy_connect(emaclite->bus, emaclite->phyaddr, dev, |
| 298 | PHY_INTERFACE_MODE_MII); |
| 299 | /* |
| 300 | * Phy can support 1000baseT but device NOT that's why phydev->supported |
| 301 | * must be setup for 1000baseT. phydev->advertising setups what speeds |
| 302 | * will be used for autonegotiation where 1000baseT must be disabled. |
| 303 | */ |
| 304 | phydev->supported = supported | SUPPORTED_1000baseT_Half | |
| 305 | SUPPORTED_1000baseT_Full; |
| 306 | phydev->advertising = supported; |
| 307 | emaclite->phydev = phydev; |
| 308 | phy_config(phydev); |
Michal Simek | dbc0cfc | 2016-05-18 12:37:22 +0200 | [diff] [blame] | 309 | ret = phy_startup(phydev); |
| 310 | if (ret) |
| 311 | return ret; |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 312 | |
| 313 | if (!phydev->link) { |
| 314 | printf("%s: No link.\n", phydev->dev->name); |
| 315 | return 0; |
| 316 | } |
| 317 | |
| 318 | /* Do not setup anything */ |
| 319 | return 1; |
| 320 | } |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 321 | |
Michal Simek | feebc8a | 2015-12-16 10:40:05 +0100 | [diff] [blame] | 322 | static int emaclite_start(struct udevice *dev) |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 323 | { |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 324 | struct xemaclite *emaclite = dev_get_priv(dev); |
| 325 | struct eth_pdata *pdata = dev_get_platdata(dev); |
Michal Simek | 905f098 | 2015-12-10 14:18:15 +0100 | [diff] [blame] | 326 | struct emaclite_regs *regs = emaclite->regs; |
| 327 | |
Michal Simek | 5d1cf6c | 2011-09-12 21:10:05 +0000 | [diff] [blame] | 328 | debug("EmacLite Initialization Started\n"); |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 329 | |
| 330 | /* |
| 331 | * TX - TX_PING & TX_PONG initialization |
| 332 | */ |
| 333 | /* Restart PING TX */ |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 334 | __raw_writel(0, ®s->tx_ping_tsr); |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 335 | /* Copy MAC address */ |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 336 | xemaclite_alignedwrite(pdata->enetaddr, ®s->tx_ping, |
Michal Simek | 34240c4 | 2015-12-10 15:22:21 +0100 | [diff] [blame] | 337 | ENET_ADDR_LENGTH); |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 338 | /* Set the length */ |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 339 | __raw_writel(ENET_ADDR_LENGTH, ®s->tx_ping_tplr); |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 340 | /* Update the MAC address in the EMAC Lite */ |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 341 | __raw_writel(XEL_TSR_PROG_MAC_ADDR, ®s->tx_ping_tsr); |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 342 | /* Wait for EMAC Lite to finish with the MAC address update */ |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 343 | while ((__raw_readl(®s->tx_ping_tsr) & |
Michal Simek | ac357ac | 2011-08-25 12:36:39 +0200 | [diff] [blame] | 344 | XEL_TSR_PROG_MAC_ADDR) != 0) |
| 345 | ; |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 346 | |
Michal Simek | df40ead | 2011-09-12 21:10:01 +0000 | [diff] [blame] | 347 | if (emaclite->txpp) { |
| 348 | /* The same operation with PONG TX */ |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 349 | __raw_writel(0, ®s->tx_pong_tsr); |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 350 | xemaclite_alignedwrite(pdata->enetaddr, ®s->tx_pong, |
Michal Simek | 34240c4 | 2015-12-10 15:22:21 +0100 | [diff] [blame] | 351 | ENET_ADDR_LENGTH); |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 352 | __raw_writel(ENET_ADDR_LENGTH, ®s->tx_pong_tplr); |
| 353 | __raw_writel(XEL_TSR_PROG_MAC_ADDR, ®s->tx_pong_tsr); |
| 354 | while ((__raw_readl(®s->tx_pong_tsr) & |
Michal Simek | 34240c4 | 2015-12-10 15:22:21 +0100 | [diff] [blame] | 355 | XEL_TSR_PROG_MAC_ADDR) != 0) |
Michal Simek | df40ead | 2011-09-12 21:10:01 +0000 | [diff] [blame] | 356 | ; |
| 357 | } |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 358 | |
| 359 | /* |
| 360 | * RX - RX_PING & RX_PONG initialization |
| 361 | */ |
| 362 | /* Write out the value to flush the RX buffer */ |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 363 | __raw_writel(XEL_RSR_RECV_IE_MASK, ®s->rx_ping_rsr); |
Michal Simek | df40ead | 2011-09-12 21:10:01 +0000 | [diff] [blame] | 364 | |
| 365 | if (emaclite->rxpp) |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 366 | __raw_writel(XEL_RSR_RECV_IE_MASK, ®s->rx_pong_rsr); |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 367 | |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 368 | __raw_writel(XEL_MDIOCTRL_MDIOEN_MASK, ®s->mdioctrl); |
| 369 | if (__raw_readl(®s->mdioctrl) & XEL_MDIOCTRL_MDIOEN_MASK) |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 370 | if (!setup_phy(dev)) |
| 371 | return -1; |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 372 | |
Michal Simek | 5d1cf6c | 2011-09-12 21:10:05 +0000 | [diff] [blame] | 373 | debug("EmacLite Initialization complete\n"); |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 374 | return 0; |
| 375 | } |
| 376 | |
Michal Simek | 1edc657 | 2015-12-10 15:42:01 +0100 | [diff] [blame] | 377 | static int xemaclite_txbufferavailable(struct xemaclite *emaclite) |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 378 | { |
Michal Simek | 1edc657 | 2015-12-10 15:42:01 +0100 | [diff] [blame] | 379 | u32 tmp; |
| 380 | struct emaclite_regs *regs = emaclite->regs; |
Michal Simek | f35b7cd | 2011-08-25 12:47:56 +0200 | [diff] [blame] | 381 | |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 382 | /* |
| 383 | * Read the other buffer register |
| 384 | * and determine if the other buffer is available |
| 385 | */ |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 386 | tmp = ~__raw_readl(®s->tx_ping_tsr); |
Michal Simek | 1edc657 | 2015-12-10 15:42:01 +0100 | [diff] [blame] | 387 | if (emaclite->txpp) |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 388 | tmp |= ~__raw_readl(®s->tx_pong_tsr); |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 389 | |
Michal Simek | 1edc657 | 2015-12-10 15:42:01 +0100 | [diff] [blame] | 390 | return !(tmp & XEL_TSR_XMIT_BUSY_MASK); |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 391 | } |
| 392 | |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 393 | static int emaclite_send(struct udevice *dev, void *ptr, int len) |
Michal Simek | b4a1d08 | 2010-10-11 11:41:47 +1000 | [diff] [blame] | 394 | { |
| 395 | u32 reg; |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 396 | struct xemaclite *emaclite = dev_get_priv(dev); |
Michal Simek | 9b9423b | 2015-12-10 15:32:11 +0100 | [diff] [blame] | 397 | struct emaclite_regs *regs = emaclite->regs; |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 398 | |
Michal Simek | b4a1d08 | 2010-10-11 11:41:47 +1000 | [diff] [blame] | 399 | u32 maxtry = 1000; |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 400 | |
Michal Simek | 3aa96f8 | 2011-09-12 21:10:04 +0000 | [diff] [blame] | 401 | if (len > PKTSIZE) |
| 402 | len = PKTSIZE; |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 403 | |
Michal Simek | 1edc657 | 2015-12-10 15:42:01 +0100 | [diff] [blame] | 404 | while (xemaclite_txbufferavailable(emaclite) && maxtry) { |
Michal Simek | 5d1cf6c | 2011-09-12 21:10:05 +0000 | [diff] [blame] | 405 | udelay(10); |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 406 | maxtry--; |
| 407 | } |
| 408 | |
| 409 | if (!maxtry) { |
Michal Simek | 5d1cf6c | 2011-09-12 21:10:05 +0000 | [diff] [blame] | 410 | printf("Error: Timeout waiting for ethernet TX buffer\n"); |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 411 | /* Restart PING TX */ |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 412 | __raw_writel(0, ®s->tx_ping_tsr); |
Michal Simek | df40ead | 2011-09-12 21:10:01 +0000 | [diff] [blame] | 413 | if (emaclite->txpp) { |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 414 | __raw_writel(0, ®s->tx_pong_tsr); |
Michal Simek | df40ead | 2011-09-12 21:10:01 +0000 | [diff] [blame] | 415 | } |
Michal Simek | 2986921 | 2011-03-08 04:25:53 +0000 | [diff] [blame] | 416 | return -1; |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 417 | } |
| 418 | |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 419 | /* Determine if the expected buffer address is empty */ |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 420 | reg = __raw_readl(®s->tx_ping_tsr); |
Michal Simek | d92cef4 | 2015-12-10 16:06:07 +0100 | [diff] [blame] | 421 | if ((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) { |
Michal Simek | 90e89bf | 2015-12-10 16:01:50 +0100 | [diff] [blame] | 422 | debug("Send packet from tx_ping buffer\n"); |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 423 | /* Write the frame to the buffer */ |
Michal Simek | 90e89bf | 2015-12-10 16:01:50 +0100 | [diff] [blame] | 424 | xemaclite_alignedwrite(ptr, ®s->tx_ping, len); |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 425 | __raw_writel(len |
| 426 | & (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO), |
| 427 | ®s->tx_ping_tplr); |
| 428 | reg = __raw_readl(®s->tx_ping_tsr); |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 429 | reg |= XEL_TSR_XMIT_BUSY_MASK; |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 430 | __raw_writel(reg, ®s->tx_ping_tsr); |
Michal Simek | 2986921 | 2011-03-08 04:25:53 +0000 | [diff] [blame] | 431 | return 0; |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 432 | } |
Michal Simek | df40ead | 2011-09-12 21:10:01 +0000 | [diff] [blame] | 433 | |
| 434 | if (emaclite->txpp) { |
Michal Simek | df40ead | 2011-09-12 21:10:01 +0000 | [diff] [blame] | 435 | /* Determine if the expected buffer address is empty */ |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 436 | reg = __raw_readl(®s->tx_pong_tsr); |
Michal Simek | d92cef4 | 2015-12-10 16:06:07 +0100 | [diff] [blame] | 437 | if ((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) { |
Michal Simek | 90e89bf | 2015-12-10 16:01:50 +0100 | [diff] [blame] | 438 | debug("Send packet from tx_pong buffer\n"); |
Michal Simek | df40ead | 2011-09-12 21:10:01 +0000 | [diff] [blame] | 439 | /* Write the frame to the buffer */ |
Michal Simek | 90e89bf | 2015-12-10 16:01:50 +0100 | [diff] [blame] | 440 | xemaclite_alignedwrite(ptr, ®s->tx_pong, len); |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 441 | __raw_writel(len & |
Michal Simek | 90e89bf | 2015-12-10 16:01:50 +0100 | [diff] [blame] | 442 | (XEL_TPLR_LENGTH_MASK_HI | |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 443 | XEL_TPLR_LENGTH_MASK_LO), |
| 444 | ®s->tx_pong_tplr); |
| 445 | reg = __raw_readl(®s->tx_pong_tsr); |
Michal Simek | df40ead | 2011-09-12 21:10:01 +0000 | [diff] [blame] | 446 | reg |= XEL_TSR_XMIT_BUSY_MASK; |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 447 | __raw_writel(reg, ®s->tx_pong_tsr); |
Michal Simek | df40ead | 2011-09-12 21:10:01 +0000 | [diff] [blame] | 448 | return 0; |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 449 | } |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 450 | } |
Michal Simek | df40ead | 2011-09-12 21:10:01 +0000 | [diff] [blame] | 451 | |
Michal Simek | 5d1cf6c | 2011-09-12 21:10:05 +0000 | [diff] [blame] | 452 | puts("Error while sending frame\n"); |
Michal Simek | 2986921 | 2011-03-08 04:25:53 +0000 | [diff] [blame] | 453 | return -1; |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 454 | } |
| 455 | |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 456 | static int emaclite_recv(struct udevice *dev, int flags, uchar **packetp) |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 457 | { |
Michal Simek | 36f7a41 | 2015-12-10 16:31:38 +0100 | [diff] [blame] | 458 | u32 length, first_read, reg, attempt = 0; |
| 459 | void *addr, *ack; |
Michal Simek | f35b7cd | 2011-08-25 12:47:56 +0200 | [diff] [blame] | 460 | struct xemaclite *emaclite = dev->priv; |
Michal Simek | 36f7a41 | 2015-12-10 16:31:38 +0100 | [diff] [blame] | 461 | struct emaclite_regs *regs = emaclite->regs; |
| 462 | struct ethernet_hdr *eth; |
| 463 | struct ip_udp_hdr *ip; |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 464 | |
Michal Simek | 36f7a41 | 2015-12-10 16:31:38 +0100 | [diff] [blame] | 465 | try_again: |
| 466 | if (!emaclite->use_rx_pong_buffer_next) { |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 467 | reg = __raw_readl(®s->rx_ping_rsr); |
Michal Simek | 36f7a41 | 2015-12-10 16:31:38 +0100 | [diff] [blame] | 468 | debug("Testing data at rx_ping\n"); |
| 469 | if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { |
| 470 | debug("Data found in rx_ping buffer\n"); |
| 471 | addr = ®s->rx_ping; |
| 472 | ack = ®s->rx_ping_rsr; |
| 473 | } else { |
| 474 | debug("Data not found in rx_ping buffer\n"); |
| 475 | /* Pong buffer is not available - return immediately */ |
| 476 | if (!emaclite->rxpp) |
| 477 | return -1; |
Michal Simek | df40ead | 2011-09-12 21:10:01 +0000 | [diff] [blame] | 478 | |
Michal Simek | 36f7a41 | 2015-12-10 16:31:38 +0100 | [diff] [blame] | 479 | /* Try pong buffer if this is first attempt */ |
| 480 | if (attempt++) |
| 481 | return -1; |
| 482 | emaclite->use_rx_pong_buffer_next = |
| 483 | !emaclite->use_rx_pong_buffer_next; |
| 484 | goto try_again; |
| 485 | } |
| 486 | } else { |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 487 | reg = __raw_readl(®s->rx_pong_rsr); |
Michal Simek | 36f7a41 | 2015-12-10 16:31:38 +0100 | [diff] [blame] | 488 | debug("Testing data at rx_pong\n"); |
| 489 | if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { |
| 490 | debug("Data found in rx_pong buffer\n"); |
| 491 | addr = ®s->rx_pong; |
| 492 | ack = ®s->rx_pong_rsr; |
Michal Simek | df40ead | 2011-09-12 21:10:01 +0000 | [diff] [blame] | 493 | } else { |
Michal Simek | 36f7a41 | 2015-12-10 16:31:38 +0100 | [diff] [blame] | 494 | debug("Data not found in rx_pong buffer\n"); |
| 495 | /* Try ping buffer if this is first attempt */ |
| 496 | if (attempt++) |
| 497 | return -1; |
| 498 | emaclite->use_rx_pong_buffer_next = |
| 499 | !emaclite->use_rx_pong_buffer_next; |
| 500 | goto try_again; |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 501 | } |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 502 | } |
Michal Simek | 36f7a41 | 2015-12-10 16:31:38 +0100 | [diff] [blame] | 503 | |
| 504 | /* Read all bytes for ARP packet with 32bit alignment - 48bytes */ |
| 505 | first_read = ALIGN(ETHER_HDR_SIZE + ARP_HDR_SIZE + ETH_FCS_LEN, 4); |
| 506 | xemaclite_alignedread(addr, etherrxbuff, first_read); |
| 507 | |
| 508 | /* Detect real packet size */ |
| 509 | eth = (struct ethernet_hdr *)etherrxbuff; |
| 510 | switch (ntohs(eth->et_protlen)) { |
| 511 | case PROT_ARP: |
| 512 | length = first_read; |
| 513 | debug("ARP Packet %x\n", length); |
| 514 | break; |
| 515 | case PROT_IP: |
| 516 | ip = (struct ip_udp_hdr *)(etherrxbuff + ETHER_HDR_SIZE); |
| 517 | length = ntohs(ip->ip_len); |
| 518 | length += ETHER_HDR_SIZE + ETH_FCS_LEN; |
| 519 | debug("IP Packet %x\n", length); |
| 520 | break; |
| 521 | default: |
| 522 | debug("Other Packet\n"); |
| 523 | length = PKTSIZE; |
| 524 | break; |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 525 | } |
| 526 | |
Michal Simek | 36f7a41 | 2015-12-10 16:31:38 +0100 | [diff] [blame] | 527 | /* Read the rest of the packet which is longer then first read */ |
| 528 | if (length != first_read) |
| 529 | xemaclite_alignedread(addr + first_read, |
| 530 | etherrxbuff + first_read, |
| 531 | length - first_read); |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 532 | |
| 533 | /* Acknowledge the frame */ |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 534 | reg = __raw_readl(ack); |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 535 | reg &= ~XEL_RSR_RECV_DONE_MASK; |
Zubair Lutfullah Kakakhel | 9166459 | 2016-07-27 12:25:08 +0100 | [diff] [blame] | 536 | __raw_writel(reg, ack); |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 537 | |
Michal Simek | 36f7a41 | 2015-12-10 16:31:38 +0100 | [diff] [blame] | 538 | debug("Packet receive from 0x%p, length %dB\n", addr, length); |
Michal Simek | 641ade0 | 2015-12-16 10:52:39 +0100 | [diff] [blame] | 539 | *packetp = etherrxbuff; |
| 540 | return length; |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 541 | } |
| 542 | |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 543 | static int emaclite_miiphy_read(struct mii_dev *bus, int addr, |
| 544 | int devad, int reg) |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 545 | { |
| 546 | u32 ret; |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 547 | u16 val = 0; |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 548 | |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 549 | ret = phyread(bus->priv, addr, reg, &val); |
| 550 | debug("emaclite: Read MII 0x%x, 0x%x, 0x%x, %d\n", addr, reg, val, ret); |
| 551 | return val; |
Michal Simek | 4514b37 | 2008-03-28 12:41:56 +0100 | [diff] [blame] | 552 | } |
Michal Simek | b4a1d08 | 2010-10-11 11:41:47 +1000 | [diff] [blame] | 553 | |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 554 | static int emaclite_miiphy_write(struct mii_dev *bus, int addr, int devad, |
| 555 | int reg, u16 value) |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 556 | { |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 557 | debug("emaclite: Write MII 0x%x, 0x%x, 0x%x\n", addr, reg, value); |
| 558 | return phywrite(bus->priv, addr, reg, value); |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 559 | } |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 560 | |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 561 | static int emaclite_probe(struct udevice *dev) |
Michal Simek | b4a1d08 | 2010-10-11 11:41:47 +1000 | [diff] [blame] | 562 | { |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 563 | struct xemaclite *emaclite = dev_get_priv(dev); |
| 564 | int ret; |
Michal Simek | b4a1d08 | 2010-10-11 11:41:47 +1000 | [diff] [blame] | 565 | |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 566 | emaclite->bus = mdio_alloc(); |
| 567 | emaclite->bus->read = emaclite_miiphy_read; |
| 568 | emaclite->bus->write = emaclite_miiphy_write; |
| 569 | emaclite->bus->priv = emaclite; |
Michal Simek | f35b7cd | 2011-08-25 12:47:56 +0200 | [diff] [blame] | 570 | |
Michal Simek | e4dab43 | 2016-12-08 10:25:44 +0100 | [diff] [blame] | 571 | ret = mdio_register_seq(emaclite->bus, dev->seq); |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 572 | if (ret) |
| 573 | return ret; |
| 574 | |
| 575 | return 0; |
| 576 | } |
Michal Simek | f35b7cd | 2011-08-25 12:47:56 +0200 | [diff] [blame] | 577 | |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 578 | static int emaclite_remove(struct udevice *dev) |
| 579 | { |
| 580 | struct xemaclite *emaclite = dev_get_priv(dev); |
| 581 | |
| 582 | free(emaclite->phydev); |
| 583 | mdio_unregister(emaclite->bus); |
| 584 | mdio_free(emaclite->bus); |
Michal Simek | b4a1d08 | 2010-10-11 11:41:47 +1000 | [diff] [blame] | 585 | |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 586 | return 0; |
| 587 | } |
Michal Simek | df40ead | 2011-09-12 21:10:01 +0000 | [diff] [blame] | 588 | |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 589 | static const struct eth_ops emaclite_ops = { |
Michal Simek | feebc8a | 2015-12-16 10:40:05 +0100 | [diff] [blame] | 590 | .start = emaclite_start, |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 591 | .send = emaclite_send, |
| 592 | .recv = emaclite_recv, |
Michal Simek | feebc8a | 2015-12-16 10:40:05 +0100 | [diff] [blame] | 593 | .stop = emaclite_stop, |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 594 | }; |
| 595 | |
| 596 | static int emaclite_ofdata_to_platdata(struct udevice *dev) |
| 597 | { |
| 598 | struct eth_pdata *pdata = dev_get_platdata(dev); |
| 599 | struct xemaclite *emaclite = dev_get_priv(dev); |
| 600 | int offset = 0; |
Michal Simek | b4a1d08 | 2010-10-11 11:41:47 +1000 | [diff] [blame] | 601 | |
Simon Glass | ba1dea4 | 2017-05-17 17:18:05 -0600 | [diff] [blame] | 602 | pdata->iobase = (phys_addr_t)devfdt_get_addr(dev); |
Zubair Lutfullah Kakakhel | d23bf84 | 2016-07-27 12:25:07 +0100 | [diff] [blame] | 603 | emaclite->regs = (struct emaclite_regs *)ioremap_nocache(pdata->iobase, |
| 604 | 0x10000); |
Michal Simek | b4a1d08 | 2010-10-11 11:41:47 +1000 | [diff] [blame] | 605 | |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 606 | emaclite->phyaddr = -1; |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 607 | |
Simon Glass | dd79d6e | 2017-01-17 16:52:55 -0700 | [diff] [blame] | 608 | offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev), |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 609 | "phy-handle"); |
| 610 | if (offset > 0) |
| 611 | emaclite->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, |
| 612 | "reg", -1); |
Michal Simek | b4a1d08 | 2010-10-11 11:41:47 +1000 | [diff] [blame] | 613 | |
Simon Glass | dd79d6e | 2017-01-17 16:52:55 -0700 | [diff] [blame] | 614 | emaclite->txpp = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 615 | "xlnx,tx-ping-pong", 0); |
Simon Glass | dd79d6e | 2017-01-17 16:52:55 -0700 | [diff] [blame] | 616 | emaclite->rxpp = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 617 | "xlnx,rx-ping-pong", 0); |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 618 | |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 619 | printf("EMACLITE: %lx, phyaddr %d, %d/%d\n", (ulong)emaclite->regs, |
| 620 | emaclite->phyaddr, emaclite->txpp, emaclite->rxpp); |
Michal Simek | 912145b | 2015-12-10 13:33:20 +0100 | [diff] [blame] | 621 | |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 622 | return 0; |
Michal Simek | b4a1d08 | 2010-10-11 11:41:47 +1000 | [diff] [blame] | 623 | } |
Michal Simek | f7cba78 | 2015-12-10 17:15:52 +0100 | [diff] [blame] | 624 | |
| 625 | static const struct udevice_id emaclite_ids[] = { |
| 626 | { .compatible = "xlnx,xps-ethernetlite-1.00.a" }, |
| 627 | { } |
| 628 | }; |
| 629 | |
| 630 | U_BOOT_DRIVER(emaclite) = { |
| 631 | .name = "emaclite", |
| 632 | .id = UCLASS_ETH, |
| 633 | .of_match = emaclite_ids, |
| 634 | .ofdata_to_platdata = emaclite_ofdata_to_platdata, |
| 635 | .probe = emaclite_probe, |
| 636 | .remove = emaclite_remove, |
| 637 | .ops = &emaclite_ops, |
| 638 | .priv_auto_alloc_size = sizeof(struct xemaclite), |
| 639 | .platdata_auto_alloc_size = sizeof(struct eth_pdata), |
| 640 | }; |