commit 34240c454abad133b8ac67d438ebb5257e6e2f85
author Michal Simek <michal.simek@xilinx.com> Thu Dec 10 15:22:21 2015 +0100
committer Michal Simek <michal.simek@xilinx.com> Wed Jan 27 15:55:51 2016 +0100
tree f9fbe0c9bd38f5d48affb1a530d567d019b18415
parent 905f098085441806165e175a1618b4c1b8b769d8

net: emaclite: Use indirect register access for tx_ping/pong

Do initialization via indirect register access.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

drivers/net/xilinx_emaclite.c

diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c
index 9d413a0..654ad58 100644
--- a/drivers/net/xilinx_emaclite.c
+++ b/drivers/net/xilinx_emaclite.c
@@ -335,28 +335,28 @@
  * TX - TX_PING & TX_PONG initialization
  */
 	/* Restart PING TX */
-	out_be32 (dev->iobase + XEL_TSR_OFFSET, 0);
+	out_be32(&regs->tx_ping_tsr, 0);
 	/* Copy MAC address */
-	xemaclite_alignedwrite(dev->enetaddr, dev->iobase, ENET_ADDR_LENGTH);
+	xemaclite_alignedwrite(dev->enetaddr, (u32)&regs->tx_ping,
+			       ENET_ADDR_LENGTH);
 	/* Set the length */
-	out_be32 (dev->iobase + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH);
+	out_be32(&regs->tx_ping_tplr, ENET_ADDR_LENGTH);
 	/* Update the MAC address in the EMAC Lite */
-	out_be32 (dev->iobase + XEL_TSR_OFFSET, XEL_TSR_PROG_MAC_ADDR);
+	out_be32(&regs->tx_ping_tsr, XEL_TSR_PROG_MAC_ADDR);
 	/* Wait for EMAC Lite to finish with the MAC address update */
-	while ((in_be32 (dev->iobase + XEL_TSR_OFFSET) &
+	while ((in_be32 (&regs->tx_ping_tsr) &
 		XEL_TSR_PROG_MAC_ADDR) != 0)
 		;
 
 	if (emaclite->txpp) {
 		/* The same operation with PONG TX */
-		out_be32 (dev->iobase + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0);
-		xemaclite_alignedwrite(dev->enetaddr, dev->iobase +
-			XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH);
-		out_be32 (dev->iobase + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH);
-		out_be32 (dev->iobase + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET,
-			XEL_TSR_PROG_MAC_ADDR);
-		while ((in_be32 (dev->iobase + XEL_TSR_OFFSET +
-			XEL_BUFFER_OFFSET) & XEL_TSR_PROG_MAC_ADDR) != 0)
+		out_be32(&regs->tx_pong_tsr, 0);
+		xemaclite_alignedwrite(dev->enetaddr, (u32)&regs->tx_pong,
+				       ENET_ADDR_LENGTH);
+		out_be32(&regs->tx_pong_tplr, ENET_ADDR_LENGTH);
+		out_be32(&regs->tx_pong_tsr, XEL_TSR_PROG_MAC_ADDR);
+		while ((in_be32(&regs->tx_pong_tsr) &
+		       XEL_TSR_PROG_MAC_ADDR) != 0)
 			;
 	}