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developerd0c89452024-10-11 16:53:27 +08001From 1ee4eb8cb63f275f929b3f7aabbdb0df66ed1f2f Mon Sep 17 00:00:00 2001
developer05f3b2b2024-08-19 19:17:34 +08002From: MeiChia Chiu <meichia.chiu@mediatek.com>
3Date: Fri, 9 Jun 2023 14:11:30 +0800
developerd0c89452024-10-11 16:53:27 +08004Subject: [PATCH 110/223] mtk: mt76: temp changes for SQC period
developer05f3b2b2024-08-19 19:17:34 +08005
6mtk: wifi: mt76: mt7996: For SQC test Disable single sku
7
8During SQC testing, disable single sku to prevent max power from
9being restricted by regdb setting
10
11NOTE: This patch is only for apply during SQC and will be
12removed after SQC.
13
14mtk: wifi: mt76: mt7996: Enable WM/WA UART log during the SQC period
15
16Enable WM/WA UART log by default during the SQC period
17
18mtk: wifi: mt76: mt7996: add SER flow log for debug during the SQC period.
19
developerd0c89452024-10-11 16:53:27 +080020Change-Id: I052e7284b3f6adfa4414e64445fa1f24f92fc8a7
21Change-Id: If68052b181c63d989ce3173bb5b19168e662e540
developer05f3b2b2024-08-19 19:17:34 +080022Signed-off-by: MeiChia Chiu <meichia.chiu@mediatek.com>
23Signed-off-by: mtk27745 <rex.lu@mediatek.com>
24---
25 mt7996/dma.c | 39 +++++++++++++++++++++++++++++++++++++++
26 mt7996/mac.c | 29 +++++++++++++++++++++++++++++
27 mt7996/mcu.c | 4 ++--
28 mt7996/mtk_debugfs.c | 1 +
29 4 files changed, 71 insertions(+), 2 deletions(-)
30
31diff --git a/mt7996/dma.c b/mt7996/dma.c
32index a2490fa7..bbc3814d 100644
33--- a/mt7996/dma.c
34+++ b/mt7996/dma.c
35@@ -800,11 +800,23 @@ void mt7996_dma_reset(struct mt7996_dev *dev, bool force)
36 for (i = 0; i < __MT_MCUQ_MAX; i++)
37 mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[i], true);
38
39+ if (!force)
40+ dev_info(dev->mt76.dev,"%s L1 SER tx queue clean up done.",
41+ wiphy_name(dev->mt76.hw->wiphy));
42+
43 mt76_for_each_q_rx(&dev->mt76, i)
44 mt76_queue_rx_cleanup(dev, &dev->mt76.q_rx[i]);
45
46+ if (!force)
47+ dev_info(dev->mt76.dev,"%s L1 SER rx queue clean up done.",
48+ wiphy_name(dev->mt76.hw->wiphy));
49+
50 mt76_tx_status_check(&dev->mt76, true);
51
52+ if (!force)
53+ dev_info(dev->mt76.dev,"%s L1 SER mt76_tx_status_check done.",
54+ wiphy_name(dev->mt76.hw->wiphy));
55+
56 /* reset wfsys */
57 if (force)
58 mt7996_wfsys_reset(dev);
59@@ -815,7 +827,15 @@ void mt7996_dma_reset(struct mt7996_dev *dev, bool force)
60 if (mtk_wed_device_active(&dev->mt76.mmio.wed))
61 mtk_wed_device_dma_reset(&dev->mt76.mmio.wed);
62
63+ if (!force)
64+ dev_info(dev->mt76.dev,"%s L1 SER wed dma reset done.",
65+ wiphy_name(dev->mt76.hw->wiphy));
66+
67 mt7996_dma_disable(dev, force);
68+
69+ if (!force)
70+ dev_info(dev->mt76.dev,"%s L1 SER dma disable done.",
71+ wiphy_name(dev->mt76.hw->wiphy));
72 mt76_wed_dma_reset(&dev->mt76);
73
74 /* reset hw queues */
75@@ -827,9 +847,16 @@ void mt7996_dma_reset(struct mt7996_dev *dev, bool force)
76 mt76_dma_reset_tx_queue(&dev->mt76, phy3->q_tx[i]);
77 }
78
79+ if (!force)
80+ dev_info(dev->mt76.dev,"%s L1 SER dma tx queue reset done.",
81+ wiphy_name(dev->mt76.hw->wiphy));
82+
83 for (i = 0; i < __MT_MCUQ_MAX; i++)
84 mt76_queue_reset(dev, dev->mt76.q_mcu[i], true);
85
86+ if (!force)
87+ dev_info(dev->mt76.dev,"%s L1 SER mcu queue reset done.",
88+ wiphy_name(dev->mt76.hw->wiphy));
89 mt76_for_each_q_rx(&dev->mt76, i) {
90 if (mtk_wed_device_active(&dev->mt76.mmio.wed)) {
91 if (mt76_queue_is_wed_rro(&dev->mt76.q_rx[i]) ||
92@@ -843,6 +870,10 @@ void mt7996_dma_reset(struct mt7996_dev *dev, bool force)
93 mt76_queue_reset(dev, &dev->mt76.q_rx[i], true);
94 }
95
96+ if (!force)
97+ dev_info(dev->mt76.dev,"%s L1 SER rx queue reset done.",
98+ wiphy_name(dev->mt76.hw->wiphy));
99+
100 mt76_tx_status_check(&dev->mt76, true);
101
102 mt76_for_each_q_rx(&dev->mt76, i) {
103@@ -854,7 +885,15 @@ void mt7996_dma_reset(struct mt7996_dev *dev, bool force)
104 mt76_queue_rx_reset(dev, i);
105 }
106
107+ if (!force)
108+ dev_info(dev->mt76.dev,"%s L1 SER rx queue rx reset done.",
109+ wiphy_name(dev->mt76.hw->wiphy));
110+
111 mt7996_dma_enable(dev, !force);
112+
113+ if (!force)
114+ dev_info(dev->mt76.dev,"%s L1 SER dma enable done.",
115+ wiphy_name(dev->mt76.hw->wiphy));
116 }
117
118 void mt7996_dma_cleanup(struct mt7996_dev *dev)
119diff --git a/mt7996/mac.c b/mt7996/mac.c
developerd0c89452024-10-11 16:53:27 +0800120index 1c0d3676..ac61869d 100644
developer05f3b2b2024-08-19 19:17:34 +0800121--- a/mt7996/mac.c
122+++ b/mt7996/mac.c
developerd0c89452024-10-11 16:53:27 +0800123@@ -1992,6 +1992,9 @@ void mt7996_mac_reset_work(struct work_struct *work)
developer05f3b2b2024-08-19 19:17:34 +0800124 if (phy3)
125 ieee80211_stop_queues(phy3->mt76->hw);
126
127+ dev_info(dev->mt76.dev,"%s L1 SER queue stop done.",
128+ wiphy_name(dev->mt76.hw->wiphy));
129+
130 set_bit(MT76_RESET, &dev->mphy.state);
131 set_bit(MT76_MCU_RESET, &dev->mphy.state);
132 if (phy2)
developerd0c89452024-10-11 16:53:27 +0800133@@ -2001,6 +2004,10 @@ void mt7996_mac_reset_work(struct work_struct *work)
developer05f3b2b2024-08-19 19:17:34 +0800134 wake_up(&dev->mt76.mcu.wait);
135
136 mt76_worker_disable(&dev->mt76.tx_worker);
137+
138+ dev_info(dev->mt76.dev,"%s L1 SER disable tx_work done.",
139+ wiphy_name(dev->mt76.hw->wiphy));
140+
141 mt76_for_each_q_rx(&dev->mt76, i) {
142 if (mtk_wed_device_active(&dev->mt76.mmio.wed) &&
143 mt76_queue_is_wed_rro(&dev->mt76.q_rx[i]))
developerd0c89452024-10-11 16:53:27 +0800144@@ -2010,14 +2017,30 @@ void mt7996_mac_reset_work(struct work_struct *work)
developer05f3b2b2024-08-19 19:17:34 +0800145 }
146 napi_disable(&dev->mt76.tx_napi);
147
148+ dev_info(dev->mt76.dev,"%s L1 SER napi disable done.",
149+ wiphy_name(dev->mt76.hw->wiphy));
150+
151 mt76_wr(dev, MT_MCU_INT_EVENT, MT_MCU_INT_EVENT_DMA_STOPPED);
152
153+ dev_info(dev->mt76.dev,"%s L1 SER dma stop done.",
154+ wiphy_name(dev->mt76.hw->wiphy));
155+
156 if (mt7996_wait_reset_state(dev, MT_MCU_CMD_RESET_DONE)) {
157 mt7996_dma_reset(dev, false);
158
159+ dev_info(dev->mt76.dev,"%s L1 SER dma reset done.",
160+ wiphy_name(dev->mt76.hw->wiphy));
161+
162 mt7996_tx_token_put(dev);
163+
164+ dev_info(dev->mt76.dev,"%s L1 SER token put done.",
165+ wiphy_name(dev->mt76.hw->wiphy));
166+
167 idr_init(&dev->mt76.token);
168
169+ dev_info(dev->mt76.dev,"%s L1 SER idr init done.",
170+ wiphy_name(dev->mt76.hw->wiphy));
171+
172 mt76_wr(dev, MT_MCU_INT_EVENT, MT_MCU_INT_EVENT_DMA_INIT);
173 mt7996_wait_reset_state(dev, MT_MCU_CMD_RECOVERY_DONE);
174 }
developerd0c89452024-10-11 16:53:27 +0800175@@ -2028,6 +2051,9 @@ void mt7996_mac_reset_work(struct work_struct *work)
developer05f3b2b2024-08-19 19:17:34 +0800176 /* enable DMA Tx/Tx and interrupt */
177 mt7996_dma_start(dev, false, false);
178
179+ dev_info(dev->mt76.dev,"%s L1 SER dma start done.",
180+ wiphy_name(dev->mt76.hw->wiphy));
181+
182 if (mtk_wed_device_active(&dev->mt76.mmio.wed)) {
183 u32 wed_irq_mask = MT_INT_RRO_RX_DONE | MT_INT_TX_DONE_BAND2 |
184 dev->mt76.mmio.irqmask;
developerd0c89452024-10-11 16:53:27 +0800185@@ -2054,6 +2080,9 @@ void mt7996_mac_reset_work(struct work_struct *work)
developer05f3b2b2024-08-19 19:17:34 +0800186 MT_INT_TX_RX_DONE_EXT);
187 }
188
189+ dev_info(dev->mt76.dev,"%s L1 SER wed start done.",
190+ wiphy_name(dev->mt76.hw->wiphy));
191+
192 clear_bit(MT76_MCU_RESET, &dev->mphy.state);
193 clear_bit(MT76_RESET, &dev->mphy.state);
194 if (phy2)
195diff --git a/mt7996/mcu.c b/mt7996/mcu.c
developerd0c89452024-10-11 16:53:27 +0800196index d1aa19cb..d56630e9 100644
developer05f3b2b2024-08-19 19:17:34 +0800197--- a/mt7996/mcu.c
198+++ b/mt7996/mcu.c
developerd0c89452024-10-11 16:53:27 +0800199@@ -3857,11 +3857,11 @@ int mt7996_mcu_init_firmware(struct mt7996_dev *dev)
developer05f3b2b2024-08-19 19:17:34 +0800200 return ret;
201
202 set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
203- ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0);
204+ ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 1);
205 if (ret)
206 return ret;
207
208- ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0);
209+ ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 1);
210 if (ret)
211 return ret;
212
213diff --git a/mt7996/mtk_debugfs.c b/mt7996/mtk_debugfs.c
developerd0c89452024-10-11 16:53:27 +0800214index f9c5b238..0cf48193 100644
developer05f3b2b2024-08-19 19:17:34 +0800215--- a/mt7996/mtk_debugfs.c
216+++ b/mt7996/mtk_debugfs.c
developerd0c89452024-10-11 16:53:27 +0800217@@ -4297,6 +4297,7 @@ int mt7996_mtk_init_debugfs(struct mt7996_phy *phy, struct dentry *dir)
developer05f3b2b2024-08-19 19:17:34 +0800218 debugfs_create_file("red", 0200, dir, dev, &fops_red_config);
219 debugfs_create_file("vow_drr_dbg", 0200, dir, dev, &fops_vow_drr_dbg);
220
221+ dev->dbg.sku_disable = true; /* For SQC */
222 debugfs_create_u8("sku_disable", 0600, dir, &dev->dbg.sku_disable);
223 debugfs_create_file("scs_enable", 0200, dir, phy, &fops_scs_enable);
224
225--
developerd0c89452024-10-11 16:53:27 +08002262.45.2
developer05f3b2b2024-08-19 19:17:34 +0800227