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git01.mediatek.com / filogic / rdk-b / meta-filogic / 05f3b2be78bc66ffe25f0298d8edf45ca46a1ca2 / . / recipes-wifi / linux-mt76 / files / patches-3.x / 0122-mtk-mt76-temp-changes-for-SQC-period.patch
blob: 335413f98a766309d146b52cae0de8e666b86fc6 [file] [log] [blame]
developer05f3b2b2024-08-19 19:17:34 +0800[diff] [blame^]1From 59bc821a3e6440f117f8e864e468a1c297be482a Mon Sep 17 00:00:00 2001
2From: MeiChia Chiu <meichia.chiu@mediatek.com>
3Date: Fri, 9 Jun 2023 14:11:30 +0800
4Subject: [PATCH 122/199] mtk: mt76: temp changes for SQC period
5
6mtk: wifi: mt76: mt7996: For SQC test Disable single sku
7
8During SQC testing, disable single sku to prevent max power from
9being restricted by regdb setting
10
11NOTE: This patch is only for apply during SQC and will be
12removed after SQC.
13
14mtk: wifi: mt76: mt7996: Enable WM/WA UART log during the SQC period
15
16Enable WM/WA UART log by default during the SQC period
17
18mtk: wifi: mt76: mt7996: add SER flow log for debug during the SQC period.
19
20Signed-off-by: MeiChia Chiu <meichia.chiu@mediatek.com>
21Signed-off-by: mtk27745 <rex.lu@mediatek.com>
22---
23 mt7996/dma.c | 39 +++++++++++++++++++++++++++++++++++++++
24 mt7996/mac.c | 29 +++++++++++++++++++++++++++++
25 mt7996/mcu.c | 4 ++--
26 mt7996/mtk_debugfs.c | 1 +
27 4 files changed, 71 insertions(+), 2 deletions(-)
28
29diff --git a/mt7996/dma.c b/mt7996/dma.c
30index a2490fa7..bbc3814d 100644
31--- a/mt7996/dma.c
32+++ b/mt7996/dma.c
33@@ -800,11 +800,23 @@ void mt7996_dma_reset(struct mt7996_dev *dev, bool force)
34 for (i = 0; i < __MT_MCUQ_MAX; i++)
35 mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[i], true);
36
37+ if (!force)
38+ dev_info(dev->mt76.dev,"%s L1 SER tx queue clean up done.",
39+ wiphy_name(dev->mt76.hw->wiphy));
40+
41 mt76_for_each_q_rx(&dev->mt76, i)
42 mt76_queue_rx_cleanup(dev, &dev->mt76.q_rx[i]);
43
44+ if (!force)
45+ dev_info(dev->mt76.dev,"%s L1 SER rx queue clean up done.",
46+ wiphy_name(dev->mt76.hw->wiphy));
47+
48 mt76_tx_status_check(&dev->mt76, true);
49
50+ if (!force)
51+ dev_info(dev->mt76.dev,"%s L1 SER mt76_tx_status_check done.",
52+ wiphy_name(dev->mt76.hw->wiphy));
53+
54 /* reset wfsys */
55 if (force)
56 mt7996_wfsys_reset(dev);
57@@ -815,7 +827,15 @@ void mt7996_dma_reset(struct mt7996_dev *dev, bool force)
58 if (mtk_wed_device_active(&dev->mt76.mmio.wed))
59 mtk_wed_device_dma_reset(&dev->mt76.mmio.wed);
60
61+ if (!force)
62+ dev_info(dev->mt76.dev,"%s L1 SER wed dma reset done.",
63+ wiphy_name(dev->mt76.hw->wiphy));
64+
65 mt7996_dma_disable(dev, force);
66+
67+ if (!force)
68+ dev_info(dev->mt76.dev,"%s L1 SER dma disable done.",
69+ wiphy_name(dev->mt76.hw->wiphy));
70 mt76_wed_dma_reset(&dev->mt76);
71
72 /* reset hw queues */
73@@ -827,9 +847,16 @@ void mt7996_dma_reset(struct mt7996_dev *dev, bool force)
74 mt76_dma_reset_tx_queue(&dev->mt76, phy3->q_tx[i]);
75 }
76
77+ if (!force)
78+ dev_info(dev->mt76.dev,"%s L1 SER dma tx queue reset done.",
79+ wiphy_name(dev->mt76.hw->wiphy));
80+
81 for (i = 0; i < __MT_MCUQ_MAX; i++)
82 mt76_queue_reset(dev, dev->mt76.q_mcu[i], true);
83
84+ if (!force)
85+ dev_info(dev->mt76.dev,"%s L1 SER mcu queue reset done.",
86+ wiphy_name(dev->mt76.hw->wiphy));
87 mt76_for_each_q_rx(&dev->mt76, i) {
88 if (mtk_wed_device_active(&dev->mt76.mmio.wed)) {
89 if (mt76_queue_is_wed_rro(&dev->mt76.q_rx[i]) ||
90@@ -843,6 +870,10 @@ void mt7996_dma_reset(struct mt7996_dev *dev, bool force)
91 mt76_queue_reset(dev, &dev->mt76.q_rx[i], true);
92 }
93
94+ if (!force)
95+ dev_info(dev->mt76.dev,"%s L1 SER rx queue reset done.",
96+ wiphy_name(dev->mt76.hw->wiphy));
97+
98 mt76_tx_status_check(&dev->mt76, true);
99
100 mt76_for_each_q_rx(&dev->mt76, i) {
101@@ -854,7 +885,15 @@ void mt7996_dma_reset(struct mt7996_dev *dev, bool force)
102 mt76_queue_rx_reset(dev, i);
103 }
104
105+ if (!force)
106+ dev_info(dev->mt76.dev,"%s L1 SER rx queue rx reset done.",
107+ wiphy_name(dev->mt76.hw->wiphy));
108+
109 mt7996_dma_enable(dev, !force);
110+
111+ if (!force)
112+ dev_info(dev->mt76.dev,"%s L1 SER dma enable done.",
113+ wiphy_name(dev->mt76.hw->wiphy));
114 }
115
116 void mt7996_dma_cleanup(struct mt7996_dev *dev)
117diff --git a/mt7996/mac.c b/mt7996/mac.c
118index 6ba07156..fc83cea1 100644
119--- a/mt7996/mac.c
120+++ b/mt7996/mac.c
121@@ -1980,6 +1980,9 @@ void mt7996_mac_reset_work(struct work_struct *work)
122 if (phy3)
123 ieee80211_stop_queues(phy3->mt76->hw);
124
125+ dev_info(dev->mt76.dev,"%s L1 SER queue stop done.",
126+ wiphy_name(dev->mt76.hw->wiphy));
127+
128 set_bit(MT76_RESET, &dev->mphy.state);
129 set_bit(MT76_MCU_RESET, &dev->mphy.state);
130 if (phy2)
131@@ -1989,6 +1992,10 @@ void mt7996_mac_reset_work(struct work_struct *work)
132 wake_up(&dev->mt76.mcu.wait);
133
134 mt76_worker_disable(&dev->mt76.tx_worker);
135+
136+ dev_info(dev->mt76.dev,"%s L1 SER disable tx_work done.",
137+ wiphy_name(dev->mt76.hw->wiphy));
138+
139 mt76_for_each_q_rx(&dev->mt76, i) {
140 if (mtk_wed_device_active(&dev->mt76.mmio.wed) &&
141 mt76_queue_is_wed_rro(&dev->mt76.q_rx[i]))
142@@ -1998,14 +2005,30 @@ void mt7996_mac_reset_work(struct work_struct *work)
143 }
144 napi_disable(&dev->mt76.tx_napi);
145
146+ dev_info(dev->mt76.dev,"%s L1 SER napi disable done.",
147+ wiphy_name(dev->mt76.hw->wiphy));
148+
149 mt76_wr(dev, MT_MCU_INT_EVENT, MT_MCU_INT_EVENT_DMA_STOPPED);
150
151+ dev_info(dev->mt76.dev,"%s L1 SER dma stop done.",
152+ wiphy_name(dev->mt76.hw->wiphy));
153+
154 if (mt7996_wait_reset_state(dev, MT_MCU_CMD_RESET_DONE)) {
155 mt7996_dma_reset(dev, false);
156
157+ dev_info(dev->mt76.dev,"%s L1 SER dma reset done.",
158+ wiphy_name(dev->mt76.hw->wiphy));
159+
160 mt7996_tx_token_put(dev);
161+
162+ dev_info(dev->mt76.dev,"%s L1 SER token put done.",
163+ wiphy_name(dev->mt76.hw->wiphy));
164+
165 idr_init(&dev->mt76.token);
166
167+ dev_info(dev->mt76.dev,"%s L1 SER idr init done.",
168+ wiphy_name(dev->mt76.hw->wiphy));
169+
170 mt76_wr(dev, MT_MCU_INT_EVENT, MT_MCU_INT_EVENT_DMA_INIT);
171 mt7996_wait_reset_state(dev, MT_MCU_CMD_RECOVERY_DONE);
172 }
173@@ -2016,6 +2039,9 @@ void mt7996_mac_reset_work(struct work_struct *work)
174 /* enable DMA Tx/Tx and interrupt */
175 mt7996_dma_start(dev, false, false);
176
177+ dev_info(dev->mt76.dev,"%s L1 SER dma start done.",
178+ wiphy_name(dev->mt76.hw->wiphy));
179+
180 if (mtk_wed_device_active(&dev->mt76.mmio.wed)) {
181 u32 wed_irq_mask = MT_INT_RRO_RX_DONE | MT_INT_TX_DONE_BAND2 |
182 dev->mt76.mmio.irqmask;
183@@ -2042,6 +2068,9 @@ void mt7996_mac_reset_work(struct work_struct *work)
184 MT_INT_TX_RX_DONE_EXT);
185 }
186
187+ dev_info(dev->mt76.dev,"%s L1 SER wed start done.",
188+ wiphy_name(dev->mt76.hw->wiphy));
189+
190 clear_bit(MT76_MCU_RESET, &dev->mphy.state);
191 clear_bit(MT76_RESET, &dev->mphy.state);
192 if (phy2)
193diff --git a/mt7996/mcu.c b/mt7996/mcu.c
194index 1cc08a30..a88beb36 100644
195--- a/mt7996/mcu.c
196+++ b/mt7996/mcu.c
197@@ -3850,11 +3850,11 @@ int mt7996_mcu_init_firmware(struct mt7996_dev *dev)
198 return ret;
199
200 set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
201- ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0);
202+ ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 1);
203 if (ret)
204 return ret;
205
206- ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0);
207+ ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 1);
208 if (ret)
209 return ret;
210
211diff --git a/mt7996/mtk_debugfs.c b/mt7996/mtk_debugfs.c
212index c7f5b56e..0820e0d0 100644
213--- a/mt7996/mtk_debugfs.c
214+++ b/mt7996/mtk_debugfs.c
215@@ -4298,6 +4298,7 @@ int mt7996_mtk_init_debugfs(struct mt7996_phy *phy, struct dentry *dir)
216 debugfs_create_file("red", 0200, dir, dev, &fops_red_config);
217 debugfs_create_file("vow_drr_dbg", 0200, dir, dev, &fops_vow_drr_dbg);
218
219+ dev->dbg.sku_disable = true; /* For SQC */
220 debugfs_create_u8("sku_disable", 0600, dir, &dev->dbg.sku_disable);
221 debugfs_create_file("scs_enable", 0200, dir, phy, &fops_scs_enable);
222
223--
2242.18.0
225