| From 1ee4eb8cb63f275f929b3f7aabbdb0df66ed1f2f Mon Sep 17 00:00:00 2001 |
| From: MeiChia Chiu <meichia.chiu@mediatek.com> |
| Date: Fri, 9 Jun 2023 14:11:30 +0800 |
| Subject: [PATCH 110/223] mtk: mt76: temp changes for SQC period |
| |
| mtk: wifi: mt76: mt7996: For SQC test Disable single sku |
| |
| During SQC testing, disable single sku to prevent max power from |
| being restricted by regdb setting |
| |
| NOTE: This patch is only for apply during SQC and will be |
| removed after SQC. |
| |
| mtk: wifi: mt76: mt7996: Enable WM/WA UART log during the SQC period |
| |
| Enable WM/WA UART log by default during the SQC period |
| |
| mtk: wifi: mt76: mt7996: add SER flow log for debug during the SQC period. |
| |
| Change-Id: I052e7284b3f6adfa4414e64445fa1f24f92fc8a7 |
| Change-Id: If68052b181c63d989ce3173bb5b19168e662e540 |
| Signed-off-by: MeiChia Chiu <meichia.chiu@mediatek.com> |
| Signed-off-by: mtk27745 <rex.lu@mediatek.com> |
| --- |
| mt7996/dma.c | 39 +++++++++++++++++++++++++++++++++++++++ |
| mt7996/mac.c | 29 +++++++++++++++++++++++++++++ |
| mt7996/mcu.c | 4 ++-- |
| mt7996/mtk_debugfs.c | 1 + |
| 4 files changed, 71 insertions(+), 2 deletions(-) |
| |
| diff --git a/mt7996/dma.c b/mt7996/dma.c |
| index a2490fa7..bbc3814d 100644 |
| --- a/mt7996/dma.c |
| +++ b/mt7996/dma.c |
| @@ -800,11 +800,23 @@ void mt7996_dma_reset(struct mt7996_dev *dev, bool force) |
| for (i = 0; i < __MT_MCUQ_MAX; i++) |
| mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[i], true); |
| |
| + if (!force) |
| + dev_info(dev->mt76.dev,"%s L1 SER tx queue clean up done.", |
| + wiphy_name(dev->mt76.hw->wiphy)); |
| + |
| mt76_for_each_q_rx(&dev->mt76, i) |
| mt76_queue_rx_cleanup(dev, &dev->mt76.q_rx[i]); |
| |
| + if (!force) |
| + dev_info(dev->mt76.dev,"%s L1 SER rx queue clean up done.", |
| + wiphy_name(dev->mt76.hw->wiphy)); |
| + |
| mt76_tx_status_check(&dev->mt76, true); |
| |
| + if (!force) |
| + dev_info(dev->mt76.dev,"%s L1 SER mt76_tx_status_check done.", |
| + wiphy_name(dev->mt76.hw->wiphy)); |
| + |
| /* reset wfsys */ |
| if (force) |
| mt7996_wfsys_reset(dev); |
| @@ -815,7 +827,15 @@ void mt7996_dma_reset(struct mt7996_dev *dev, bool force) |
| if (mtk_wed_device_active(&dev->mt76.mmio.wed)) |
| mtk_wed_device_dma_reset(&dev->mt76.mmio.wed); |
| |
| + if (!force) |
| + dev_info(dev->mt76.dev,"%s L1 SER wed dma reset done.", |
| + wiphy_name(dev->mt76.hw->wiphy)); |
| + |
| mt7996_dma_disable(dev, force); |
| + |
| + if (!force) |
| + dev_info(dev->mt76.dev,"%s L1 SER dma disable done.", |
| + wiphy_name(dev->mt76.hw->wiphy)); |
| mt76_wed_dma_reset(&dev->mt76); |
| |
| /* reset hw queues */ |
| @@ -827,9 +847,16 @@ void mt7996_dma_reset(struct mt7996_dev *dev, bool force) |
| mt76_dma_reset_tx_queue(&dev->mt76, phy3->q_tx[i]); |
| } |
| |
| + if (!force) |
| + dev_info(dev->mt76.dev,"%s L1 SER dma tx queue reset done.", |
| + wiphy_name(dev->mt76.hw->wiphy)); |
| + |
| for (i = 0; i < __MT_MCUQ_MAX; i++) |
| mt76_queue_reset(dev, dev->mt76.q_mcu[i], true); |
| |
| + if (!force) |
| + dev_info(dev->mt76.dev,"%s L1 SER mcu queue reset done.", |
| + wiphy_name(dev->mt76.hw->wiphy)); |
| mt76_for_each_q_rx(&dev->mt76, i) { |
| if (mtk_wed_device_active(&dev->mt76.mmio.wed)) { |
| if (mt76_queue_is_wed_rro(&dev->mt76.q_rx[i]) || |
| @@ -843,6 +870,10 @@ void mt7996_dma_reset(struct mt7996_dev *dev, bool force) |
| mt76_queue_reset(dev, &dev->mt76.q_rx[i], true); |
| } |
| |
| + if (!force) |
| + dev_info(dev->mt76.dev,"%s L1 SER rx queue reset done.", |
| + wiphy_name(dev->mt76.hw->wiphy)); |
| + |
| mt76_tx_status_check(&dev->mt76, true); |
| |
| mt76_for_each_q_rx(&dev->mt76, i) { |
| @@ -854,7 +885,15 @@ void mt7996_dma_reset(struct mt7996_dev *dev, bool force) |
| mt76_queue_rx_reset(dev, i); |
| } |
| |
| + if (!force) |
| + dev_info(dev->mt76.dev,"%s L1 SER rx queue rx reset done.", |
| + wiphy_name(dev->mt76.hw->wiphy)); |
| + |
| mt7996_dma_enable(dev, !force); |
| + |
| + if (!force) |
| + dev_info(dev->mt76.dev,"%s L1 SER dma enable done.", |
| + wiphy_name(dev->mt76.hw->wiphy)); |
| } |
| |
| void mt7996_dma_cleanup(struct mt7996_dev *dev) |
| diff --git a/mt7996/mac.c b/mt7996/mac.c |
| index 1c0d3676..ac61869d 100644 |
| --- a/mt7996/mac.c |
| +++ b/mt7996/mac.c |
| @@ -1992,6 +1992,9 @@ void mt7996_mac_reset_work(struct work_struct *work) |
| if (phy3) |
| ieee80211_stop_queues(phy3->mt76->hw); |
| |
| + dev_info(dev->mt76.dev,"%s L1 SER queue stop done.", |
| + wiphy_name(dev->mt76.hw->wiphy)); |
| + |
| set_bit(MT76_RESET, &dev->mphy.state); |
| set_bit(MT76_MCU_RESET, &dev->mphy.state); |
| if (phy2) |
| @@ -2001,6 +2004,10 @@ void mt7996_mac_reset_work(struct work_struct *work) |
| wake_up(&dev->mt76.mcu.wait); |
| |
| mt76_worker_disable(&dev->mt76.tx_worker); |
| + |
| + dev_info(dev->mt76.dev,"%s L1 SER disable tx_work done.", |
| + wiphy_name(dev->mt76.hw->wiphy)); |
| + |
| mt76_for_each_q_rx(&dev->mt76, i) { |
| if (mtk_wed_device_active(&dev->mt76.mmio.wed) && |
| mt76_queue_is_wed_rro(&dev->mt76.q_rx[i])) |
| @@ -2010,14 +2017,30 @@ void mt7996_mac_reset_work(struct work_struct *work) |
| } |
| napi_disable(&dev->mt76.tx_napi); |
| |
| + dev_info(dev->mt76.dev,"%s L1 SER napi disable done.", |
| + wiphy_name(dev->mt76.hw->wiphy)); |
| + |
| mt76_wr(dev, MT_MCU_INT_EVENT, MT_MCU_INT_EVENT_DMA_STOPPED); |
| |
| + dev_info(dev->mt76.dev,"%s L1 SER dma stop done.", |
| + wiphy_name(dev->mt76.hw->wiphy)); |
| + |
| if (mt7996_wait_reset_state(dev, MT_MCU_CMD_RESET_DONE)) { |
| mt7996_dma_reset(dev, false); |
| |
| + dev_info(dev->mt76.dev,"%s L1 SER dma reset done.", |
| + wiphy_name(dev->mt76.hw->wiphy)); |
| + |
| mt7996_tx_token_put(dev); |
| + |
| + dev_info(dev->mt76.dev,"%s L1 SER token put done.", |
| + wiphy_name(dev->mt76.hw->wiphy)); |
| + |
| idr_init(&dev->mt76.token); |
| |
| + dev_info(dev->mt76.dev,"%s L1 SER idr init done.", |
| + wiphy_name(dev->mt76.hw->wiphy)); |
| + |
| mt76_wr(dev, MT_MCU_INT_EVENT, MT_MCU_INT_EVENT_DMA_INIT); |
| mt7996_wait_reset_state(dev, MT_MCU_CMD_RECOVERY_DONE); |
| } |
| @@ -2028,6 +2051,9 @@ void mt7996_mac_reset_work(struct work_struct *work) |
| /* enable DMA Tx/Tx and interrupt */ |
| mt7996_dma_start(dev, false, false); |
| |
| + dev_info(dev->mt76.dev,"%s L1 SER dma start done.", |
| + wiphy_name(dev->mt76.hw->wiphy)); |
| + |
| if (mtk_wed_device_active(&dev->mt76.mmio.wed)) { |
| u32 wed_irq_mask = MT_INT_RRO_RX_DONE | MT_INT_TX_DONE_BAND2 | |
| dev->mt76.mmio.irqmask; |
| @@ -2054,6 +2080,9 @@ void mt7996_mac_reset_work(struct work_struct *work) |
| MT_INT_TX_RX_DONE_EXT); |
| } |
| |
| + dev_info(dev->mt76.dev,"%s L1 SER wed start done.", |
| + wiphy_name(dev->mt76.hw->wiphy)); |
| + |
| clear_bit(MT76_MCU_RESET, &dev->mphy.state); |
| clear_bit(MT76_RESET, &dev->mphy.state); |
| if (phy2) |
| diff --git a/mt7996/mcu.c b/mt7996/mcu.c |
| index d1aa19cb..d56630e9 100644 |
| --- a/mt7996/mcu.c |
| +++ b/mt7996/mcu.c |
| @@ -3857,11 +3857,11 @@ int mt7996_mcu_init_firmware(struct mt7996_dev *dev) |
| return ret; |
| |
| set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); |
| - ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0); |
| + ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 1); |
| if (ret) |
| return ret; |
| |
| - ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 0); |
| + ret = mt7996_mcu_fw_log_2_host(dev, MCU_FW_LOG_WA, 1); |
| if (ret) |
| return ret; |
| |
| diff --git a/mt7996/mtk_debugfs.c b/mt7996/mtk_debugfs.c |
| index f9c5b238..0cf48193 100644 |
| --- a/mt7996/mtk_debugfs.c |
| +++ b/mt7996/mtk_debugfs.c |
| @@ -4297,6 +4297,7 @@ int mt7996_mtk_init_debugfs(struct mt7996_phy *phy, struct dentry *dir) |
| debugfs_create_file("red", 0200, dir, dev, &fops_red_config); |
| debugfs_create_file("vow_drr_dbg", 0200, dir, dev, &fops_vow_drr_dbg); |
| |
| + dev->dbg.sku_disable = true; /* For SQC */ |
| debugfs_create_u8("sku_disable", 0600, dir, &dev->dbg.sku_disable); |
| debugfs_create_file("scs_enable", 0200, dir, phy, &fops_scs_enable); |
| |
| -- |
| 2.45.2 |
| |