1. eee28e7 chore: update to use Arm word across TF-A by Govindraj Raja · 12 months ago
  2. 619d6fb feat(ti): set snoop-delayed exclusive handling on A72 cores by Andrew Davis · 1 year, 6 months ago
  3. b3fd376 feat(ti): set L2 cache ECC and and parity on A72 cores by Andrew Davis · 1 year, 6 months ago
  4. e7d7d11 feat(ti): set L2 cache data ram latency on A72 cores to 4 cycles by Andrew Davis · 1 year, 6 months ago
  5. 5e79cfe cpus: Add casts to all definitions in CPU headers by Antonio Nino Diaz · 5 years ago
  6. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
  7. 5eb8837 Standardise header guards across codebase by Antonio Nino Diaz · 6 years ago
  8. dc9fab1 Remove all other deprecated interfaces and files by Antonio Nino Diaz · 6 years ago
  9. 4a284a4 aarch32: Implement static workaround for CVE-2018-3639 by Dimitris Papastamos · 6 years ago
  10. c3b4ca1 Cortex-A72: Implement workaround for erratum 859971 by Eleanor Bonnici · 7 years ago
  11. 41b61be CPU: Correct names of implementation-defined aux regs by Eleanor Bonnici · 7 years ago
  12. b83e42b CPU: Make shifted constants unsigned by Eleanor Bonnici · 7 years ago
  13. ac838c5 aarch32: Fix L2CTRL definition for Cortex A57 and A72 by Dimitris Papastamos · 7 years ago
  14. 1384a16 Unique names for defines in the CPU libraries by Varun Wadekar · 7 years ago
  15. fa3cf0b Use SPDX license identifiers by dp-arm · 7 years ago
  16. a9f776c AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor by Yatharth Kochar · 8 years ago