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git01.mediatek.com / filogic / atf / e7ff9cbae74344da43a9c4c9bc15bb2c547706c2 / drivers / arm / gic
  1. 2f13d6c TF-A GICv3 driver: Separate GICD and GICR accessor functions by Alexei Fedorov · Fri Feb 21 10:17:26 2020 +0000
  2. 87675d4 Coverity: remove unnecessary header file includes by Zelalem · Mon Feb 03 14:56:42 2020 -0600
  3. 1c819c3 Use correct type when reading SCR register by Louis Mayencourt · Fri Jan 24 13:30:28 2020 +0000
  4. 0ac3941 GIC-600: Fix include ordering according to the coding style by Max Shvetsov · Tue Nov 19 11:01:26 2019 +0000
  5. 88fba67 GIC-600: Fix power up sequence by Alexei Fedorov · Wed Jul 31 13:24:22 2019 +0100
  6. ad3fc76 gic/gic600: add support for multichip configuration by Vijayenthiran Subramaniam · Mon Sep 16 17:05:08 2019 +0530
  7. 50a934e Merge "GICv3 driver: Fix support for full SPI range" into integration by Soby Mathew · Fri Sep 27 09:49:05 2019 +0000
  8. 5fd1f9d GICv3: Enable multi socket GIC redistributor frame discovery by Madhukar Pappireddy · Wed May 15 18:25:41 2019 -0500
  9. 68f2688 GICv3 driver: Fix support for full SPI range by Alexei Fedorov · Fri Sep 13 15:47:13 2019 +0100
  10. 8e0ef0f Switch AARCH32/AARCH64 to __aarch64__ by Julius Werner · Tue Jul 09 14:02:43 2019 -0700
  11. 05403eb Prevent pending G1S interrupt become G0 interrupt by James kung · Fri May 31 15:40:05 2019 +0800
  12. 56b68ad Minor changes to documentation and comments by Antonio Nino Diaz · Thu Feb 28 13:35:21 2019 +0000
  13. d1463bd GICv3: Allow probe for fewer GICR interfaces than exposed by the frame by Soby Mathew · Thu Jan 17 14:57:54 2019 +0000
  14. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  15. 5eb8837 Standardise header guards across codebase by Antonio Nino Diaz · Thu Nov 08 10:20:19 2018 +0000
  16. 844b487 Mark GICV3, CCI and CCN boot time code as init by Daniel Boulby · Tue Sep 18 13:36:39 2018 +0100
  17. 29b9f5b gic: Remove deprecated driver and interfaces by Antonio Nino Diaz · Mon Sep 24 17:23:24 2018 +0100
  18. f5a25ad Merge pull request #1540 from MISL-EBU-System-SW/marvell-updates-18.09 by Soby Mathew · Tue Sep 04 03:35:54 2018 +0100
  19. dd568dd gicv2: enable configuring IRQ trigger type by Marcin Wojtas · Wed Mar 21 09:55:47 2018 +0100
  20. 25a17a2 GIC: Fix build error by Andrew F. Davis · Thu Aug 30 14:30:54 2018 -0500
  21. bab39e8 gic v3: Fix width of types of helper functions by Antonio Nino Diaz · Tue Aug 21 10:03:07 2018 +0100
  22. ca994e7 gic: Fix types by Antonio Nino Diaz · Tue Aug 21 10:02:33 2018 +0100
  23. 2e59071 gic: Fix definitions by Antonio Nino Diaz · Fri Aug 24 11:46:33 2018 +0100
  24. dd4e59e gic v3: Turn macros into static inline functions by Antonio Nino Diaz · Mon Aug 13 15:29:29 2018 +0100
  25. 4d23a64 GIC: Do not flush cache when unneeded by Andrew F. Davis · Thu Jul 26 13:50:14 2018 -0500
  26. fef5d2d Fix MISRA Rule 5.3 Part 2 by Daniel Boulby · Fri May 04 14:04:07 2018 +0100
  27. 4e83abb Fix MISRA Rule 5.1 by Daniel Boulby · Tue May 01 15:15:34 2018 +0100
  28. 692d7ca Merge pull request #1340 from Andre-ARM/sec-irqs-fixes by Dimitris Papastamos · Thu May 17 14:35:34 2018 +0100
  29. 5ac9d96 Fix pointer type mismatch of handlers by Masahiro Yamada · Thu Apr 19 01:18:48 2018 +0900
  30. e8e94e8 gicv3: Fix support for systems without secure interrupts by Andre Przywara · Thu Nov 09 12:08:00 2017 -0600
  31. 694f81f gicv2: Fix support for systems without secure interrupts by Samuel Holland · Thu Nov 09 12:07:53 2017 -0600
  32. 2257d6d Merge pull request #1313 from jonathanwright-ARM/jw/MISRA-switch-statements by Dimitris Papastamos · Thu Mar 29 13:20:05 2018 +0100
  33. 39b4221 drivers: fix switch statements to comply with MISRA rules by Jonathan Wright · Tue Mar 13 15:24:29 2018 +0000
  34. b6982c0 GIC: Fix setting interrupt configuration by Jeenu Viswambharan · Thu Mar 22 08:57:52 2018 +0000
  35. 4d408b5 Emit warnings when using deprecated GIC init by Dan Handley · Thu Mar 01 16:00:15 2018 +0000
  36. 2ca18d9 Fix MISRA rule 8.4 Part 1 by Roberto Vargas · Mon Feb 12 12:36:17 2018 +0000
  37. 0571270 Fix MISRA rule 8.4 in common code by Roberto Vargas · Mon Feb 12 12:36:17 2018 +0000
  38. 45bcb6e GICv3: Fix Dist restore for when the GIC is reset by Derek Basehore · Tue Jan 23 15:49:17 2018 -0800
  39. 42ef554 Merge pull request #1145 from etienne-lms/rfc-armv7-2 by davidcunado-arm · Thu Nov 23 23:41:24 2017 +0000
  40. 88d8f45 GIC: Fix Group 0 enabling by Jeenu Viswambharan · Tue Nov 07 08:38:23 2017 +0000
  41. fbf5bda GICv2: Fix populating PE target data by Jeenu Viswambharan · Tue Nov 07 16:10:19 2017 +0000
  42. 0a8c353 ARMv7: GICv2 driver can manage GICv1 with security extension by Etienne Carriere · Sun Nov 05 22:57:38 2017 +0100
  43. aeb267c GIC: Allow specifying interrupt properties by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  44. 4684bce GIC: Add helpers to set interrupt configuration by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  45. 6250507 GIC: Add API to set priority mask by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  46. eb1c12c GIC: Add API to set/clear interrupt pending by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  47. dce70b3 GIC: Add API to set interrupt routing by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  48. ab14e9b GIC: Add API to raise secure SGI by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  49. c06f05c GIC: Add APIs to set interrupt type and query support by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  50. 447b89d GIC: Add API to set interrupt priority by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  51. 0fcdfff GIC: Add APIs to enable and disable interrupt by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  52. 24e7029 GIC: Add API to get interrupt active status by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  53. 393fdd9 GICv2: Add driver API to set PE target mask by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  54. b1e957e GIC: Add API to get running priority by Jeenu Viswambharan · Fri Sep 22 08:32:09 2017 +0100
  55. b333d89 Fix assertion in GIC ITS helper by Soby Mathew · Fri Oct 06 17:59:03 2017 +0100
  56. f6f1a32 GICv3: ITS architectural save and restore helpers by Soby Mathew · Tue Jul 18 16:12:45 2017 +0100
  57. 327548c GICv3: add functions for save and restore by Soby Mathew · Thu Jul 13 15:19:51 2017 +0100
  58. a1b1da8 GICv3: turn some macros into inline functions by Douglas Raillard · Wed Jul 26 13:51:00 2017 +0100
  59. 1bd2d74 GICv3: Fix gic600.c indentation by Douglas Raillard · Thu Aug 03 15:59:49 2017 +0100
  60. d7a901e Introduce ARM GIC-600 driver by Jeenu Viswambharan · Tue Dec 06 16:15:22 2016 +0000
  61. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  62. 7264513 Flush the GIC driver data after init by Soby Mathew · Tue Feb 14 10:11:52 2017 +0000
  63. 76647d5 GICv3: Introduce power management APIs for Redistributor by Jeenu Viswambharan · Fri Dec 09 11:03:15 2016 +0000
  64. 3f00a89 GICv3: Allow either G1S or G0 interrupts to be configured by Yatharth Kochar · Tue Sep 06 11:48:05 2016 +0100
  65. 14ce777 Merge pull request #678 from soby-mathew/sm/PSCI_AArch32 by danh-arm · Thu Aug 18 11:38:19 2016 +0100
  66. 869e3db gicv3: disable Group1 NonSecure interrupts during core powerdown by Sudeep Holla · Thu Aug 04 16:14:50 2016 +0100
  67. d645232 AArch32: Enable GIC and TZC support by Soby Mathew · Thu May 05 13:59:07 2016 +0100
  68. aaf71c8 GICv3: Fix the GICD_IROUTER offset by Soby Mathew · Tue Jul 26 17:46:56 2016 +0100
  69. a0fedc4 Rework type usage in Trusted Firmware by Soby Mathew · Thu Jun 16 14:52:04 2016 +0100
  70. 4f96838 GIC: Ensure SGIs and PPIs are Group0 before setup by Soby Mathew · Tue Jun 07 17:06:27 2016 +0100
  71. b3a0a7b Add support for %p in tf_printf() by Antonio Nino Diaz · Tue Feb 02 12:03:38 2016 +0000
  72. 50f6fe4 Move private APIs in gic_common.h to a private header by Soby Mathew · Mon Feb 01 17:59:22 2016 +0000
  73. 421259e Fix GIC_IPRIORITYR setting in new drivers by Soby Mathew · Fri Jan 15 14:20:57 2016 +0000
  74. 73f9299 Fix race in GIC IPRIORITY and ITARGET accessors by Soby Mathew · Fri Jan 15 14:05:37 2016 +0000
  75. 5c5c36b Rename GICv3 interrupt group macros by Soby Mathew · Thu Dec 03 14:12:54 2015 +0000
  76. e063d3c Add ARM GICv2 driver by Soby Mathew · Wed Oct 07 09:45:27 2015 +0100
  77. 92712a5 Add ARM GICv3 driver without support for legacy operation by Achin Gupta · Thu Sep 03 14:18:02 2015 +0100
  78. 29f7cbc Remove EL2/EL1 GICv3 register updates by Vikram Kanigiri · Fri Jun 26 10:13:22 2015 +0100
  79. 7f1f062 Use uintptr_t as base address type in ARM driver APIs by Juan Castillo · Tue Sep 09 09:49:23 2014 +0100
  80. 966b952 Fix reporting of interrupt ID in ARM GIC driver by Achin Gupta · Mon May 18 10:56:47 2015 +0100
  81. 897333d Set group status of PPIs and SGIs correctly on GICv3 systems by Achin Gupta · Mon Mar 09 21:54:40 2015 +0000
  82. 8231295 Improvements to ARM GIC driver by Juan Castillo · Mon Oct 20 12:27:28 2014 +0100
  83. f558cac Rework incorrect use of assert() and panic() in codebase by Juan Castillo · Thu Jun 05 09:45:36 2014 +0100
  84. fb42b12 Refactor fvp gic code to be a generic driver by Dan Handley · Fri Jun 20 09:43:15 2014 +0100
  85. 3f78dc3 Make system register functions inline assembly by Andrew Thoelke · Mon Jun 02 15:44:43 2014 +0100
  86. 191e86e Introduce interrupt registration framework in BL3-1 by Achin Gupta · Fri May 09 10:03:15 2014 +0100
  87. 969bdb2 Fix C accessors to GIC distributor registers with set/clear semantics by Juan Castillo · Mon Apr 28 12:48:40 2014 +0100
  88. 42e75a7 Correct usage of data and instruction barriers by Andrew Thoelke · Mon Apr 28 12:28:39 2014 +0100
  89. 2bd4ef2 Reduce deep nesting of header files by Dan Handley · Wed Apr 09 13:14:54 2014 +0100
  90. 930ee2e Refactor GIC header files by Dan Handley · Thu Apr 17 17:48:52 2014 +0100
  91. a70615f Move include and source files to logical locations by Dan Handley · Wed Apr 09 12:48:25 2014 +0100