| commit | b6982c0e6523677c8cceb75e66e5b79500492abe | [log] [tgz] |
|---|---|---|
| author | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | Thu Mar 22 08:57:52 2018 +0000 |
| committer | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | Mon Mar 26 09:45:48 2018 +0100 |
| tree | a91ef44ab2642507d6ffe1d39fd4fb5a2a1dd2cb | |
| parent | 388cf1e7efdefabb8bcf4f30a2aa22758b009947 [diff] |
GIC: Fix setting interrupt configuration
- Interrupt configuration is a 2-bit field, so the field shift has to
be double that of the bit number.
- Interrupt configuration (level- or edge-trigger) is specified in the
MSB of the field, not LSB.
Fixes applied to both GICv2 and GICv3 drivers.
Fixes ARM-software/tf-issues#570
Change-Id: Ia6ae6ed9ba9fb0e3eb0f921a833af48e365ba359
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>