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cab6fa632c6223b518afd053aa41b9062927f4fb
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cpus
4498b15
DSU: Implement workaround for errata 798953
by Louis Mayencourt
· Tue Apr 09 16:29:01 2019 +0100
254f6f0
DSU: Small fix and reformat on errata framework
by Louis Mayencourt
· Tue Apr 09 14:11:06 2019 +0100
8a06127
Cortex-A35: Implement workaround for errata 855472
by Louis Mayencourt
· Fri Apr 05 16:25:25 2019 +0100
26d1676
Cortex A9:errata 794073 workaround
by Joel Hutton
· Wed Apr 10 12:52:52 2019 +0100
4800943
Add support for Cortex-A76AE CPU
by Alexei Fedorov
· Thu Apr 04 16:26:34 2019 +0100
2110c5d
Merge pull request #1887 from ambroise-arm/av/a76-cve
by Dimitris Papastamos
· Wed Mar 20 11:18:20 2019 +0000
32cbbf6
Merge pull request #1888 from jts-arm/zeus
by Dimitris Papastamos
· Fri Mar 15 15:28:17 2019 +0000
6deaf9c
Introduce preliminary support for Neoverse Zeus
by John Tsichritzis
· Mon Oct 08 17:09:43 2018 +0100
1f9ff49
Apply variant 4 mitigation for Neoverse N1
by John Tsichritzis
· Mon Mar 04 16:41:26 2019 +0000
8c6fdf8
Cortex-A76: Optimize CVE_2018_3639 workaround
by Ambroise Vincent
· Thu Mar 07 14:33:02 2019 +0000
6dbbe43
Cortex-A76: fix spelling
by Ambroise Vincent
· Thu Mar 07 14:31:33 2019 +0000
fa5c951
Cortex-A17: Implement workaround for errata 852423
by Ambroise Vincent
· Mon Mar 04 13:20:56 2019 +0000
8cf9eef
Cortex-A17: Implement workaround for errata 852421
by Ambroise Vincent
· Thu Feb 28 16:23:53 2019 +0000
68b3812
Cortex-A15: Implement workaround for errata 827671
by Ambroise Vincent
· Tue Mar 05 09:54:21 2019 +0000
d4a51eb
Cortex-A15: Implement workaround for errata 816470
by Ambroise Vincent
· Mon Mar 04 16:56:26 2019 +0000
dbb0db6
Fixup register handling in aarch32 reset_handler
by Heiko Stuebner
· Wed Mar 06 00:29:13 2019 +0100
fb6f2fc
Merge pull request #1751 from vwadekar/tegra-scatter-file-support
by Antonio Niño Díaz
· Fri Mar 01 11:23:58 2019 +0000
cd5a55e
Merge pull request #1849 from loumay-arm/lm/a73_errata
by Antonio Niño Díaz
· Fri Mar 01 11:23:48 2019 +0000
f6505a7
Merge pull request #1845 from ambroise-arm/av/errata
by Antonio Niño Díaz
· Fri Mar 01 09:17:27 2019 +0000
d69722c
Cortex-A73: Implement workaround for errata 852427
by Louis Mayencourt
· Wed Feb 27 14:24:16 2019 +0000
f5fdfbc
Cortex-A53: Workarounds for 819472, 824069 and 827319
by Ambroise Vincent
· Thu Feb 21 14:16:24 2019 +0000
aa2c029
Cortex-A57: Implement workaround for erratum 817169
by Ambroise Vincent
· Thu Feb 21 16:35:49 2019 +0000
1b0db76
Cortex-A57: Implement workaround for erratum 814670
by Ambroise Vincent
· Thu Feb 21 16:35:07 2019 +0000
a1d6446
Cortex-A55: Implement workaround for erratum 903758
by Ambroise Vincent
· Thu Feb 21 16:29:50 2019 +0000
dd961f7
Cortex-A55: Implement workaround for erratum 846532
by Ambroise Vincent
· Thu Feb 21 16:29:16 2019 +0000
6a77f05
Cortex-A55: Implement workaround for erratum 798797
by Ambroise Vincent
· Thu Feb 21 16:27:34 2019 +0000
6f31960
Cortex-A55: Implement workaround for erratum 778703
by Ambroise Vincent
· Thu Feb 21 16:25:37 2019 +0000
7927fa0
Cortex-A55: Implement workaround for erratum 768277
by Ambroise Vincent
· Thu Feb 21 16:20:43 2019 +0000
4d034c5
Tegra: Support for scatterfile for the BL31 image
by Varun Wadekar
· Fri Jan 11 14:47:48 2019 -0800
59fa218
Add workaround for errata 1073348 for Cortex-A76
by Louis Mayencourt
· Mon Feb 25 15:17:44 2019 +0000
adda9d4
Add workaround for errata 1220197 for Cortex-A76
by Louis Mayencourt
· Mon Feb 25 11:37:38 2019 +0000
0992447
Add workaround for errata 1130799 for Cortex-A76
by Louis Mayencourt
· Thu Feb 21 17:35:07 2019 +0000
8d86870
Add workaround for errata 790748 for Cortex-A75
by Louis Mayencourt
· Mon Feb 25 14:57:57 2019 +0000
78a0aed
Add workaround for errata 764081 of Cortex-A75
by Louis Mayencourt
· Wed Feb 20 12:11:41 2019 +0000
4405de6
Add workaround for errata 855423 of Cortex-A73
by Louis Mayencourt
· Thu Feb 21 16:38:16 2019 +0000
16e6d9f
Rename Cortex-Helios to Neoverse E1
by John Tsichritzis
· Tue Feb 19 14:01:55 2019 +0000
3d417ac
Rename Cortex-Helios filenames to Neoverse E1
by John Tsichritzis
· Tue Feb 19 13:54:21 2019 +0000
56369c1
Rename Cortex-Ares to Neoverse N1
by John Tsichritzis
· Tue Feb 19 13:49:06 2019 +0000
97ff6d0
Rename Cortex-Ares filenames to Neoverse N1
by John Tsichritzis
· Tue Feb 19 13:48:44 2019 +0000
e0f9063
Sanitise includes across codebase
by Antonio Nino Diaz
· Fri Dec 14 00:18:21 2018 +0000
aa00aff
AArch64: Use SSBS for CVE_2018_3639 mitigation
by Jeenu Viswambharan
· Thu Nov 15 11:38:03 2018 +0000
9fe40fd
Fix MISRA defects in workaround and errata framework
by Antonio Nino Diaz
· Thu Oct 25 17:11:02 2018 +0100
033b4bb
Fix MISRA defects in extension libs
by Antonio Nino Diaz
· Thu Oct 25 16:52:26 2018 +0100
0980dce
Make errata reporting mandatory for CPU files
by Soby Mathew
· Mon Sep 17 04:34:35 2018 +0100
7c461d7
ti: k3: common: Do not disable cache on TI K3 core powerdown
by Andrew F. Davis
· Fri Oct 12 15:37:04 2018 -0500
5e7e4a7
Fix the Cortex-ares errata reporting function name
by Soby Mathew
· Mon Sep 10 11:14:01 2018 +0100
cd38e6e
cpus: denver: Implement static workaround for CVE-2018-3639
by Varun Wadekar
· Tue Aug 28 09:11:30 2018 -0700
2b91412
cpus: denver: reset power state to 'C1' on boot
by Varun Wadekar
· Mon Jun 25 11:36:47 2018 -0700
007a206
denver: use plat_my_core_pos() to get core position
by Varun Wadekar
· Tue Feb 27 18:30:31 2018 -0800
13110b4
DSU erratum 936184 workaround: bug fix
by John Tsichritzis
· Wed Aug 22 10:40:33 2018 +0100
268e699
Merge pull request #1388 from vwadekar/report-cve-2017-5715
by Dimitris Papastamos
· Mon Aug 20 14:57:39 2018 +0100
bc242fa
cpus: denver: report CVE_2017_5715 mitigation to higher layers
by Varun Wadekar
· Fri Jul 06 13:39:52 2018 -0700
4daa1de
DSU erratum 936184 workaround
by John Tsichritzis
· Mon Jul 23 09:11:59 2018 +0100
a7c4687
Add initial CPU support for Cortex-Helios
by Joel Hutton
· Wed Jan 10 16:06:07 2018 +0000
9463cae
Add initial CPU support for Cortex-Deimos
by Joel Hutton
· Fri May 04 15:09:47 2018 +0100
95f30ab
Add end_vector_entry assembler macro
by Roberto Vargas
· Tue Apr 17 11:31:43 2018 +0100
bb0aa39
cpulib: Add ISBs or comment why they are unneeded
by Dimitris Papastamos
· Thu Jun 07 13:20:19 2018 +0100
14f7005
Fix MISRA Rule 5.7 Part 1
by Daniel Boulby
· Thu May 03 10:59:09 2018 +0100
8c18f6a
Merge pull request #1397 from dp-arm/dp/cortex-a76
by Dimitris Papastamos
· Fri Jun 08 14:01:38 2018 +0100
312e17e
Implement dynamic mitigation for CVE-2018-3639 on Cortex-A76
by Dimitris Papastamos
· Wed May 16 09:59:54 2018 +0100
7ca21db
Implement Cortex-Ares 1043202 erratum workaround
by Dimitris Papastamos
· Mon Mar 26 16:46:01 2018 +0100
89736dd
Add AMU support for Cortex-Ares
by Dimitris Papastamos
· Tue Feb 13 11:28:02 2018 +0000
ea84d6b
Add support for Cortex-Ares and Cortex-A76 CPUs
by Isla Mitchell
· Thu Aug 03 16:04:46 2017 +0100
6694633
Fast path SMCCC_ARCH_WORKAROUND_1 calls from AArch32
by Dimitris Papastamos
· Thu May 31 11:38:33 2018 +0100
ba51d9e
Add support for dynamic mitigation for CVE-2018-3639
by Dimitris Papastamos
· Wed May 16 11:36:14 2018 +0100
4a284a4
aarch32: Implement static workaround for CVE-2018-3639
by Dimitris Papastamos
· Thu May 17 14:41:13 2018 +0100
e6625ec
Implement static workaround for CVE-2018-3639
by Dimitris Papastamos
· Thu Apr 05 14:38:26 2018 +0100
570c06a
Rename symbols and files relating to CVE-2017-5715
by Dimitris Papastamos
· Fri Apr 06 15:29:34 2018 +0100
e34bd09
Workaround for CVE-2017-5715 on NVIDIA Denver CPUs
by Varun Wadekar
· Wed Jan 10 17:03:22 2018 -0800
6e1796e
Check presence of fix for errata 835769 in Cortex-A53
by Jonathan Wright
· Wed Mar 28 16:55:54 2018 +0100
efb1f33
Check presence of fix for errata 843419 in Cortex-A53
by Jonathan Wright
· Wed Mar 28 15:52:03 2018 +0100
914757c
Fixup `SMCCC_ARCH_FEATURES` semantics
by Dimitris Papastamos
· Mon Mar 12 14:47:09 2018 +0000
780cc95
Use PFR0 to identify need for mitigation of CVE-2017-5715
by Dimitris Papastamos
· Mon Mar 12 13:27:02 2018 +0000
864364a
MISRA fixes for Cortex A75 AMU implementation
by Dimitris Papastamos
· Tue Feb 27 10:55:39 2018 +0000
1be747f
Refactor AMU support for Cortex A75
by Dimitris Papastamos
· Wed Feb 14 10:28:36 2018 +0000
0b00f8a
Factor out CPU AMU helpers
by Dimitris Papastamos
· Wed Feb 14 10:00:06 2018 +0000
d1e1930
Fixup AArch32 errata printing framework
by Soby Mathew
· Wed Feb 21 15:48:03 2018 +0000
8ca3144
Merge pull request #1253 from dp-arm/dp/amu32
by davidcunado-arm
· Fri Feb 02 11:14:17 2018 +0000
0dcdd8d
AMU: Implement context save/restore for aarch32
by Joel Hutton
· Thu Dec 21 15:21:20 2017 +0000
2880363
Optimize SMCCC_ARCH_WORKAROUND_1 on Cortex A57/A72/A73 and A75
by Dimitris Papastamos
· Mon Jan 08 13:57:39 2018 +0000
b63c6f1
Optimize/cleanup BPIALL workaround
by Dimitris Papastamos
· Thu Jan 11 15:29:36 2018 +0000
04285cf
Merge pull request #1228 from dp-arm/dp/cve_2017_5715
by davidcunado-arm
· Thu Jan 25 00:06:50 2018 +0000
471fb9b
Merge pull request #1229 from manojkumar-arm/manojkumar-arm/ca72-aarch32-reset-fix
by davidcunado-arm
· Sat Jan 20 17:04:49 2018 +0000
b5d1f8e
Merge pull request #1200 from robertovargas-arm/bl2-el3
by davidcunado-arm
· Fri Jan 19 13:40:12 2018 +0000
e37c029
lib/cpus: fix branching in reset function for cortex-a72 AARCH32 mode
by Manoj Kumar
· Fri Jan 19 17:51:31 2018 +0530
8ca0af2
Workaround for CVE-2017-5715 for Cortex A9, A15 and A17
by Dimitris Papastamos
· Wed Jan 03 10:48:59 2018 +0000
858bd61
Print erratum application report for CVE-2017-5715
by Dimitris Papastamos
· Tue Jan 16 10:32:47 2018 +0000
84e02dc
Change the default errata format string
by Dimitris Papastamos
· Tue Jan 16 10:42:20 2018 +0000
e0e9946
bl2-el3: Add BL2_EL3 image
by Roberto Vargas
· Mon Oct 30 14:43:43 2017 +0000
fa2b736
Merge pull request #1197 from dp-arm/dp/amu
by davidcunado-arm
· Fri Jan 12 09:02:24 2018 +0000
d7e2e9e
Add hooks to save/restore AMU context for Cortex A75
by Dimitris Papastamos
· Mon Dec 11 11:45:35 2017 +0000
43e05ec
Use PFR0 to identify need for mitigation of CVE-2017-5915
by Dimitris Papastamos
· Tue Jan 02 15:53:01 2018 +0000
c52ebdc
Workaround for CVE-2017-5715 on Cortex A73 and A75
by Dimitris Papastamos
· Mon Dec 18 13:46:21 2017 +0000
446f7f1
Workaround for CVE-2017-5715 on Cortex A57 and A72
by Dimitris Papastamos
· Thu Nov 30 14:53:53 2017 +0000
4c24bb7
Merge pull request #1168 from matt2048/master
by davidcunado-arm
· Mon Dec 04 22:39:40 2017 +0000
fcedb69
Implement support for the Activity Monitor Unit on Cortex A75
by Dimitris Papastamos
· Mon Oct 16 11:40:10 2017 +0100
41b0094
Replace macro ASM_ASSERTION with macro ENABLE_ASSERTIONS
by Matt Ma
· Wed Nov 22 19:31:28 2017 +0800
09d26a6
ARMv7: introduce Cortex-A12
by Etienne Carriere
· Sun Nov 05 22:56:50 2017 +0100
010dd1f
ARMv7: introduce Cortex-A17
by Etienne Carriere
· Sun Nov 05 22:56:41 2017 +0100
f2f7b91
ARMv7: introduce Cortex-A7
by Etienne Carriere
· Sun Nov 05 22:56:34 2017 +0100
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