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filogic
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atf
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6dc14fc396f938adb5a44dc0ac3c53d4c2269f5f
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plat
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intel
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soc
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agilex
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include
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agilex_clock_manager.h
a9fca83
fix(intel): fix Agilex and N5X clock manager to main PLL C0
by Jit Loon Lim
· 1 year, 8 months ago
f48707a
feat(intel): implement timer init divider via CPU frequency for N5X
by Sieu Mun Tang
· 2 years, 2 months ago
a4a4327
feat(intel): implement timer init divider via cpu frequency. (#1)
by BenjaminLimJL
· 2 years, 5 months ago
fcbc33d
plat: intel: set DRVSEL and SMPLSEL for DWMMC
by Tien Hock Loh
· 4 years, 4 months ago
9f5dfc9
intel: Refactor common platform code [1/5]
by Hadi Asyrafi
· 4 years, 10 months ago
56c4901
intel: agilex: Clear PLL lostlock bypass mode
by Hadi Asyrafi
· 5 years ago
a813fed
intel: agilex: Fix reliance on hard coded clock information
by Hadi Asyrafi
· 5 years ago
616da77
intel: Adds support for Agilex platform
by Hadi Asyrafi
· 5 years ago