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include
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lib
fba2572
Fix exception handlers in BL31: Use DSB to synchronize pending EA
by Madhukar Pappireddy
· Fri Jul 24 03:27:12 2020 -0500
85ea43d
Workaround for Cortex A78 erratum 1951500
by johpow01
· Wed Oct 07 15:08:01 2020 -0500
9131eb8
Workaround for Cortex A78 erratum 1941498
by johpow01
· Tue Oct 06 17:55:25 2020 -0500
9faad3c
Add support for Neoverse-N2 CPUs.
by Javier Almansa Sobrino
· Fri Oct 23 13:22:07 2020 +0100
1cc4407
Revert workaround for A77 erratum 1800714
by johpow01
· Thu Nov 12 14:15:41 2020 -0600
2730c32
Revert workaround for A76 erratum 1800710
by johpow01
· Thu Nov 12 13:32:00 2020 -0600
f68a683
Merge "Increase type widths to satisfy width requirements" into integration
by Joanna Farley
· Sun Oct 18 14:51:00 2020 +0000
86f7fb7
Update in coreboot_get_memory_type API to include size as well
by Saurabh Gorecha
· Thu Oct 15 00:05:36 2020 +0530
ed20207
Increase type widths to satisfy width requirements
by Jimmy Brisson
· Tue Aug 04 16:18:52 2020 -0500
4062bce
Merge "Workaround for Cortex A77 erratum 1925769" into integration
by Lauren Wehrmeister
· Fri Oct 09 19:17:23 2020 +0000
27569ff
lib/cpus: update MIDR value for rainier cpu
by Jagadeesh Ujja
· Wed Oct 07 19:51:46 2020 +0530
a2fa12c
Workaround for Cortex A77 erratum 1925769
by johpow01
· Thu Sep 10 13:39:26 2020 -0500
958a0b1
Rename Neoverse Zeus to Neoverse V1
by Jimmy Brisson
· Wed Sep 30 15:28:03 2020 -0500
7cc90c4
Rename Cortex Hercules AE to Cortex 78 AE
by Jimmy Brisson
· Wed Sep 30 15:34:51 2020 -0500
dff3fe1
libfdt: Upgrade libfdt source files
by Andre Przywara
· Thu Oct 01 22:41:48 2020 +0100
3671d6f
Merge "Workaround for Cortex A77 erratum 1508412" into integration
by Madhukar Pappireddy
· Tue Sep 29 18:43:00 2020 +0000
e867a90
Merge changes I1ecbe5a1,Ib5945c37,Ic6b79648 into integration
by Manish Pandey
· Tue Sep 29 12:17:21 2020 +0000
38cf520
Merge "arm_fpga: Add support for unknown MPIDs" into integration
by André Przywara
· Mon Sep 28 18:25:03 2020 +0000
9b4e3d7
lib/cpus: add support for Morello Rainier CPUs
by Manoj Kumar
· Thu Jul 09 09:56:02 2020 +0100
99ad976
Workaround for Cortex A77 erratum 1508412
by laurenw-arm
· Tue Jul 14 14:18:34 2020 -0500
e1ecd23
arm_fpga: Add support for unknown MPIDs
by Javier Almansa Sobrino
· Thu Aug 20 18:48:09 2020 +0100
d7e7be3
libc: Import strtok_r from FreeBSD project
by Madhukar Pappireddy
· Wed Sep 16 18:58:49 2020 -0500
0aa0896
Merge "libc: Import strlcat from FreeBSD project" into integration
by Mark Dykes
· Fri Sep 11 18:44:19 2020 +0000
134bf86
Merge "libc: Add support for vsnprintf()" into integration
by Mark Dykes
· Fri Sep 11 18:42:23 2020 +0000
3862970
libc: Add support for vsnprintf()
by Madhukar Pappireddy
· Tue Sep 08 19:00:00 2020 -0500
af0cd5f
libc: Import strlcat from FreeBSD project
by Madhukar Pappireddy
· Fri Sep 04 14:04:23 2020 -0500
2b010ea
Merge "lib: cpu: Check SCU presence in DSU before accessing DSU registers" into integration
by Manish Pandey
· Thu Sep 03 21:16:17 2020 +0000
1203004
psci: utility api to invoke stop for other cores
by Sandeep Tripathy
· Mon Aug 17 20:22:13 2020 +0530
f01ea60
lib: cpu: Check SCU presence in DSU before accessing DSU registers
by Pramod Kumar
· Wed Feb 05 11:27:57 2020 +0530
96e081d
lib: cpus: denver: add MIDR PN9 variant
by Hemant Nigam
· Tue Dec 17 14:21:38 2019 -0800
2b0ee97
el3_runtime: Rearrange context offset of EL1 sys registers
by Manish V Badarkhe
· Tue Jul 28 07:22:30 2020 +0100
30d20bb
Merge "lib: cpus: denver: add some MIDR values" into integration
by Varun Wadekar
· Fri Aug 14 20:32:44 2020 +0000
d7297c7
Prevent colliding identifiers
by Jimmy Brisson
· Wed Aug 05 14:05:53 2020 -0500
7e6306b
TF-A AMU extension: fix detection of group 1 counters.
by Alexei Fedorov
· Tue Jul 14 08:17:56 2020 +0100
5f68fa7
lib: cpus: denver: add some MIDR values
by Alex Van Brunt
· Tue Jul 23 10:00:42 2019 -0700
3074fa5
Merge "Revert workaround for Neoverse N1 erratum 1800710" into integration
by Lauren Wehrmeister
· Thu Jul 23 20:02:15 2020 +0000
eb8d429
Revert workaround for Neoverse N1 erratum 1800710
by johpow01
· Thu Jul 23 13:05:45 2020 -0500
6a91e59
lib/fconf: Update 'set_fw_config_info' function
by Manish V Badarkhe
· Wed Jul 15 05:08:37 2020 +0100
a8be3bb
lib/fconf: Update data type of config max size
by Manish V Badarkhe
· Wed Jul 15 04:27:57 2020 +0100
c717617
TF-A: Add support for Measured Boot driver
by Alexei Fedorov
· Mon Jul 13 12:11:05 2020 +0100
a084a88
TF-A: Redefine true/false definitions
by Alexei Fedorov
· Tue Jul 14 12:26:19 2020 +0100
b7c045a
Merge "Upgrade libfdt source files" into integration
by Sandrine Bailleux
· Wed Jul 08 06:54:39 2020 +0000
ee4d02a
Merge "Workaround for Neoverse N1 erratum 1800710" into integration
by Lauren Wehrmeister
· Wed Jul 01 16:57:11 2020 +0000
596fe0a
Upgrade libfdt source files
by Madhukar Pappireddy
· Mon Jun 15 17:19:09 2020 -0500
8d0effa
Merge changes from topic "fw_config_handoff" into integration
by Sandrine Bailleux
· Fri Jun 26 07:06:52 2020 +0000
6d9b5ee
Workaround for Neoverse N1 erratum 1800710
by johpow01
· Tue Jun 02 13:14:11 2020 -0500
68aedc7
Workaround for Cortex A77 erratum 1800714
by johpow01
· Wed Jun 03 15:23:31 2020 -0500
99a8e14
plat/arm: Load and populate fw_config and tb_fw_config
by Manish V Badarkhe
· Thu Jun 11 22:32:11 2020 +0100
e069f8a
fconf: Handle error from fconf_load_config
by Manish V Badarkhe
· Thu Jun 11 22:25:53 2020 +0100
bb533c7
fconf: Allow fconf to load additional firmware configuration
by Manish V Badarkhe
· Thu Jun 11 22:17:30 2020 +0100
5c9ed08
Workaround for Cortex A76 erratum 1800710
by johpow01
· Tue Jun 02 15:02:28 2020 -0500
9603f98
Workaround for Cortex A76 erratum 1791580
by johpow01
· Fri May 29 14:17:38 2020 -0500
70f6597
Tegra194: add RAS exception handling
by David Pu
· Mon Mar 18 15:14:49 2019 -0700
b76e198
Merge "xlat_tables_v2: add base table section name parameter for spm_mm" into integration
by Lauren Wehrmeister
· Thu Jun 04 18:35:30 2020 +0000
813b50b
xlat_tables_v2: add base table section name parameter for spm_mm
by Masahisa Kojima
· Tue Jun 02 05:54:13 2020 +0900
3571fb9
Rename Cortex-Hercules to Cortex-A78
by Jimmy Brisson
· Mon Jun 01 10:18:22 2020 -0500
7ec175e
Rename Cortex Hercules Files to Cortex A78
by Jimmy Brisson
· Mon Jun 01 16:49:34 2020 -0500
3e24c16
Enable v8.6 WFE trap delays
by johpow01
· Wed Apr 22 14:05:13 2020 -0500
0c16abd
Fix exception in save/restore of EL2 registers.
by Max Shvetsov
· Wed May 13 18:15:39 2020 +0100
8acc493
coreboot: Add memory range parsing
by Julius Werner
· Thu Mar 26 18:06:21 2020 -0700
b58e451
Merge "Fix MISRA C issues in BL1/BL2/BL31" into integration
by Mark Dykes
· Sat Apr 04 19:58:56 2020 +0000
a5c6636
Fix MISRA C issues in BL1/BL2/BL31
by John Powell
· Fri Mar 20 14:21:05 2020 -0500
316b73b
xlat lib v2: Add support to pass shareability attribute for normal memory region
by Pramod Kumar
· Wed Feb 19 10:39:10 2020 +0530
59a99dd
Merge changes from topic "sb/fconf" into integration
by Olivier Deprez
· Fri Apr 03 11:36:30 2020 +0000
70005e0
Merge changes from topic "macro-cleanup" into integration
by Mark Dykes
· Thu Apr 02 21:54:17 2020 +0000
4bca140
Check for out-of-bound accesses in the CoT description
by Sandrine Bailleux
· Wed Mar 25 11:22:34 2020 +0100
80ec42d
Merge changes from topic "xlat" into integration
by Sandrine Bailleux
· Thu Apr 02 11:41:33 2020 +0000
f144157
Pass more -D options to BL*_CPPFLAGS instead of BL*_CFLAGS
by Masahiro Yamada
· Wed Apr 01 14:20:58 2020 +0900
f5f203a
xlat_tables_v2: fix assembler warning of PLAT_RO_XLAT_TABLES
by Masahiro Yamada
· Thu Mar 26 13:18:48 2020 +0900
d102752
include: fixup 'cm_setup_context' prototype
by Varun Wadekar
· Wed Apr 01 09:55:49 2020 -0700
fb10bfd
xlat_tables_v2: add enable_mmu()
by Masahiro Yamada
· Thu Mar 26 13:18:48 2020 +0900
48d605e
Merge "Fix 'tautological-constant-compare' error" into integration
by Mark Dykes
· Wed Mar 25 15:39:26 2020 +0000
4d062c0
Fix 'tautological-constant-compare' error
by Manish V Badarkhe
· Sun Mar 22 04:23:24 2020 +0000
d36ed28
Merge "context: TPIDR_EL2 register not saved/restored" into integration
by Manish Pandey
· Tue Mar 24 11:22:28 2020 +0000
1962891
context: TPIDR_EL2 register not saved/restored
by Olivier Deprez
· Fri Mar 20 14:22:05 2020 +0100
fcd1e88
Tegra194: enable dual execution for EL2 and EL3
by Kalyani Chidambaram
· Wed Sep 12 14:59:08 2018 -0700
e8b6b80
Merge changes from topic "mp/enhanced_pal_hw" into integration
by Mark Dykes
· Thu Mar 12 15:54:28 2020 +0000
8151969
fconf: enhancements to firmware configuration framework
by Madhukar Pappireddy
· Fri Dec 06 15:46:42 2019 -0600
b042060
xlat_tables_v2: use ARRAY_SIZE in REGISTER_XLAT_CONTEXT_FULL_SPEC
by Masahiro Yamada
· Mon Mar 09 17:39:27 2020 +0900
0db2375
xlat_tables_v2: merge REGISTER_XLAT_CONTEXT_{FULL_SPEC,RO_BASE_TABLE}
by Masahiro Yamada
· Fri Mar 06 19:21:26 2020 +0900
c9e2c92
SPMD: Adds partially supported EL2 registers.
by Max Shvetsov
· Mon Feb 17 16:15:47 2020 +0000
bdf502d
SPMD: save/restore EL2 system registers.
by Max Shvetsov
· Tue Feb 25 13:56:19 2020 +0000
7029c3a
Merge "fconf: Fix misra issues" into integration
by Sandrine Bailleux
· Fri Feb 28 10:22:05 2020 +0000
2711cc8
fconf: Fix misra issues
by Louis Mayencourt
· Mon Feb 24 14:37:25 2020 +0000
e5a6fef
Read-only xlat tables for BL31 memory
by Petre-Ionut Tudor
· Thu Nov 07 15:18:03 2019 +0000
0fc5403
Merge "Add Matterhorn CPU lib" into integration
by joanna.farley
· Fri Feb 21 17:51:10 2020 +0000
c9a45ed
Merge "Add CPULib for Klein Core" into integration
by joanna.farley
· Fri Feb 21 17:50:01 2020 +0000
0a176e3
include: move MHZ_TICKS_PER_SEC to utils_def.h
by Varun Wadekar
· Thu Feb 13 13:07:12 2020 -0800
5ee3abc
cpus: higher performance non-cacheable load forwarding
by Varun Wadekar
· Tue Jun 12 16:49:12 2018 -0700
91d8061
coverity: fix MISRA violations
by Zelalem
· Wed Feb 12 10:37:03 2020 -0600
d904ac1
Add Matterhorn CPU lib
by Jimmy Brisson
· Wed Jan 08 13:52:51 2020 -0600
2463f9d
Add CPULib for Klein Core
by Jimmy Brisson
· Mon Dec 09 14:02:22 2019 -0600
5b9055f
fconf: Add mbedtls shared heap as property
by Louis Mayencourt
· Tue Oct 01 10:45:14 2019 +0100
4da9b31
fconf: Add TBBR disable_authentication property
by Louis Mayencourt
· Mon Sep 30 10:57:24 2019 +0100
6d2b573
fconf: Add dynamic config DTBs info as property
by Louis Mayencourt
· Tue Dec 17 13:17:25 2019 +0000
81bd916
fconf: Populate properties from dtb during bl2 setup
by Louis Mayencourt
· Thu Oct 17 15:14:25 2019 +0100
5a15b2d
fconf: Load config dtb from bl1
by Louis Mayencourt
· Thu Oct 17 14:46:51 2019 +0100
944ade8
fconf: initial commit
by Louis Mayencourt
· Thu Aug 08 12:03:26 2019 +0100
ff46037
Merge "Use correct type when reading SCR register" into integration
by Alexei Fedorov
· Thu Jan 30 16:55:55 2020 +0000
d57f1d2
Merge changes I0fb7cf79,Ia8eb4710 into integration
by Soby Mathew
· Wed Jan 29 09:51:21 2020 +0000
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