| commit | 85ea43dc7d47551a47e7473398795e40e39fecc2 | [log] [tgz] |
|---|---|---|
| author | johpow01 <john.powell@arm.com> | Wed Oct 07 15:08:01 2020 -0500 |
| committer | johpow01 <john.powell@arm.com> | Wed Jan 13 13:54:18 2021 -0600 |
| tree | c027995bd640eda1c72607dd5c2e468164b9a6d2 | |
| parent | 9131eb8f28e37e6c23229d6cdc1c36576372dd25 [diff] |
Workaround for Cortex A78 erratum 1951500 Cortex A78 erratum 1951500 is a Cat B erratum that applies to revisions r0p0, r1p0, and r1p1. The workaround is to insert a DMB ST before acquire atomic instructions without release semantics. This workaround works on revisions r1p0 and r1p1, in r0p0 there is no workaround. SDEN can be found here: https://documentation-service.arm.com/static/5fb66157ca04df4095c1cc2e Signed-off-by: John Powell <john.powell@arm.com> Change-Id: I47610cee75af6a127ea65edc4d5cffc7e6a2d0a3