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git01.mediatek.com / filogic / atf / 1087d504370268dc33cd52696367f9b192721329 / plat / intel / soc / stratix10
  1. 4c249f1 feat(intel): platform enablement for Agilex5 SoC FPGA by Jit Loon Lim · 1 year, 6 months ago
  2. 28c1c78 feat(intel): restructure sys mgr for S10/N5X by Jit Loon Lim · 1 year, 6 months ago
  3. 2be03c0 fix(tree): correct some typos by Elyes Haouas · 1 year, 9 months ago
  4. a9fca83 fix(intel): fix Agilex and N5X clock manager to main PLL C0 by Jit Loon Lim · 1 year, 11 months ago
  5. f48707a feat(intel): implement timer init divider via CPU frequency for N5X by Sieu Mun Tang · 2 years, 5 months ago
  6. 11b9b49 refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3 by Arvind Ram Prakash · 2 years ago
  7. 55803a2 fix(intel): fix UART baud rate and clock by Sieu Mun Tang · 2 years, 5 months ago
  8. dce970c build(stratix10): platform changes for verifying gpt header crc by Rohit Ner · 2 years, 6 months ago
  9. b56c078 fix(intel): remove redundant NOC header declarations by Sieu Mun Tang · 2 years, 6 months ago
  10. 044ed48 feat(intel): support version 2 SiP SVC SMC function ID for non-mailbox commands by Sieu Mun Tang · 2 years, 6 months ago
  11. 2cebbc6 Merge "feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge" into integration by Madhukar Pappireddy · 2 years, 6 months ago
  12. 1a832bf Merge "feat(intel): add SMPLSEL and DRVSEL setup for Stratix 10 MMC" into integration by Madhukar Pappireddy · 2 years, 6 months ago
  13. a4a4327 feat(intel): implement timer init divider via cpu frequency. (#1) by BenjaminLimJL · 2 years, 7 months ago
  14. e026eea feat(intel): add SMPLSEL and DRVSEL setup for Stratix 10 MMC by Sieu Mun Tang · 2 years, 7 months ago
  15. 82cf5df feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge by Sieu Mun Tang · 2 years, 7 months ago
  16. 2f94ca4 feat(intel): enable firewall for OCRAM in BL31 by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 3 months ago
  17. 1205ef0 feat(intel): create source file for firewall configuration by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 3 months ago
  18. 616b5e7 fix(intel): refactor NOC header by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 3 months ago
  19. b19ac61 feat(intel): add macro to switch between different UART PORT by Boon Khai Ng · 3 years, 3 months ago
  20. a544da1 fix(intel): make FPGA memory configurations platform specific by Sieu Mun Tang · 2 years, 9 months ago
  21. dbcc2cf fix(intel): fix ECC Double Bit Error handling by Sieu Mun Tang · 2 years, 8 months ago
  22. f3a5d02 build(intel): define a macro for SIMICS build by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 5 months ago
  23. 9f22cbf build(intel): initial commit for crypto driver by Sieu Mun Tang · 2 years, 9 months ago
  24. c353b0a Merge "fix(intel): assert if bl_mem_params is NULL pointer" into integration by Madhukar Pappireddy · 2 years, 9 months ago
  25. 380924d fix(intel): assert if bl_mem_params is NULL pointer by Siew Chin Lim · 3 years, 5 months ago
  26. ae4cd3a fix(intel): enable HPS QSPI access by default by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 1 month ago
  27. cf93158 plat/intel: do not keep mmc_device_info in stack by Yann Gautier · 3 years, 8 months ago
  28. 6474096 intel: mailbox: Ensure time out duration is predictive by Chee Hong Ang · 4 years, 6 months ago
  29. 2382b11 intel: clear 'PLAT_SEC_ENTRY' in early platform setup by Chee Hong Ang · 4 years, 7 months ago
  30. 0ae8d9a intel: platform: Include GICv2 makefile by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 3 months ago
  31. 7dd4add Merge "intel: Enable EMAC PHY in Intel FPGA platform" into integration by Sandrine Bailleux · 4 years, 9 months ago
  32. 98b5a11 16550: Use generic console_t data structure by Andre Przywara · 4 years, 10 months ago
  33. 8d9e891 intel: Enable EMAC PHY in Intel FPGA platform by Tien Hock, Loh · 5 years ago
  34. 7f95059 Merge "intel: Change boot source selection" into integration by Sandrine Bailleux · 4 years, 9 months ago
  35. 593c4c5 intel: Extend SiP service to support mailbox's RSU by Hadi Asyrafi · 5 years ago
  36. 786db4d intel: Change boot source selection by Hadi Asyrafi · 4 years, 11 months ago
  37. 6aeb55d intel: Add function to check fpga readiness by Hadi Asyrafi · 5 years ago
  38. 36a9f30 intel: Add bridge control for FPGA reconfig by Hadi Asyrafi · 5 years ago
  39. 8ebd237 intel: System Manager refactoring by Hadi Asyrafi · 5 years ago
  40. 67cb0ea intel: Refactor reset manager driver by Hadi Asyrafi · 5 years ago
  41. e73c511 intel: Enable bridge access in Intel platform by Hadi Asyrafi · 5 years ago
  42. 3afb87a intel: Modify non secure access function by Hadi Asyrafi · 5 years ago
  43. 99361aa Merge "intel: Fix memory calibration" into integration by Manish Pandey · 4 years, 10 months ago
  44. 1fab9c3 Remove redundant declarations. by Madhukar Pappireddy · 4 years, 11 months ago
  45. 966f282 intel: Fix memory calibration by Hadi Asyrafi · 5 years ago
  46. c8a281c intel: stratix10: Modify BL31 parameter handling by Hadi Asyrafi · 5 years ago
  47. 0563a85 intel: stratix10: Enable uboot entrypoint support by Hadi Asyrafi · 5 years ago
  48. 0c98ae8 intel: s10: Remove unused source code by Hadi Asyrafi · 5 years ago
  49. 5ae876f intel: Refactor common platform code [5/5] by Hadi Asyrafi · 5 years ago
  50. 4d9f395 intel: Refactor common platform code [4/5] by Hadi Asyrafi · 5 years ago
  51. 6f8a2b2 intel: Refactor common platform code [3/5] by Hadi Asyrafi · 5 years ago
  52. f0fa807 intel: Refactor common platform code [2/5] by Hadi Asyrafi · 5 years ago
  53. 9f5dfc9 intel: Refactor common platform code [1/5] by Hadi Asyrafi · 5 years ago
  54. 78fee35 intel: stratix10: Fix reliance on hard coded clock information by Hadi Asyrafi · 5 years ago
  55. 462c6c4 Merge changes from topic "intel-plat-refactor" into integration by Sandrine Bailleux · 5 years ago
  56. 309ac01 intel: Platform common code refactor by Hadi Asyrafi · 5 years ago
  57. acee488 intel: stratix10: Fix BL31 memory mapping by Hadi Asyrafi · 5 years ago
  58. 6a240c7 intel: Platform common code refactor by Hadi Asyrafi · 5 years ago
  59. c81e4f1 Merge changes from topic "jc/shift-overflow" into integration by Soby Mathew · 5 years ago
  60. 8e5662d Update intel platform to not rely on undefined overflow behaviour by Justin Chadwell · 5 years ago
  61. 2b9a741 plat/intel: Fix SMPLSEL for MMC by Tien Hock, Loh · 5 years ago
  62. 636a913 Merge changes from topic "av/console-port" into integration by Paul Beesley · 5 years ago
  63. 55828d5 Remove MULTI_CONSOLE_API flag and references to it by Ambroise Vincent · 6 years ago
  64. c461add intel: Pull out common drivers into platform common by Hadi Asyrafi · 5 years ago
  65. c0d4d93 intel: Enable watchdog timer on Intel S10 platform by Muhammad Hadi Asyrafi Abdul Halim · 6 years ago
  66. 49ccacd Merge pull request #1874 from hadi-asyrafi/qspi_boot by Soby Mathew · 6 years ago
  67. 2444bfa intel: QSPI boot enablement by Muhammad Hadi Asyrafi Abdul Halim · 6 years ago
  68. 59d501e intel: Add driver for QSPI To support the enablement of QSPI booting by Muhammad Hadi Asyrafi Abdul Halim · 6 years ago
  69. e408aa2 Merge pull request #1863 from thloh85-intel/mmc_fixes by Dimitris Papastamos · 6 years ago
  70. b978c08 plat: intel: Add MMC OCR voltage information for initialization by Tien Hock, Loh · 6 years ago
  71. b2bbe98 Merge pull request #1864 from hadi-asyrafi/mailbox_fix by Dimitris Papastamos · 6 years ago
  72. b5ed794 intel: Mailbox service un-accessible by Muhammad Hadi Asyrafi Abdul Halim · 6 years ago
  73. bd9e0a0 plat: intel: Improve ECC scrubbing performance by Tien Hock, Loh · 6 years ago
  74. ab34f74 plat: intel: Add BL31 support to Intel Stratix10 SoCFPGA platform by Tien Hock, Loh · 6 years ago
  75. 3d1063e plat: intel: Fix faulty DDR calibration value by Loh Tien Hock · 6 years ago
  76. 59400a4 plat: intel: Add BL2 support for Stratix 10 SoC by Loh Tien Hock · 6 years ago