plat/intel: Fix SMPLSEL for MMC

MMC sample select needs to be set properly so that DWMMC clock can be
driven to 50Mhz

Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>
Change-Id: I4a1dde4f6a1e78a36940c57a7a5b162be0bd443a
2 files changed