| commit | 3d1063efc38237811d7a03e86327c1c493a46441 | [log] [tgz] |
|---|---|---|
| author | Loh Tien Hock <tien.hock.loh@intel.com> | Wed Feb 13 14:39:31 2019 +0800 |
| committer | Loh Tien Hock <tien.hock.loh@intel.com> | Wed Feb 13 14:39:31 2019 +0800 |
| tree | e12fa2fad5d4aa9b50303788fd52afed2a1bdbb4 | |
| parent | 6b75e72e61bbb2767b13d90a8e3ed4decb30e75b [diff] |
plat: intel: Fix faulty DDR calibration value A DDR calibration value is missing write mask, causing ECC DDR calibration to fail. This patch addresses the issue. ECC should also be scrubbed before MMU initializes, thus the scrubbing is moved to ddr intialization phase. Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>