Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 1 | /* |
Antonio Nino Diaz | e40306b | 2017-01-13 15:03:07 +0000 | [diff] [blame] | 2 | * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #ifndef __ARCH_HELPERS_H__ |
| 32 | #define __ARCH_HELPERS_H__ |
| 33 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 34 | #include <arch.h> /* for additional register definitions */ |
| 35 | #include <cdefs.h> /* For __dead2 */ |
| 36 | #include <stdint.h> |
Antonio Nino Diaz | e40306b | 2017-01-13 15:03:07 +0000 | [diff] [blame] | 37 | #include <sys/types.h> |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 38 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 39 | /********************************************************************** |
| 40 | * Macros which create inline functions to read or write CPU system |
| 41 | * registers |
| 42 | *********************************************************************/ |
| 43 | |
Sandrine Bailleux | 30c231b | 2015-01-07 16:36:11 +0000 | [diff] [blame] | 44 | #define _DEFINE_SYSREG_READ_FUNC(_name, _reg_name) \ |
| 45 | static inline uint64_t read_ ## _name(void) \ |
| 46 | { \ |
| 47 | uint64_t v; \ |
| 48 | __asm__ volatile ("mrs %0, " #_reg_name : "=r" (v)); \ |
| 49 | return v; \ |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 50 | } |
| 51 | |
Sandrine Bailleux | 30c231b | 2015-01-07 16:36:11 +0000 | [diff] [blame] | 52 | #define _DEFINE_SYSREG_WRITE_FUNC(_name, _reg_name) \ |
| 53 | static inline void write_ ## _name(uint64_t v) \ |
| 54 | { \ |
| 55 | __asm__ volatile ("msr " #_reg_name ", %0" : : "r" (v)); \ |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 56 | } |
| 57 | |
| 58 | #define _DEFINE_SYSREG_WRITE_CONST_FUNC(_name, _reg_name) \ |
Sandrine Bailleux | 30c231b | 2015-01-07 16:36:11 +0000 | [diff] [blame] | 59 | static inline void write_ ## _name(const uint64_t v) \ |
| 60 | { \ |
| 61 | __asm__ volatile ("msr " #_reg_name ", %0" : : "i" (v)); \ |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 62 | } |
| 63 | |
| 64 | /* Define read function for system register */ |
| 65 | #define DEFINE_SYSREG_READ_FUNC(_name) \ |
| 66 | _DEFINE_SYSREG_READ_FUNC(_name, _name) |
| 67 | |
| 68 | /* Define read & write function for system register */ |
| 69 | #define DEFINE_SYSREG_RW_FUNCS(_name) \ |
| 70 | _DEFINE_SYSREG_READ_FUNC(_name, _name) \ |
| 71 | _DEFINE_SYSREG_WRITE_FUNC(_name, _name) |
| 72 | |
| 73 | /* Define read & write function for renamed system register */ |
| 74 | #define DEFINE_RENAME_SYSREG_RW_FUNCS(_name, _reg_name) \ |
| 75 | _DEFINE_SYSREG_READ_FUNC(_name, _reg_name) \ |
| 76 | _DEFINE_SYSREG_WRITE_FUNC(_name, _reg_name) |
| 77 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 78 | /* Define read function for renamed system register */ |
| 79 | #define DEFINE_RENAME_SYSREG_READ_FUNC(_name, _reg_name) \ |
| 80 | _DEFINE_SYSREG_READ_FUNC(_name, _reg_name) |
| 81 | |
| 82 | /* Define write function for renamed system register */ |
| 83 | #define DEFINE_RENAME_SYSREG_WRITE_FUNC(_name, _reg_name) \ |
| 84 | _DEFINE_SYSREG_WRITE_FUNC(_name, _reg_name) |
| 85 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 86 | /* Define write function for special system registers */ |
| 87 | #define DEFINE_SYSREG_WRITE_CONST_FUNC(_name) \ |
| 88 | _DEFINE_SYSREG_WRITE_CONST_FUNC(_name, _name) |
| 89 | |
| 90 | |
| 91 | /********************************************************************** |
| 92 | * Macros to create inline functions for system instructions |
| 93 | *********************************************************************/ |
| 94 | |
| 95 | /* Define function for simple system instruction */ |
| 96 | #define DEFINE_SYSOP_FUNC(_op) \ |
Juan Castillo | 2d55240 | 2014-06-13 17:05:10 +0100 | [diff] [blame] | 97 | static inline void _op(void) \ |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 98 | { \ |
| 99 | __asm__ (#_op); \ |
| 100 | } |
| 101 | |
| 102 | /* Define function for system instruction with type specifier */ |
| 103 | #define DEFINE_SYSOP_TYPE_FUNC(_op, _type) \ |
Juan Castillo | 2d55240 | 2014-06-13 17:05:10 +0100 | [diff] [blame] | 104 | static inline void _op ## _type(void) \ |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 105 | { \ |
| 106 | __asm__ (#_op " " #_type); \ |
| 107 | } |
| 108 | |
| 109 | /* Define function for system instruction with register parameter */ |
| 110 | #define DEFINE_SYSOP_TYPE_PARAM_FUNC(_op, _type) \ |
| 111 | static inline void _op ## _type(uint64_t v) \ |
| 112 | { \ |
| 113 | __asm__ (#_op " " #_type ", %0" : : "r" (v)); \ |
| 114 | } |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 115 | |
| 116 | /******************************************************************************* |
| 117 | * TLB maintenance accessor prototypes |
| 118 | ******************************************************************************/ |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 119 | DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1) |
| 120 | DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1is) |
| 121 | DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2) |
| 122 | DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2is) |
| 123 | DEFINE_SYSOP_TYPE_FUNC(tlbi, alle3) |
| 124 | DEFINE_SYSOP_TYPE_FUNC(tlbi, alle3is) |
| 125 | DEFINE_SYSOP_TYPE_FUNC(tlbi, vmalle1) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 126 | |
| 127 | /******************************************************************************* |
| 128 | * Cache maintenance accessor prototypes |
| 129 | ******************************************************************************/ |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 130 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, isw) |
| 131 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cisw) |
| 132 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, csw) |
| 133 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cvac) |
| 134 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, ivac) |
| 135 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, civac) |
| 136 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cvau) |
| 137 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, zva) |
| 138 | |
Varun Wadekar | 97625e3 | 2015-03-13 14:59:03 +0530 | [diff] [blame] | 139 | /******************************************************************************* |
| 140 | * Address translation accessor prototypes |
| 141 | ******************************************************************************/ |
| 142 | DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e1r) |
| 143 | DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e1w) |
| 144 | DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e0r) |
| 145 | DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e0w) |
| 146 | |
Antonio Nino Diaz | e40306b | 2017-01-13 15:03:07 +0000 | [diff] [blame] | 147 | void flush_dcache_range(uintptr_t addr, size_t size); |
| 148 | void clean_dcache_range(uintptr_t addr, size_t size); |
| 149 | void inv_dcache_range(uintptr_t addr, size_t size); |
| 150 | |
| 151 | void dcsw_op_louis(u_register_t op_type); |
| 152 | void dcsw_op_all(u_register_t op_type); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 153 | |
Dan Handley | a17fefa | 2014-05-14 12:38:32 +0100 | [diff] [blame] | 154 | void disable_mmu_el3(void); |
| 155 | void disable_mmu_icache_el3(void); |
Andrew Thoelke | 438c63a | 2014-04-28 12:06:18 +0100 | [diff] [blame] | 156 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 157 | /******************************************************************************* |
| 158 | * Misc. accessor prototypes |
| 159 | ******************************************************************************/ |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 160 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 161 | DEFINE_SYSREG_WRITE_CONST_FUNC(daifset) |
| 162 | DEFINE_SYSREG_WRITE_CONST_FUNC(daifclr) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 163 | |
Varun Wadekar | 97625e3 | 2015-03-13 14:59:03 +0530 | [diff] [blame] | 164 | DEFINE_SYSREG_READ_FUNC(par_el1) |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 165 | DEFINE_SYSREG_READ_FUNC(id_pfr1_el1) |
| 166 | DEFINE_SYSREG_READ_FUNC(id_aa64pfr0_el1) |
| 167 | DEFINE_SYSREG_READ_FUNC(CurrentEl) |
| 168 | DEFINE_SYSREG_RW_FUNCS(daif) |
| 169 | DEFINE_SYSREG_RW_FUNCS(spsr_el1) |
| 170 | DEFINE_SYSREG_RW_FUNCS(spsr_el2) |
| 171 | DEFINE_SYSREG_RW_FUNCS(spsr_el3) |
| 172 | DEFINE_SYSREG_RW_FUNCS(elr_el1) |
| 173 | DEFINE_SYSREG_RW_FUNCS(elr_el2) |
| 174 | DEFINE_SYSREG_RW_FUNCS(elr_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 175 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 176 | DEFINE_SYSOP_FUNC(wfi) |
| 177 | DEFINE_SYSOP_FUNC(wfe) |
| 178 | DEFINE_SYSOP_FUNC(sev) |
| 179 | DEFINE_SYSOP_TYPE_FUNC(dsb, sy) |
Soby Mathew | ed99566 | 2014-12-30 16:11:42 +0000 | [diff] [blame] | 180 | DEFINE_SYSOP_TYPE_FUNC(dmb, sy) |
Juan Castillo | 2e86cb1 | 2016-01-13 15:01:09 +0000 | [diff] [blame] | 181 | DEFINE_SYSOP_TYPE_FUNC(dmb, st) |
| 182 | DEFINE_SYSOP_TYPE_FUNC(dmb, ld) |
Soby Mathew | ed99566 | 2014-12-30 16:11:42 +0000 | [diff] [blame] | 183 | DEFINE_SYSOP_TYPE_FUNC(dsb, ish) |
| 184 | DEFINE_SYSOP_TYPE_FUNC(dmb, ish) |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 185 | DEFINE_SYSOP_FUNC(isb) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 186 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 187 | uint32_t get_afflvl_shift(uint32_t); |
| 188 | uint32_t mpidr_mask_lower_afflvls(uint64_t, uint32_t); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 189 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 190 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 191 | void __dead2 eret(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3, |
| 192 | uint64_t x4, uint64_t x5, uint64_t x6, uint64_t x7); |
| 193 | void __dead2 smc(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3, |
| 194 | uint64_t x4, uint64_t x5, uint64_t x6, uint64_t x7); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 195 | |
| 196 | /******************************************************************************* |
| 197 | * System register accessor prototypes |
| 198 | ******************************************************************************/ |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 199 | DEFINE_SYSREG_READ_FUNC(midr_el1) |
| 200 | DEFINE_SYSREG_READ_FUNC(mpidr_el1) |
Antonio Nino Diaz | d1beee2 | 2016-12-13 15:28:54 +0000 | [diff] [blame] | 201 | DEFINE_SYSREG_READ_FUNC(id_aa64mmfr0_el1) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 202 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 203 | DEFINE_SYSREG_RW_FUNCS(scr_el3) |
| 204 | DEFINE_SYSREG_RW_FUNCS(hcr_el2) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 205 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 206 | DEFINE_SYSREG_RW_FUNCS(vbar_el1) |
| 207 | DEFINE_SYSREG_RW_FUNCS(vbar_el2) |
| 208 | DEFINE_SYSREG_RW_FUNCS(vbar_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 209 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 210 | DEFINE_SYSREG_RW_FUNCS(sctlr_el1) |
| 211 | DEFINE_SYSREG_RW_FUNCS(sctlr_el2) |
| 212 | DEFINE_SYSREG_RW_FUNCS(sctlr_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 213 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 214 | DEFINE_SYSREG_RW_FUNCS(actlr_el1) |
| 215 | DEFINE_SYSREG_RW_FUNCS(actlr_el2) |
| 216 | DEFINE_SYSREG_RW_FUNCS(actlr_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 217 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 218 | DEFINE_SYSREG_RW_FUNCS(esr_el1) |
| 219 | DEFINE_SYSREG_RW_FUNCS(esr_el2) |
| 220 | DEFINE_SYSREG_RW_FUNCS(esr_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 221 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 222 | DEFINE_SYSREG_RW_FUNCS(afsr0_el1) |
| 223 | DEFINE_SYSREG_RW_FUNCS(afsr0_el2) |
| 224 | DEFINE_SYSREG_RW_FUNCS(afsr0_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 225 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 226 | DEFINE_SYSREG_RW_FUNCS(afsr1_el1) |
| 227 | DEFINE_SYSREG_RW_FUNCS(afsr1_el2) |
| 228 | DEFINE_SYSREG_RW_FUNCS(afsr1_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 229 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 230 | DEFINE_SYSREG_RW_FUNCS(far_el1) |
| 231 | DEFINE_SYSREG_RW_FUNCS(far_el2) |
| 232 | DEFINE_SYSREG_RW_FUNCS(far_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 233 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 234 | DEFINE_SYSREG_RW_FUNCS(mair_el1) |
| 235 | DEFINE_SYSREG_RW_FUNCS(mair_el2) |
| 236 | DEFINE_SYSREG_RW_FUNCS(mair_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 237 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 238 | DEFINE_SYSREG_RW_FUNCS(amair_el1) |
| 239 | DEFINE_SYSREG_RW_FUNCS(amair_el2) |
| 240 | DEFINE_SYSREG_RW_FUNCS(amair_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 241 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 242 | DEFINE_SYSREG_READ_FUNC(rvbar_el1) |
| 243 | DEFINE_SYSREG_READ_FUNC(rvbar_el2) |
| 244 | DEFINE_SYSREG_READ_FUNC(rvbar_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 245 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 246 | DEFINE_SYSREG_RW_FUNCS(rmr_el1) |
| 247 | DEFINE_SYSREG_RW_FUNCS(rmr_el2) |
| 248 | DEFINE_SYSREG_RW_FUNCS(rmr_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 249 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 250 | DEFINE_SYSREG_RW_FUNCS(tcr_el1) |
| 251 | DEFINE_SYSREG_RW_FUNCS(tcr_el2) |
| 252 | DEFINE_SYSREG_RW_FUNCS(tcr_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 253 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 254 | DEFINE_SYSREG_RW_FUNCS(ttbr0_el1) |
| 255 | DEFINE_SYSREG_RW_FUNCS(ttbr0_el2) |
| 256 | DEFINE_SYSREG_RW_FUNCS(ttbr0_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 257 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 258 | DEFINE_SYSREG_RW_FUNCS(ttbr1_el1) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 259 | |
Sandrine Bailleux | 8b0eafe | 2015-11-25 17:00:44 +0000 | [diff] [blame] | 260 | DEFINE_SYSREG_RW_FUNCS(vttbr_el2) |
| 261 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 262 | DEFINE_SYSREG_RW_FUNCS(cptr_el2) |
| 263 | DEFINE_SYSREG_RW_FUNCS(cptr_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 264 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 265 | DEFINE_SYSREG_RW_FUNCS(cpacr_el1) |
| 266 | DEFINE_SYSREG_RW_FUNCS(cntfrq_el0) |
| 267 | DEFINE_SYSREG_RW_FUNCS(cntps_ctl_el1) |
| 268 | DEFINE_SYSREG_RW_FUNCS(cntps_tval_el1) |
| 269 | DEFINE_SYSREG_RW_FUNCS(cntps_cval_el1) |
| 270 | DEFINE_SYSREG_READ_FUNC(cntpct_el0) |
| 271 | DEFINE_SYSREG_RW_FUNCS(cnthctl_el2) |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 272 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 273 | DEFINE_SYSREG_RW_FUNCS(tpidr_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 274 | |
Soby Mathew | feddfcf | 2014-08-29 14:41:58 +0100 | [diff] [blame] | 275 | DEFINE_SYSREG_RW_FUNCS(cntvoff_el2) |
| 276 | |
Andrew Thoelke | 4e12607 | 2014-06-04 21:10:52 +0100 | [diff] [blame] | 277 | DEFINE_SYSREG_RW_FUNCS(vpidr_el2) |
| 278 | DEFINE_SYSREG_RW_FUNCS(vmpidr_el2) |
developer | 550bf5e | 2016-07-11 16:05:23 +0800 | [diff] [blame] | 279 | DEFINE_SYSREG_RW_FUNCS(cntp_ctl_el0) |
Andrew Thoelke | 4e12607 | 2014-06-04 21:10:52 +0100 | [diff] [blame] | 280 | |
Soby Mathew | 26fb90e | 2015-01-06 21:36:55 +0000 | [diff] [blame] | 281 | DEFINE_SYSREG_READ_FUNC(isr_el1) |
| 282 | |
Dan Handley | 0cdebbd | 2015-03-30 17:15:16 +0100 | [diff] [blame] | 283 | DEFINE_SYSREG_READ_FUNC(ctr_el0) |
| 284 | |
David Cunado | 5f55e28 | 2016-10-31 17:37:34 +0000 | [diff] [blame] | 285 | DEFINE_SYSREG_RW_FUNCS(mdcr_el2) |
David Cunado | c14b08e | 2016-11-25 00:21:59 +0000 | [diff] [blame] | 286 | DEFINE_SYSREG_RW_FUNCS(hstr_el2) |
| 287 | DEFINE_SYSREG_RW_FUNCS(cnthp_ctl_el2) |
David Cunado | 5f55e28 | 2016-10-31 17:37:34 +0000 | [diff] [blame] | 288 | DEFINE_SYSREG_READ_FUNC(pmcr_el0) |
| 289 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 290 | DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el1, ICC_SRE_EL1) |
| 291 | DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el2, ICC_SRE_EL2) |
| 292 | DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el3, ICC_SRE_EL3) |
| 293 | DEFINE_RENAME_SYSREG_RW_FUNCS(icc_pmr_el1, ICC_PMR_EL1) |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 294 | DEFINE_RENAME_SYSREG_RW_FUNCS(icc_igrpen1_el3, ICC_IGRPEN1_EL3) |
| 295 | DEFINE_RENAME_SYSREG_RW_FUNCS(icc_igrpen0_el1, ICC_IGRPEN0_EL1) |
| 296 | DEFINE_RENAME_SYSREG_READ_FUNC(icc_hppir0_el1, ICC_HPPIR0_EL1) |
| 297 | DEFINE_RENAME_SYSREG_READ_FUNC(icc_hppir1_el1, ICC_HPPIR1_EL1) |
| 298 | DEFINE_RENAME_SYSREG_READ_FUNC(icc_iar0_el1, ICC_IAR0_EL1) |
| 299 | DEFINE_RENAME_SYSREG_READ_FUNC(icc_iar1_el1, ICC_IAR1_EL1) |
| 300 | DEFINE_RENAME_SYSREG_WRITE_FUNC(icc_eoir0_el1, ICC_EOIR0_EL1) |
| 301 | DEFINE_RENAME_SYSREG_WRITE_FUNC(icc_eoir1_el1, ICC_EOIR1_EL1) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 302 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 303 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 304 | #define IS_IN_EL(x) \ |
| 305 | (GET_EL(read_CurrentEl()) == MODE_EL##x) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 306 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 307 | #define IS_IN_EL1() IS_IN_EL(1) |
| 308 | #define IS_IN_EL3() IS_IN_EL(3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 309 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 310 | /* Previously defined accesor functions with incomplete register names */ |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 311 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 312 | #define read_current_el() read_CurrentEl() |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 313 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 314 | #define dsb() dsbsy() |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 315 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 316 | #define read_midr() read_midr_el1() |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 317 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 318 | #define read_mpidr() read_mpidr_el1() |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 319 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 320 | #define read_scr() read_scr_el3() |
| 321 | #define write_scr(_v) write_scr_el3(_v) |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 322 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 323 | #define read_hcr() read_hcr_el2() |
| 324 | #define write_hcr(_v) write_hcr_el2(_v) |
Sandrine Bailleux | 25232af | 2014-05-09 11:23:11 +0100 | [diff] [blame] | 325 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 326 | #define read_cpacr() read_cpacr_el1() |
| 327 | #define write_cpacr(_v) write_cpacr_el1(_v) |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 328 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 329 | #endif /* __ARCH_HELPERS_H__ */ |