Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 1 | /* |
Ravi Patel | 2f34d36 | 2021-04-15 05:55:19 -0700 | [diff] [blame] | 2 | * Copyright (c) 2013-2022, ARM Limited and Contributors. All rights reserved. |
Ronak Jain | 11b084a | 2023-02-13 04:48:06 -0800 | [diff] [blame] | 3 | * Copyright (c) 2022-2023, Advanced Micro Devices Inc. All rights reserved. |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 4 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 5 | * SPDX-License-Identifier: BSD-3-Clause |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | /* ZynqMP power management enums and defines */ |
| 9 | |
Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 10 | #ifndef PM_DEFS_H |
| 11 | #define PM_DEFS_H |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 12 | |
| 13 | /********************************************************************* |
| 14 | * Macro definitions |
| 15 | ********************************************************************/ |
| 16 | |
| 17 | /* |
| 18 | * Version number is a 32bit value, like: |
| 19 | * (PM_VERSION_MAJOR << 16) | PM_VERSION_MINOR |
| 20 | */ |
Venkatesh Yadav Abbarapu | a2ca35d | 2022-07-04 11:40:27 +0530 | [diff] [blame] | 21 | #define PM_VERSION_MAJOR 1U |
| 22 | #define PM_VERSION_MINOR 1U |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 23 | |
Venkatesh Yadav Abbarapu | a2ca35d | 2022-07-04 11:40:27 +0530 | [diff] [blame] | 24 | #define PM_VERSION ((PM_VERSION_MAJOR << 16U) | PM_VERSION_MINOR) |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 25 | |
Ronak Jain | 325bad1 | 2021-12-21 01:39:59 -0800 | [diff] [blame] | 26 | /** |
| 27 | * PM API versions |
| 28 | */ |
| 29 | /* Expected version of firmware APIs */ |
| 30 | #define FW_API_BASE_VERSION (1U) |
| 31 | /* Expected version of firmware API for feature check */ |
| 32 | #define FW_API_VERSION_2 (2U) |
| 33 | /* Version of APIs implemented in ATF */ |
| 34 | #define ATF_API_BASE_VERSION (1U) |
Ronak Jain | 11b084a | 2023-02-13 04:48:06 -0800 | [diff] [blame] | 35 | /* Updating the QUERY_DATA API versioning as the bitmask functionality |
| 36 | * support is added in the v2.*/ |
| 37 | #define TFA_API_QUERY_DATA_VERSION (2U) |
Ronak Jain | 325bad1 | 2021-12-21 01:39:59 -0800 | [diff] [blame] | 38 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 39 | /* Capabilities for RAM */ |
| 40 | #define PM_CAP_ACCESS 0x1U |
| 41 | #define PM_CAP_CONTEXT 0x2U |
| 42 | |
| 43 | #define MAX_LATENCY (~0U) |
| 44 | #define MAX_QOS 100U |
| 45 | |
Filip Drazic | 0bd9d0c | 2016-07-20 17:17:39 +0200 | [diff] [blame] | 46 | /* State arguments of the self suspend */ |
| 47 | #define PM_STATE_CPU_IDLE 0x0U |
| 48 | #define PM_STATE_SUSPEND_TO_RAM 0xFU |
| 49 | |
Ravi Patel | 2f34d36 | 2021-04-15 05:55:19 -0700 | [diff] [blame] | 50 | /* APU processor states */ |
| 51 | #define PM_PROC_STATE_FORCEDOFF 0U |
| 52 | #define PM_PROC_STATE_ACTIVE 1U |
| 53 | #define PM_PROC_STATE_SLEEP 2U |
| 54 | #define PM_PROC_STATE_SUSPENDING 3U |
| 55 | |
Venkatesh Yadav Abbarapu | 7ace4af | 2020-11-23 04:26:54 -0800 | [diff] [blame] | 56 | #define EM_FUNID_NUM_MASK 0xF0000U |
Ronak Jain | 325bad1 | 2021-12-21 01:39:59 -0800 | [diff] [blame] | 57 | |
| 58 | #define PM_GET_CALLBACK_DATA 0xa01 |
| 59 | #define PM_SET_SUSPEND_MODE 0xa02 |
| 60 | #define PM_GET_TRUSTZONE_VERSION 0xa03 |
| 61 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 62 | /********************************************************************* |
| 63 | * Enum definitions |
| 64 | ********************************************************************/ |
| 65 | |
| 66 | enum pm_api_id { |
| 67 | /* Miscellaneous API functions: */ |
| 68 | PM_GET_API_VERSION = 1, /* Do not change or move */ |
| 69 | PM_SET_CONFIGURATION, |
| 70 | PM_GET_NODE_STATUS, |
| 71 | PM_GET_OP_CHARACTERISTIC, |
| 72 | PM_REGISTER_NOTIFIER, |
| 73 | /* API for suspending of PUs: */ |
| 74 | PM_REQ_SUSPEND, |
| 75 | PM_SELF_SUSPEND, |
| 76 | PM_FORCE_POWERDOWN, |
| 77 | PM_ABORT_SUSPEND, |
| 78 | PM_REQ_WAKEUP, |
| 79 | PM_SET_WAKEUP_SOURCE, |
| 80 | PM_SYSTEM_SHUTDOWN, |
| 81 | /* API for managing PM slaves: */ |
| 82 | PM_REQ_NODE, |
| 83 | PM_RELEASE_NODE, |
| 84 | PM_SET_REQUIREMENT, |
| 85 | PM_SET_MAX_LATENCY, |
| 86 | /* Direct control API functions: */ |
| 87 | PM_RESET_ASSERT, |
| 88 | PM_RESET_GET_STATUS, |
| 89 | PM_MMIO_WRITE, |
| 90 | PM_MMIO_READ, |
Filip Drazic | ca1e0af | 2017-03-16 16:56:53 +0100 | [diff] [blame] | 91 | PM_INIT_FINALIZE, |
Nava kishore Manne | 68d460c | 2016-08-20 23:18:09 +0530 | [diff] [blame] | 92 | PM_FPGA_LOAD, |
| 93 | PM_FPGA_GET_STATUS, |
Siva Durga Prasad Paladugu | 16427d1 | 2016-08-24 11:45:47 +0530 | [diff] [blame] | 94 | PM_GET_CHIPID, |
Rajan Vaja | 670bec0 | 2018-01-18 22:54:07 -0800 | [diff] [blame] | 95 | PM_SECURE_RSA_AES, |
| 96 | PM_SECURE_SHA, |
| 97 | PM_SECURE_RSA, |
Rajan Vaja | 8368761 | 2018-01-17 02:39:20 -0800 | [diff] [blame] | 98 | PM_PINCTRL_REQUEST, |
| 99 | PM_PINCTRL_RELEASE, |
| 100 | PM_PINCTRL_GET_FUNCTION, |
| 101 | PM_PINCTRL_SET_FUNCTION, |
| 102 | PM_PINCTRL_CONFIG_PARAM_GET, |
| 103 | PM_PINCTRL_CONFIG_PARAM_SET, |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 104 | PM_IOCTL, |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 105 | /* API to query information from firmware */ |
| 106 | PM_QUERY_DATA, |
| 107 | /* Clock control API functions */ |
| 108 | PM_CLOCK_ENABLE, |
| 109 | PM_CLOCK_DISABLE, |
| 110 | PM_CLOCK_GETSTATE, |
| 111 | PM_CLOCK_SETDIVIDER, |
| 112 | PM_CLOCK_GETDIVIDER, |
| 113 | PM_CLOCK_SETRATE, |
| 114 | PM_CLOCK_GETRATE, |
| 115 | PM_CLOCK_SETPARENT, |
| 116 | PM_CLOCK_GETPARENT, |
Siva Durga Prasad Paladugu | a4ed4b2 | 2018-04-30 20:06:58 +0530 | [diff] [blame] | 117 | PM_SECURE_IMAGE, |
Siva Durga Prasad Paladugu | 7c6516a | 2018-09-04 17:41:34 +0530 | [diff] [blame] | 118 | /* FPGA PL Readback */ |
| 119 | PM_FPGA_READ, |
Siva Durga Prasad Paladugu | 8bd905b | 2018-09-04 18:05:50 +0530 | [diff] [blame] | 120 | PM_SECURE_AES, |
Jolly Shah | a7cc5ee | 2019-01-02 12:27:00 -0800 | [diff] [blame] | 121 | /* PLL control API functions */ |
| 122 | PM_PLL_SET_PARAMETER, |
Jolly Shah | cb2f45d | 2019-01-04 11:28:38 -0800 | [diff] [blame] | 123 | PM_PLL_GET_PARAMETER, |
Jolly Shah | 1f0d585 | 2019-01-04 11:32:31 -0800 | [diff] [blame] | 124 | PM_PLL_SET_MODE, |
Jolly Shah | 141421e | 2019-01-04 11:35:48 -0800 | [diff] [blame] | 125 | PM_PLL_GET_MODE, |
Kalyani Akula | 6ebe483 | 2020-11-22 22:42:10 -0800 | [diff] [blame] | 126 | /* PM Register Access API */ |
| 127 | PM_REGISTER_ACCESS, |
VNSL Durga | deb1a36 | 2020-11-23 04:46:04 -0800 | [diff] [blame] | 128 | PM_EFUSE_ACCESS, |
Nava kishore Manne | 2af6d53 | 2022-01-13 13:29:36 +0530 | [diff] [blame] | 129 | PM_FPGA_GET_VERSION, |
| 130 | PM_FPGA_GET_FEATURE_LIST, |
Ronak Jain | 325bad1 | 2021-12-21 01:39:59 -0800 | [diff] [blame] | 131 | PM_FEATURE_CHECK = 63, |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 132 | PM_API_MAX |
| 133 | }; |
| 134 | |
| 135 | enum pm_node_id { |
| 136 | NODE_UNKNOWN = 0, |
| 137 | NODE_APU, |
| 138 | NODE_APU_0, |
| 139 | NODE_APU_1, |
| 140 | NODE_APU_2, |
| 141 | NODE_APU_3, |
| 142 | NODE_RPU, |
| 143 | NODE_RPU_0, |
| 144 | NODE_RPU_1, |
Rajan Vaja | 670bec0 | 2018-01-18 22:54:07 -0800 | [diff] [blame] | 145 | NODE_PLD, |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 146 | NODE_FPD, |
| 147 | NODE_OCM_BANK_0, |
| 148 | NODE_OCM_BANK_1, |
| 149 | NODE_OCM_BANK_2, |
| 150 | NODE_OCM_BANK_3, |
| 151 | NODE_TCM_0_A, |
| 152 | NODE_TCM_0_B, |
| 153 | NODE_TCM_1_A, |
| 154 | NODE_TCM_1_B, |
| 155 | NODE_L2, |
| 156 | NODE_GPU_PP_0, |
| 157 | NODE_GPU_PP_1, |
| 158 | NODE_USB_0, |
| 159 | NODE_USB_1, |
| 160 | NODE_TTC_0, |
| 161 | NODE_TTC_1, |
| 162 | NODE_TTC_2, |
| 163 | NODE_TTC_3, |
| 164 | NODE_SATA, |
| 165 | NODE_ETH_0, |
| 166 | NODE_ETH_1, |
| 167 | NODE_ETH_2, |
| 168 | NODE_ETH_3, |
| 169 | NODE_UART_0, |
| 170 | NODE_UART_1, |
| 171 | NODE_SPI_0, |
| 172 | NODE_SPI_1, |
| 173 | NODE_I2C_0, |
| 174 | NODE_I2C_1, |
| 175 | NODE_SD_0, |
| 176 | NODE_SD_1, |
| 177 | NODE_DP, |
| 178 | NODE_GDMA, |
| 179 | NODE_ADMA, |
| 180 | NODE_NAND, |
| 181 | NODE_QSPI, |
| 182 | NODE_GPIO, |
| 183 | NODE_CAN_0, |
| 184 | NODE_CAN_1, |
Mirela Simonovic | cd16582 | 2017-01-30 17:44:00 +0100 | [diff] [blame] | 185 | NODE_EXTERN, |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 186 | NODE_APLL, |
| 187 | NODE_VPLL, |
| 188 | NODE_DPLL, |
| 189 | NODE_RPLL, |
| 190 | NODE_IOPLL, |
| 191 | NODE_DDR, |
Mirela Simonovic | 0ff06ce | 2016-06-07 18:15:40 +0200 | [diff] [blame] | 192 | NODE_IPI_APU, |
Mirela Simonovic | 9b984be | 2016-06-17 16:17:23 +0200 | [diff] [blame] | 193 | NODE_IPI_RPU_0, |
Filip Drazic | 35e99e2 | 2016-07-26 12:07:05 +0200 | [diff] [blame] | 194 | NODE_GPU, |
| 195 | NODE_PCIE, |
| 196 | NODE_PCAP, |
| 197 | NODE_RTC, |
Rajan Vaja | 670bec0 | 2018-01-18 22:54:07 -0800 | [diff] [blame] | 198 | NODE_LPD, |
| 199 | NODE_VCU, |
| 200 | NODE_IPI_RPU_1, |
| 201 | NODE_IPI_PL_0, |
| 202 | NODE_IPI_PL_1, |
| 203 | NODE_IPI_PL_2, |
| 204 | NODE_IPI_PL_3, |
| 205 | NODE_PL, |
Rajan Vaja | 0ac2be1 | 2018-01-17 02:39:21 -0800 | [diff] [blame] | 206 | NODE_GEM_TSU, |
| 207 | NODE_SWDT_0, |
| 208 | NODE_SWDT_1, |
| 209 | NODE_CSU, |
| 210 | NODE_PJTAG, |
| 211 | NODE_TRACE, |
| 212 | NODE_TESTSCAN, |
| 213 | NODE_PMU, |
| 214 | NODE_MAX, |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 215 | }; |
| 216 | |
| 217 | enum pm_request_ack { |
| 218 | REQ_ACK_NO = 1, |
| 219 | REQ_ACK_BLOCKING, |
| 220 | REQ_ACK_NON_BLOCKING, |
| 221 | }; |
| 222 | |
| 223 | enum pm_abort_reason { |
| 224 | ABORT_REASON_WKUP_EVENT = 100, |
| 225 | ABORT_REASON_PU_BUSY, |
| 226 | ABORT_REASON_NO_PWRDN, |
| 227 | ABORT_REASON_UNKNOWN, |
| 228 | }; |
| 229 | |
| 230 | enum pm_suspend_reason { |
| 231 | SUSPEND_REASON_PU_REQ = 201, |
| 232 | SUSPEND_REASON_ALERT, |
| 233 | SUSPEND_REASON_SYS_SHUTDOWN, |
| 234 | }; |
| 235 | |
| 236 | enum pm_ram_state { |
| 237 | PM_RAM_STATE_OFF = 1, |
| 238 | PM_RAM_STATE_RETENTION, |
| 239 | PM_RAM_STATE_ON, |
| 240 | }; |
| 241 | |
| 242 | enum pm_opchar_type { |
| 243 | PM_OPCHAR_TYPE_POWER = 1, |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 244 | PM_OPCHAR_TYPE_TEMP, |
Anes Hadziahmetagic | 92aee01 | 2016-05-12 16:17:30 +0200 | [diff] [blame] | 245 | PM_OPCHAR_TYPE_LATENCY, |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 246 | }; |
| 247 | |
| 248 | /** |
| 249 | * @PM_RET_SUCCESS: success |
Davorin Mista | 8e05901 | 2018-08-24 17:09:06 +0200 | [diff] [blame] | 250 | * @PM_RET_ERROR_ARGS: illegal arguments provided (deprecated) |
| 251 | * @PM_RET_ERROR_NOTSUPPORTED: feature not supported (deprecated) |
Vesa Jääskeläinen | 28f9ce5 | 2022-04-29 08:47:24 +0300 | [diff] [blame] | 252 | * @PM_RET_ERROR_NOT_ENABLED: feature is not enabled |
Davorin Mista | 8e05901 | 2018-08-24 17:09:06 +0200 | [diff] [blame] | 253 | * @PM_RET_ERROR_INTERNAL: internal error |
| 254 | * @PM_RET_ERROR_CONFLICT: conflict |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 255 | * @PM_RET_ERROR_ACCESS: access rights violation |
Davorin Mista | 8e05901 | 2018-08-24 17:09:06 +0200 | [diff] [blame] | 256 | * @PM_RET_ERROR_INVALID_NODE: invalid node |
| 257 | * @PM_RET_ERROR_DOUBLE_REQ: duplicate request for same node |
| 258 | * @PM_RET_ERROR_ABORT_SUSPEND: suspend procedure has been aborted |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 259 | * @PM_RET_ERROR_TIMEOUT: timeout in communication with PMU |
Davorin Mista | 8e05901 | 2018-08-24 17:09:06 +0200 | [diff] [blame] | 260 | * @PM_RET_ERROR_NODE_USED: node is already in use |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 261 | */ |
| 262 | enum pm_ret_status { |
HariBabu Gattem | 9f9db61 | 2022-09-15 22:35:11 -0700 | [diff] [blame] | 263 | PM_RET_SUCCESS = (0U), |
| 264 | PM_RET_ERROR_ARGS = (1U), |
| 265 | PM_RET_ERROR_NOTSUPPORTED = (4U), |
| 266 | PM_RET_ERROR_NOT_ENABLED = (29U), |
| 267 | PM_RET_ERROR_INTERNAL = (2000U), |
| 268 | PM_RET_ERROR_CONFLICT = (2001U), |
| 269 | PM_RET_ERROR_ACCESS = (2002U), |
| 270 | PM_RET_ERROR_INVALID_NODE = (2003U), |
| 271 | PM_RET_ERROR_DOUBLE_REQ = (2004U), |
| 272 | PM_RET_ERROR_ABORT_SUSPEND = (2005U), |
| 273 | PM_RET_ERROR_TIMEOUT = (2006U), |
| 274 | PM_RET_ERROR_NODE_USED = (2007U), |
| 275 | PM_RET_ERROR_NO_FEATURE = (2008U) |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 276 | }; |
| 277 | |
| 278 | /** |
| 279 | * @PM_INITIAL_BOOT: boot is a fresh system startup |
| 280 | * @PM_RESUME: boot is a resume |
| 281 | * @PM_BOOT_ERROR: error, boot cause cannot be identified |
| 282 | */ |
| 283 | enum pm_boot_status { |
| 284 | PM_INITIAL_BOOT, |
| 285 | PM_RESUME, |
| 286 | PM_BOOT_ERROR, |
| 287 | }; |
| 288 | |
Siva Durga Prasad Paladugu | 1f80d3f | 2018-04-30 15:56:10 +0530 | [diff] [blame] | 289 | /** |
| 290 | * @PMF_SHUTDOWN_TYPE_SHUTDOWN: shutdown |
| 291 | * @PMF_SHUTDOWN_TYPE_RESET: reset/reboot |
| 292 | * @PMF_SHUTDOWN_TYPE_SETSCOPE_ONLY: set the shutdown/reboot scope |
| 293 | */ |
Soren Brinkmann | 58fbb9b | 2016-09-02 09:50:54 -0700 | [diff] [blame] | 294 | enum pm_shutdown_type { |
| 295 | PMF_SHUTDOWN_TYPE_SHUTDOWN, |
| 296 | PMF_SHUTDOWN_TYPE_RESET, |
Siva Durga Prasad Paladugu | 1f80d3f | 2018-04-30 15:56:10 +0530 | [diff] [blame] | 297 | PMF_SHUTDOWN_TYPE_SETSCOPE_ONLY, |
Soren Brinkmann | 58fbb9b | 2016-09-02 09:50:54 -0700 | [diff] [blame] | 298 | }; |
| 299 | |
Siva Durga Prasad Paladugu | 1f80d3f | 2018-04-30 15:56:10 +0530 | [diff] [blame] | 300 | /** |
| 301 | * @PMF_SHUTDOWN_SUBTYPE_SUBSYSTEM: shutdown/reboot APU subsystem only |
| 302 | * @PMF_SHUTDOWN_SUBTYPE_PS_ONLY: shutdown/reboot entire PS (but not PL) |
| 303 | * @PMF_SHUTDOWN_SUBTYPE_SYSTEM: shutdown/reboot entire system |
| 304 | */ |
Soren Brinkmann | 58fbb9b | 2016-09-02 09:50:54 -0700 | [diff] [blame] | 305 | enum pm_shutdown_subtype { |
| 306 | PMF_SHUTDOWN_SUBTYPE_SUBSYSTEM, |
| 307 | PMF_SHUTDOWN_SUBTYPE_PS_ONLY, |
| 308 | PMF_SHUTDOWN_SUBTYPE_SYSTEM, |
| 309 | }; |
| 310 | |
Jolly Shah | a7cc5ee | 2019-01-02 12:27:00 -0800 | [diff] [blame] | 311 | /** |
Michal Simek | 08341b7 | 2022-03-09 08:53:20 +0100 | [diff] [blame] | 312 | * @PM_PLL_PARAM_DIV2: Enable for divide by 2 function inside the PLL |
| 313 | * @PM_PLL_PARAM_FBDIV: Feedback divisor integer portion for the PLL |
| 314 | * @PM_PLL_PARAM_DATA: Feedback divisor fractional portion for the PLL |
| 315 | * @PM_PLL_PARAM_PRE_SRC: Clock source for PLL input |
| 316 | * @PM_PLL_PARAM_POST_SRC: Clock source for PLL Bypass mode |
| 317 | * @PM_PLL_PARAM_LOCK_DLY: Lock circuit config settings for lock windowsize |
| 318 | * @PM_PLL_PARAM_LOCK_CNT: Lock circuit counter setting |
| 319 | * @PM_PLL_PARAM_LFHF: PLL loop filter high frequency capacitor control |
| 320 | * @PM_PLL_PARAM_CP: PLL charge pump control |
| 321 | * @PM_PLL_PARAM_RES: PLL loop filter resistor control |
Jolly Shah | a7cc5ee | 2019-01-02 12:27:00 -0800 | [diff] [blame] | 322 | */ |
| 323 | enum pm_pll_param { |
| 324 | PM_PLL_PARAM_DIV2, |
| 325 | PM_PLL_PARAM_FBDIV, |
| 326 | PM_PLL_PARAM_DATA, |
| 327 | PM_PLL_PARAM_PRE_SRC, |
| 328 | PM_PLL_PARAM_POST_SRC, |
| 329 | PM_PLL_PARAM_LOCK_DLY, |
| 330 | PM_PLL_PARAM_LOCK_CNT, |
| 331 | PM_PLL_PARAM_LFHF, |
| 332 | PM_PLL_PARAM_CP, |
| 333 | PM_PLL_PARAM_RES, |
| 334 | PM_PLL_PARAM_MAX, |
| 335 | }; |
| 336 | |
Jolly Shah | 1f0d585 | 2019-01-04 11:32:31 -0800 | [diff] [blame] | 337 | /** |
Michal Simek | 08341b7 | 2022-03-09 08:53:20 +0100 | [diff] [blame] | 338 | * @PM_PLL_MODE_RESET: PLL is in reset (not locked) |
| 339 | * @PM_PLL_MODE_INTEGER: PLL is locked in integer mode |
| 340 | * @PM_PLL_MODE_FRACTIONAL: PLL is locked in fractional mode |
Jolly Shah | 1f0d585 | 2019-01-04 11:32:31 -0800 | [diff] [blame] | 341 | */ |
| 342 | enum pm_pll_mode { |
| 343 | PM_PLL_MODE_RESET, |
| 344 | PM_PLL_MODE_INTEGER, |
| 345 | PM_PLL_MODE_FRACTIONAL, |
| 346 | PM_PLL_MODE_MAX, |
| 347 | }; |
Jolly Shah | a7cc5ee | 2019-01-02 12:27:00 -0800 | [diff] [blame] | 348 | |
Jolly Shah | 8b4c4c7 | 2019-01-04 11:49:46 -0800 | [diff] [blame] | 349 | /** |
Michal Simek | 08341b7 | 2022-03-09 08:53:20 +0100 | [diff] [blame] | 350 | * @PM_CLOCK_DIV0_ID: Clock divider 0 |
| 351 | * @PM_CLOCK_DIV1_ID: Clock divider 1 |
Jolly Shah | 8b4c4c7 | 2019-01-04 11:49:46 -0800 | [diff] [blame] | 352 | */ |
| 353 | enum pm_clock_div_id { |
| 354 | PM_CLOCK_DIV0_ID, |
| 355 | PM_CLOCK_DIV1_ID, |
| 356 | }; |
| 357 | |
Venkatesh Yadav Abbarapu | 7ace4af | 2020-11-23 04:26:54 -0800 | [diff] [blame] | 358 | /** |
| 359 | * EM API IDs |
| 360 | */ |
| 361 | enum em_api_id { |
| 362 | EM_SET_ACTION = 1, |
| 363 | EM_REMOVE_ACTION, |
| 364 | EM_SEND_ERRORS, |
| 365 | }; |
| 366 | |
Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 367 | #endif /* PM_DEFS_H */ |