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Soren Brinkmann76fcae32016-03-06 20:16:27 -08001/*
Ravi Patel2f34d362021-04-15 05:55:19 -07002 * Copyright (c) 2013-2022, ARM Limited and Contributors. All rights reserved.
Soren Brinkmann76fcae32016-03-06 20:16:27 -08003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Soren Brinkmann76fcae32016-03-06 20:16:27 -08005 */
6
7/* ZynqMP power management enums and defines */
8
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00009#ifndef PM_DEFS_H
10#define PM_DEFS_H
Soren Brinkmann76fcae32016-03-06 20:16:27 -080011
12/*********************************************************************
13 * Macro definitions
14 ********************************************************************/
15
16/*
17 * Version number is a 32bit value, like:
18 * (PM_VERSION_MAJOR << 16) | PM_VERSION_MINOR
19 */
Jolly Shahabee2a42018-02-07 15:37:01 -080020#define PM_VERSION_MAJOR 1
Rajan Vaja720fd9d2018-10-05 04:42:57 -070021#define PM_VERSION_MINOR 1
Soren Brinkmann76fcae32016-03-06 20:16:27 -080022
23#define PM_VERSION ((PM_VERSION_MAJOR << 16) | PM_VERSION_MINOR)
24
Ronak Jain325bad12021-12-21 01:39:59 -080025/**
26 * PM API versions
27 */
28/* Expected version of firmware APIs */
29#define FW_API_BASE_VERSION (1U)
30/* Expected version of firmware API for feature check */
31#define FW_API_VERSION_2 (2U)
32/* Version of APIs implemented in ATF */
33#define ATF_API_BASE_VERSION (1U)
34
Soren Brinkmann76fcae32016-03-06 20:16:27 -080035/* Capabilities for RAM */
36#define PM_CAP_ACCESS 0x1U
37#define PM_CAP_CONTEXT 0x2U
38
39#define MAX_LATENCY (~0U)
40#define MAX_QOS 100U
41
Filip Drazic0bd9d0c2016-07-20 17:17:39 +020042/* State arguments of the self suspend */
43#define PM_STATE_CPU_IDLE 0x0U
44#define PM_STATE_SUSPEND_TO_RAM 0xFU
45
Ravi Patel2f34d362021-04-15 05:55:19 -070046/* APU processor states */
47#define PM_PROC_STATE_FORCEDOFF 0U
48#define PM_PROC_STATE_ACTIVE 1U
49#define PM_PROC_STATE_SLEEP 2U
50#define PM_PROC_STATE_SUSPENDING 3U
51
Venkatesh Yadav Abbarapu7ace4af2020-11-23 04:26:54 -080052#define EM_FUNID_NUM_MASK 0xF0000U
Ronak Jain325bad12021-12-21 01:39:59 -080053
54#define PM_GET_CALLBACK_DATA 0xa01
55#define PM_SET_SUSPEND_MODE 0xa02
56#define PM_GET_TRUSTZONE_VERSION 0xa03
57
Soren Brinkmann76fcae32016-03-06 20:16:27 -080058/*********************************************************************
59 * Enum definitions
60 ********************************************************************/
61
62enum pm_api_id {
63 /* Miscellaneous API functions: */
64 PM_GET_API_VERSION = 1, /* Do not change or move */
65 PM_SET_CONFIGURATION,
66 PM_GET_NODE_STATUS,
67 PM_GET_OP_CHARACTERISTIC,
68 PM_REGISTER_NOTIFIER,
69 /* API for suspending of PUs: */
70 PM_REQ_SUSPEND,
71 PM_SELF_SUSPEND,
72 PM_FORCE_POWERDOWN,
73 PM_ABORT_SUSPEND,
74 PM_REQ_WAKEUP,
75 PM_SET_WAKEUP_SOURCE,
76 PM_SYSTEM_SHUTDOWN,
77 /* API for managing PM slaves: */
78 PM_REQ_NODE,
79 PM_RELEASE_NODE,
80 PM_SET_REQUIREMENT,
81 PM_SET_MAX_LATENCY,
82 /* Direct control API functions: */
83 PM_RESET_ASSERT,
84 PM_RESET_GET_STATUS,
85 PM_MMIO_WRITE,
86 PM_MMIO_READ,
Filip Drazicca1e0af2017-03-16 16:56:53 +010087 PM_INIT_FINALIZE,
Nava kishore Manne68d460c2016-08-20 23:18:09 +053088 PM_FPGA_LOAD,
89 PM_FPGA_GET_STATUS,
Siva Durga Prasad Paladugu16427d12016-08-24 11:45:47 +053090 PM_GET_CHIPID,
Rajan Vaja670bec02018-01-18 22:54:07 -080091 PM_SECURE_RSA_AES,
92 PM_SECURE_SHA,
93 PM_SECURE_RSA,
Rajan Vaja83687612018-01-17 02:39:20 -080094 PM_PINCTRL_REQUEST,
95 PM_PINCTRL_RELEASE,
96 PM_PINCTRL_GET_FUNCTION,
97 PM_PINCTRL_SET_FUNCTION,
98 PM_PINCTRL_CONFIG_PARAM_GET,
99 PM_PINCTRL_CONFIG_PARAM_SET,
Rajan Vaja5529a012018-01-17 02:39:23 -0800100 PM_IOCTL,
Rajan Vaja35116132018-01-17 02:39:25 -0800101 /* API to query information from firmware */
102 PM_QUERY_DATA,
103 /* Clock control API functions */
104 PM_CLOCK_ENABLE,
105 PM_CLOCK_DISABLE,
106 PM_CLOCK_GETSTATE,
107 PM_CLOCK_SETDIVIDER,
108 PM_CLOCK_GETDIVIDER,
109 PM_CLOCK_SETRATE,
110 PM_CLOCK_GETRATE,
111 PM_CLOCK_SETPARENT,
112 PM_CLOCK_GETPARENT,
Siva Durga Prasad Paladugua4ed4b22018-04-30 20:06:58 +0530113 PM_SECURE_IMAGE,
Siva Durga Prasad Paladugu7c6516a2018-09-04 17:41:34 +0530114 /* FPGA PL Readback */
115 PM_FPGA_READ,
Siva Durga Prasad Paladugu8bd905b2018-09-04 18:05:50 +0530116 PM_SECURE_AES,
Jolly Shaha7cc5ee2019-01-02 12:27:00 -0800117 /* PLL control API functions */
118 PM_PLL_SET_PARAMETER,
Jolly Shahcb2f45d2019-01-04 11:28:38 -0800119 PM_PLL_GET_PARAMETER,
Jolly Shah1f0d5852019-01-04 11:32:31 -0800120 PM_PLL_SET_MODE,
Jolly Shah141421e2019-01-04 11:35:48 -0800121 PM_PLL_GET_MODE,
Kalyani Akula6ebe4832020-11-22 22:42:10 -0800122 /* PM Register Access API */
123 PM_REGISTER_ACCESS,
VNSL Durgadeb1a362020-11-23 04:46:04 -0800124 PM_EFUSE_ACCESS,
Nava kishore Manne2af6d532022-01-13 13:29:36 +0530125 PM_FPGA_GET_VERSION,
126 PM_FPGA_GET_FEATURE_LIST,
Ronak Jain325bad12021-12-21 01:39:59 -0800127 PM_FEATURE_CHECK = 63,
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800128 PM_API_MAX
129};
130
131enum pm_node_id {
132 NODE_UNKNOWN = 0,
133 NODE_APU,
134 NODE_APU_0,
135 NODE_APU_1,
136 NODE_APU_2,
137 NODE_APU_3,
138 NODE_RPU,
139 NODE_RPU_0,
140 NODE_RPU_1,
Rajan Vaja670bec02018-01-18 22:54:07 -0800141 NODE_PLD,
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800142 NODE_FPD,
143 NODE_OCM_BANK_0,
144 NODE_OCM_BANK_1,
145 NODE_OCM_BANK_2,
146 NODE_OCM_BANK_3,
147 NODE_TCM_0_A,
148 NODE_TCM_0_B,
149 NODE_TCM_1_A,
150 NODE_TCM_1_B,
151 NODE_L2,
152 NODE_GPU_PP_0,
153 NODE_GPU_PP_1,
154 NODE_USB_0,
155 NODE_USB_1,
156 NODE_TTC_0,
157 NODE_TTC_1,
158 NODE_TTC_2,
159 NODE_TTC_3,
160 NODE_SATA,
161 NODE_ETH_0,
162 NODE_ETH_1,
163 NODE_ETH_2,
164 NODE_ETH_3,
165 NODE_UART_0,
166 NODE_UART_1,
167 NODE_SPI_0,
168 NODE_SPI_1,
169 NODE_I2C_0,
170 NODE_I2C_1,
171 NODE_SD_0,
172 NODE_SD_1,
173 NODE_DP,
174 NODE_GDMA,
175 NODE_ADMA,
176 NODE_NAND,
177 NODE_QSPI,
178 NODE_GPIO,
179 NODE_CAN_0,
180 NODE_CAN_1,
Mirela Simonoviccd165822017-01-30 17:44:00 +0100181 NODE_EXTERN,
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800182 NODE_APLL,
183 NODE_VPLL,
184 NODE_DPLL,
185 NODE_RPLL,
186 NODE_IOPLL,
187 NODE_DDR,
Mirela Simonovic0ff06ce2016-06-07 18:15:40 +0200188 NODE_IPI_APU,
Mirela Simonovic9b984be2016-06-17 16:17:23 +0200189 NODE_IPI_RPU_0,
Filip Drazic35e99e22016-07-26 12:07:05 +0200190 NODE_GPU,
191 NODE_PCIE,
192 NODE_PCAP,
193 NODE_RTC,
Rajan Vaja670bec02018-01-18 22:54:07 -0800194 NODE_LPD,
195 NODE_VCU,
196 NODE_IPI_RPU_1,
197 NODE_IPI_PL_0,
198 NODE_IPI_PL_1,
199 NODE_IPI_PL_2,
200 NODE_IPI_PL_3,
201 NODE_PL,
Rajan Vaja0ac2be12018-01-17 02:39:21 -0800202 NODE_GEM_TSU,
203 NODE_SWDT_0,
204 NODE_SWDT_1,
205 NODE_CSU,
206 NODE_PJTAG,
207 NODE_TRACE,
208 NODE_TESTSCAN,
209 NODE_PMU,
210 NODE_MAX,
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800211};
212
213enum pm_request_ack {
214 REQ_ACK_NO = 1,
215 REQ_ACK_BLOCKING,
216 REQ_ACK_NON_BLOCKING,
217};
218
219enum pm_abort_reason {
220 ABORT_REASON_WKUP_EVENT = 100,
221 ABORT_REASON_PU_BUSY,
222 ABORT_REASON_NO_PWRDN,
223 ABORT_REASON_UNKNOWN,
224};
225
226enum pm_suspend_reason {
227 SUSPEND_REASON_PU_REQ = 201,
228 SUSPEND_REASON_ALERT,
229 SUSPEND_REASON_SYS_SHUTDOWN,
230};
231
232enum pm_ram_state {
233 PM_RAM_STATE_OFF = 1,
234 PM_RAM_STATE_RETENTION,
235 PM_RAM_STATE_ON,
236};
237
238enum pm_opchar_type {
239 PM_OPCHAR_TYPE_POWER = 1,
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800240 PM_OPCHAR_TYPE_TEMP,
Anes Hadziahmetagic92aee012016-05-12 16:17:30 +0200241 PM_OPCHAR_TYPE_LATENCY,
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800242};
243
244/**
245 * @PM_RET_SUCCESS: success
Davorin Mista8e059012018-08-24 17:09:06 +0200246 * @PM_RET_ERROR_ARGS: illegal arguments provided (deprecated)
247 * @PM_RET_ERROR_NOTSUPPORTED: feature not supported (deprecated)
248 * @PM_RET_ERROR_INTERNAL: internal error
249 * @PM_RET_ERROR_CONFLICT: conflict
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800250 * @PM_RET_ERROR_ACCESS: access rights violation
Davorin Mista8e059012018-08-24 17:09:06 +0200251 * @PM_RET_ERROR_INVALID_NODE: invalid node
252 * @PM_RET_ERROR_DOUBLE_REQ: duplicate request for same node
253 * @PM_RET_ERROR_ABORT_SUSPEND: suspend procedure has been aborted
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800254 * @PM_RET_ERROR_TIMEOUT: timeout in communication with PMU
Davorin Mista8e059012018-08-24 17:09:06 +0200255 * @PM_RET_ERROR_NODE_USED: node is already in use
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800256 */
257enum pm_ret_status {
258 PM_RET_SUCCESS,
Davorin Mista8e059012018-08-24 17:09:06 +0200259 PM_RET_ERROR_ARGS = 1,
260 PM_RET_ERROR_NOTSUPPORTED = 4,
261 PM_RET_ERROR_INTERNAL = 2000,
262 PM_RET_ERROR_CONFLICT = 2001,
263 PM_RET_ERROR_ACCESS = 2002,
264 PM_RET_ERROR_INVALID_NODE = 2003,
265 PM_RET_ERROR_DOUBLE_REQ = 2004,
266 PM_RET_ERROR_ABORT_SUSPEND = 2005,
267 PM_RET_ERROR_TIMEOUT = 2006,
Ronak Jain325bad12021-12-21 01:39:59 -0800268 PM_RET_ERROR_NODE_USED = 2007,
269 PM_RET_ERROR_NO_FEATURE = 2008
Soren Brinkmann76fcae32016-03-06 20:16:27 -0800270};
271
272/**
273 * @PM_INITIAL_BOOT: boot is a fresh system startup
274 * @PM_RESUME: boot is a resume
275 * @PM_BOOT_ERROR: error, boot cause cannot be identified
276 */
277enum pm_boot_status {
278 PM_INITIAL_BOOT,
279 PM_RESUME,
280 PM_BOOT_ERROR,
281};
282
Siva Durga Prasad Paladugu1f80d3f2018-04-30 15:56:10 +0530283/**
284 * @PMF_SHUTDOWN_TYPE_SHUTDOWN: shutdown
285 * @PMF_SHUTDOWN_TYPE_RESET: reset/reboot
286 * @PMF_SHUTDOWN_TYPE_SETSCOPE_ONLY: set the shutdown/reboot scope
287 */
Soren Brinkmann58fbb9b2016-09-02 09:50:54 -0700288enum pm_shutdown_type {
289 PMF_SHUTDOWN_TYPE_SHUTDOWN,
290 PMF_SHUTDOWN_TYPE_RESET,
Siva Durga Prasad Paladugu1f80d3f2018-04-30 15:56:10 +0530291 PMF_SHUTDOWN_TYPE_SETSCOPE_ONLY,
Soren Brinkmann58fbb9b2016-09-02 09:50:54 -0700292};
293
Siva Durga Prasad Paladugu1f80d3f2018-04-30 15:56:10 +0530294/**
295 * @PMF_SHUTDOWN_SUBTYPE_SUBSYSTEM: shutdown/reboot APU subsystem only
296 * @PMF_SHUTDOWN_SUBTYPE_PS_ONLY: shutdown/reboot entire PS (but not PL)
297 * @PMF_SHUTDOWN_SUBTYPE_SYSTEM: shutdown/reboot entire system
298 */
Soren Brinkmann58fbb9b2016-09-02 09:50:54 -0700299enum pm_shutdown_subtype {
300 PMF_SHUTDOWN_SUBTYPE_SUBSYSTEM,
301 PMF_SHUTDOWN_SUBTYPE_PS_ONLY,
302 PMF_SHUTDOWN_SUBTYPE_SYSTEM,
303};
304
Jolly Shaha7cc5ee2019-01-02 12:27:00 -0800305/**
Michal Simek08341b72022-03-09 08:53:20 +0100306 * @PM_PLL_PARAM_DIV2: Enable for divide by 2 function inside the PLL
307 * @PM_PLL_PARAM_FBDIV: Feedback divisor integer portion for the PLL
308 * @PM_PLL_PARAM_DATA: Feedback divisor fractional portion for the PLL
309 * @PM_PLL_PARAM_PRE_SRC: Clock source for PLL input
310 * @PM_PLL_PARAM_POST_SRC: Clock source for PLL Bypass mode
311 * @PM_PLL_PARAM_LOCK_DLY: Lock circuit config settings for lock windowsize
312 * @PM_PLL_PARAM_LOCK_CNT: Lock circuit counter setting
313 * @PM_PLL_PARAM_LFHF: PLL loop filter high frequency capacitor control
314 * @PM_PLL_PARAM_CP: PLL charge pump control
315 * @PM_PLL_PARAM_RES: PLL loop filter resistor control
Jolly Shaha7cc5ee2019-01-02 12:27:00 -0800316 */
317enum pm_pll_param {
318 PM_PLL_PARAM_DIV2,
319 PM_PLL_PARAM_FBDIV,
320 PM_PLL_PARAM_DATA,
321 PM_PLL_PARAM_PRE_SRC,
322 PM_PLL_PARAM_POST_SRC,
323 PM_PLL_PARAM_LOCK_DLY,
324 PM_PLL_PARAM_LOCK_CNT,
325 PM_PLL_PARAM_LFHF,
326 PM_PLL_PARAM_CP,
327 PM_PLL_PARAM_RES,
328 PM_PLL_PARAM_MAX,
329};
330
Jolly Shah1f0d5852019-01-04 11:32:31 -0800331/**
Michal Simek08341b72022-03-09 08:53:20 +0100332 * @PM_PLL_MODE_RESET: PLL is in reset (not locked)
333 * @PM_PLL_MODE_INTEGER: PLL is locked in integer mode
334 * @PM_PLL_MODE_FRACTIONAL: PLL is locked in fractional mode
Jolly Shah1f0d5852019-01-04 11:32:31 -0800335 */
336enum pm_pll_mode {
337 PM_PLL_MODE_RESET,
338 PM_PLL_MODE_INTEGER,
339 PM_PLL_MODE_FRACTIONAL,
340 PM_PLL_MODE_MAX,
341};
Jolly Shaha7cc5ee2019-01-02 12:27:00 -0800342
Jolly Shah8b4c4c72019-01-04 11:49:46 -0800343/**
Michal Simek08341b72022-03-09 08:53:20 +0100344 * @PM_CLOCK_DIV0_ID: Clock divider 0
345 * @PM_CLOCK_DIV1_ID: Clock divider 1
Jolly Shah8b4c4c72019-01-04 11:49:46 -0800346 */
347enum pm_clock_div_id {
348 PM_CLOCK_DIV0_ID,
349 PM_CLOCK_DIV1_ID,
350};
351
Venkatesh Yadav Abbarapu7ace4af2020-11-23 04:26:54 -0800352/**
353 * EM API IDs
354 */
355enum em_api_id {
356 EM_SET_ACTION = 1,
357 EM_REMOVE_ACTION,
358 EM_SEND_ERRORS,
359};
360
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +0000361#endif /* PM_DEFS_H */