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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Daniel Boulbyf45a4bb2018-09-18 13:26:03 +01002 * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta4f6ad662013-10-25 09:08:21 +01005 */
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Achin Gupta4f6ad662013-10-25 09:08:21 +01007#include <bakery_lock.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +01008#include <mmio.h>
Dan Handley2b6b5742015-03-19 19:17:53 +00009#include <plat_arm.h>
Dan Handleyed6ff952014-05-14 17:44:19 +010010#include "../../fvp_def.h"
Soby Mathew523d6332015-01-08 18:02:19 +000011#include "../../fvp_private.h"
Dan Handley4d2e49d2014-04-11 11:52:12 +010012#include "fvp_pwrc.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010013
14/*
15 * TODO: Someday there will be a generic power controller api. At the moment
16 * each platform has its own pwrc so just exporting functions is fine.
17 */
Jeenu Viswambharan749d25b2017-08-23 14:12:59 +010018ARM_INSTANTIATE_LOCK;
Achin Gupta4f6ad662013-10-25 09:08:21 +010019
Soby Mathewa0fedc42016-06-16 14:52:04 +010020unsigned int fvp_pwrc_get_cpu_wkr(u_register_t mpidr)
Achin Gupta4f6ad662013-10-25 09:08:21 +010021{
Andrew Thoelke958cc022014-06-09 12:54:15 +010022 return PSYSR_WK(fvp_pwrc_read_psysr(mpidr));
Achin Gupta4f6ad662013-10-25 09:08:21 +010023}
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Soby Mathewa0fedc42016-06-16 14:52:04 +010025unsigned int fvp_pwrc_read_psysr(u_register_t mpidr)
Achin Gupta4f6ad662013-10-25 09:08:21 +010026{
Andrew Thoelke958cc022014-06-09 12:54:15 +010027 unsigned int rc;
Dan Handley2b6b5742015-03-19 19:17:53 +000028 arm_lock_get();
Achin Gupta4f6ad662013-10-25 09:08:21 +010029 mmio_write_32(PWRC_BASE + PSYSR_OFF, (unsigned int) mpidr);
30 rc = mmio_read_32(PWRC_BASE + PSYSR_OFF);
Dan Handley2b6b5742015-03-19 19:17:53 +000031 arm_lock_release();
Achin Gupta4f6ad662013-10-25 09:08:21 +010032 return rc;
33}
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Soby Mathewa0fedc42016-06-16 14:52:04 +010035void fvp_pwrc_write_pponr(u_register_t mpidr)
Achin Gupta4f6ad662013-10-25 09:08:21 +010036{
Dan Handley2b6b5742015-03-19 19:17:53 +000037 arm_lock_get();
Achin Gupta4f6ad662013-10-25 09:08:21 +010038 mmio_write_32(PWRC_BASE + PPONR_OFF, (unsigned int) mpidr);
Dan Handley2b6b5742015-03-19 19:17:53 +000039 arm_lock_release();
Achin Gupta4f6ad662013-10-25 09:08:21 +010040}
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Soby Mathewa0fedc42016-06-16 14:52:04 +010042void fvp_pwrc_write_ppoffr(u_register_t mpidr)
Achin Gupta4f6ad662013-10-25 09:08:21 +010043{
Dan Handley2b6b5742015-03-19 19:17:53 +000044 arm_lock_get();
Achin Gupta4f6ad662013-10-25 09:08:21 +010045 mmio_write_32(PWRC_BASE + PPOFFR_OFF, (unsigned int) mpidr);
Dan Handley2b6b5742015-03-19 19:17:53 +000046 arm_lock_release();
Achin Gupta4f6ad662013-10-25 09:08:21 +010047}
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Soby Mathewa0fedc42016-06-16 14:52:04 +010049void fvp_pwrc_set_wen(u_register_t mpidr)
Achin Gupta4f6ad662013-10-25 09:08:21 +010050{
Dan Handley2b6b5742015-03-19 19:17:53 +000051 arm_lock_get();
Achin Gupta4f6ad662013-10-25 09:08:21 +010052 mmio_write_32(PWRC_BASE + PWKUPR_OFF,
53 (unsigned int) (PWKUPR_WEN | mpidr));
Dan Handley2b6b5742015-03-19 19:17:53 +000054 arm_lock_release();
Achin Gupta4f6ad662013-10-25 09:08:21 +010055}
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Soby Mathewa0fedc42016-06-16 14:52:04 +010057void fvp_pwrc_clr_wen(u_register_t mpidr)
Achin Guptab127cdb2013-11-12 16:40:00 +000058{
Dan Handley2b6b5742015-03-19 19:17:53 +000059 arm_lock_get();
Achin Guptab127cdb2013-11-12 16:40:00 +000060 mmio_write_32(PWRC_BASE + PWKUPR_OFF,
61 (unsigned int) mpidr);
Dan Handley2b6b5742015-03-19 19:17:53 +000062 arm_lock_release();
Achin Guptab127cdb2013-11-12 16:40:00 +000063}
64
Soby Mathewa0fedc42016-06-16 14:52:04 +010065void fvp_pwrc_write_pcoffr(u_register_t mpidr)
Achin Gupta4f6ad662013-10-25 09:08:21 +010066{
Dan Handley2b6b5742015-03-19 19:17:53 +000067 arm_lock_get();
Achin Gupta4f6ad662013-10-25 09:08:21 +010068 mmio_write_32(PWRC_BASE + PCOFFR_OFF, (unsigned int) mpidr);
Dan Handley2b6b5742015-03-19 19:17:53 +000069 arm_lock_release();
Achin Gupta4f6ad662013-10-25 09:08:21 +010070}
71
72/* Nothing else to do here apart from initializing the lock */
Daniel Boulbyf45a4bb2018-09-18 13:26:03 +010073void __init plat_arm_pwrc_setup(void)
Achin Gupta4f6ad662013-10-25 09:08:21 +010074{
Dan Handley2b6b5742015-03-19 19:17:53 +000075 arm_lock_init();
Achin Gupta4f6ad662013-10-25 09:08:21 +010076}
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