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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Achin Gupta4f6ad662013-10-25 09:08:21 +010031#include <bakery_lock.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010032#include <mmio.h>
Dan Handleyed6ff952014-05-14 17:44:19 +010033#include "../../fvp_def.h"
Soby Mathew523d6332015-01-08 18:02:19 +000034#include "../../fvp_private.h"
Dan Handley4d2e49d2014-04-11 11:52:12 +010035#include "fvp_pwrc.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010036
37/*
38 * TODO: Someday there will be a generic power controller api. At the moment
39 * each platform has its own pwrc so just exporting functions is fine.
40 */
Soby Mathew523d6332015-01-08 18:02:19 +000041#if USE_COHERENT_MEM
Dan Handleye2712bc2014-04-10 15:37:22 +010042static bakery_lock_t pwrc_lock __attribute__ ((section("tzfw_coherent_mem")));
Soby Mathew523d6332015-01-08 18:02:19 +000043#define LOCK_ARG &pwrc_lock
44#else
45#define LOCK_ARG FVP_PWRC_BAKERY_ID
46#endif
Achin Gupta4f6ad662013-10-25 09:08:21 +010047
48unsigned int fvp_pwrc_get_cpu_wkr(unsigned long mpidr)
49{
Andrew Thoelke958cc022014-06-09 12:54:15 +010050 return PSYSR_WK(fvp_pwrc_read_psysr(mpidr));
Achin Gupta4f6ad662013-10-25 09:08:21 +010051}
52
53unsigned int fvp_pwrc_read_psysr(unsigned long mpidr)
54{
Andrew Thoelke958cc022014-06-09 12:54:15 +010055 unsigned int rc;
Soby Mathew523d6332015-01-08 18:02:19 +000056 fvp_lock_get(LOCK_ARG);
Achin Gupta4f6ad662013-10-25 09:08:21 +010057 mmio_write_32(PWRC_BASE + PSYSR_OFF, (unsigned int) mpidr);
58 rc = mmio_read_32(PWRC_BASE + PSYSR_OFF);
Soby Mathew523d6332015-01-08 18:02:19 +000059 fvp_lock_release(LOCK_ARG);
Achin Gupta4f6ad662013-10-25 09:08:21 +010060 return rc;
61}
62
63void fvp_pwrc_write_pponr(unsigned long mpidr)
64{
Soby Mathew523d6332015-01-08 18:02:19 +000065 fvp_lock_get(LOCK_ARG);
Achin Gupta4f6ad662013-10-25 09:08:21 +010066 mmio_write_32(PWRC_BASE + PPONR_OFF, (unsigned int) mpidr);
Soby Mathew523d6332015-01-08 18:02:19 +000067 fvp_lock_release(LOCK_ARG);
Achin Gupta4f6ad662013-10-25 09:08:21 +010068}
69
70void fvp_pwrc_write_ppoffr(unsigned long mpidr)
71{
Soby Mathew523d6332015-01-08 18:02:19 +000072 fvp_lock_get(LOCK_ARG);
Achin Gupta4f6ad662013-10-25 09:08:21 +010073 mmio_write_32(PWRC_BASE + PPOFFR_OFF, (unsigned int) mpidr);
Soby Mathew523d6332015-01-08 18:02:19 +000074 fvp_lock_release(LOCK_ARG);
Achin Gupta4f6ad662013-10-25 09:08:21 +010075}
76
Achin Guptab127cdb2013-11-12 16:40:00 +000077void fvp_pwrc_set_wen(unsigned long mpidr)
Achin Gupta4f6ad662013-10-25 09:08:21 +010078{
Soby Mathew523d6332015-01-08 18:02:19 +000079 fvp_lock_get(LOCK_ARG);
Achin Gupta4f6ad662013-10-25 09:08:21 +010080 mmio_write_32(PWRC_BASE + PWKUPR_OFF,
81 (unsigned int) (PWKUPR_WEN | mpidr));
Soby Mathew523d6332015-01-08 18:02:19 +000082 fvp_lock_release(LOCK_ARG);
Achin Gupta4f6ad662013-10-25 09:08:21 +010083}
84
Achin Guptab127cdb2013-11-12 16:40:00 +000085void fvp_pwrc_clr_wen(unsigned long mpidr)
86{
Soby Mathew523d6332015-01-08 18:02:19 +000087 fvp_lock_get(LOCK_ARG);
Achin Guptab127cdb2013-11-12 16:40:00 +000088 mmio_write_32(PWRC_BASE + PWKUPR_OFF,
89 (unsigned int) mpidr);
Soby Mathew523d6332015-01-08 18:02:19 +000090 fvp_lock_release(LOCK_ARG);
Achin Guptab127cdb2013-11-12 16:40:00 +000091}
92
Achin Gupta4f6ad662013-10-25 09:08:21 +010093void fvp_pwrc_write_pcoffr(unsigned long mpidr)
94{
Soby Mathew523d6332015-01-08 18:02:19 +000095 fvp_lock_get(LOCK_ARG);
Achin Gupta4f6ad662013-10-25 09:08:21 +010096 mmio_write_32(PWRC_BASE + PCOFFR_OFF, (unsigned int) mpidr);
Soby Mathew523d6332015-01-08 18:02:19 +000097 fvp_lock_release(LOCK_ARG);
Achin Gupta4f6ad662013-10-25 09:08:21 +010098}
99
100/* Nothing else to do here apart from initializing the lock */
101int fvp_pwrc_setup(void)
102{
Soby Mathew523d6332015-01-08 18:02:19 +0000103 fvp_lock_init(LOCK_ARG);
104
Achin Gupta4f6ad662013-10-25 09:08:21 +0100105 return 0;
106}
107
108
109