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Olivier Deprez7e5597c2022-07-20 17:37:23 +02001# Copyright (c) 2021-2022, Arm Limited. All rights reserved.
Usama Ariff1513622021-04-09 17:07:41 +01002#
3# SPDX-License-Identifier: BSD-3-Clause
4#
5
Chris Kaye9272152021-09-28 15:52:14 +01006include common/fdt_wrappers.mk
7
Manish V Badarkhe9bd11932022-11-11 09:36:29 +00008ifeq ($(TARGET_PLATFORM), 0)
9$(warning Platform ${PLAT}$(TARGET_PLATFORM) is deprecated. \
10Some of the features might not work as expected)
11endif
12
Rupinderjit Singh820b3b62022-04-04 17:28:41 +010013ifeq ($(shell expr $(TARGET_PLATFORM) \<= 2), 0)
14 $(error TARGET_PLATFORM must be less than or equal to 2)
Usama Ariff1513622021-04-09 17:07:41 +010015endif
16
Olivier Deprez7e5597c2022-07-20 17:37:23 +020017$(eval $(call add_define,TARGET_PLATFORM))
18
Usama Ariff1513622021-04-09 17:07:41 +010019CSS_LOAD_SCP_IMAGES := 1
20
21CSS_USE_SCMI_SDS_DRIVER := 1
22
23RAS_EXTENSION := 0
24
25SDEI_SUPPORT := 0
26
27EL3_EXCEPTION_HANDLING := 0
28
Manish Pandey0e3379d2022-10-10 11:43:08 +010029HANDLE_EA_EL3_FIRST_NS := 0
Usama Ariff1513622021-04-09 17:07:41 +010030
31# System coherency is managed in hardware
32HW_ASSISTED_COHERENCY := 1
33
34# When building for systems with hardware-assisted coherency, there's no need to
35# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too.
36USE_COHERENT_MEM := 0
37
38GIC_ENABLE_V4_EXTN := 1
39
40# GIC-600 configuration
41GICV3_SUPPORT_GIC600 := 1
42
Usama Arif1925c782021-08-20 20:53:34 +010043# Enable SVE
44ENABLE_SVE_FOR_NS := 1
45ENABLE_SVE_FOR_SWD := 1
Usama Ariff1513622021-04-09 17:07:41 +010046
Davidson K65361052021-10-13 18:49:41 +053047# enable trace buffer control registers access to NS by default
48ENABLE_TRBE_FOR_NS := 1
49
50# enable trace system registers access to NS by default
51ENABLE_SYS_REG_TRACE_FOR_NS := 1
52
53# enable trace filter control registers access to NS by default
54ENABLE_TRF_FOR_NS := 1
55
Usama Ariff1513622021-04-09 17:07:41 +010056# Include GICv3 driver files
57include drivers/arm/gic/v3/gicv3.mk
58
59ENT_GIC_SOURCES := ${GICV3_SOURCES} \
60 plat/common/plat_gicv3.c \
61 plat/arm/common/arm_gicv3.c
62
63override NEED_BL2U := no
64
65override ARM_PLAT_MT := 1
66
67TC_BASE = plat/arm/board/tc
68
69PLAT_INCLUDES += -I${TC_BASE}/include/
70
Usama Ariff1513622021-04-09 17:07:41 +010071# CPU libraries for TARGET_PLATFORM=0
72ifeq (${TARGET_PLATFORM}, 0)
Rupinderjit Singh820b3b62022-04-04 17:28:41 +010073TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a510.S \
74 lib/cpus/aarch64/cortex_a710.S \
Usama Ariff1513622021-04-09 17:07:41 +010075 lib/cpus/aarch64/cortex_x2.S
76endif
77
78# CPU libraries for TARGET_PLATFORM=1
79ifeq (${TARGET_PLATFORM}, 1)
Rupinderjit Singh820b3b62022-04-04 17:28:41 +010080TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a510.S \
Rupinderjit Singh7e465552022-08-23 11:55:27 +010081 lib/cpus/aarch64/cortex_a715.S \
82 lib/cpus/aarch64/cortex_x3.S
Usama Ariff1513622021-04-09 17:07:41 +010083endif
84
Rupinderjit Singh820b3b62022-04-04 17:28:41 +010085# CPU libraries for TARGET_PLATFORM=2
86ifeq (${TARGET_PLATFORM}, 2)
87TC_CPU_SOURCES += lib/cpus/aarch64/cortex_hayes.S \
Harrison Mutai2205f9a2022-10-03 12:48:35 +010088 lib/cpus/aarch64/cortex_hunter.S \
89 lib/cpus/aarch64/cortex_hunter_elp_arm.S
Rupinderjit Singh820b3b62022-04-04 17:28:41 +010090endif
91
Usama Ariff1513622021-04-09 17:07:41 +010092INTERCONNECT_SOURCES := ${TC_BASE}/tc_interconnect.c
93
94PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \
95 ${TC_BASE}/include/tc_helpers.S
96
97BL1_SOURCES += ${INTERCONNECT_SOURCES} \
98 ${TC_CPU_SOURCES} \
99 ${TC_BASE}/tc_trusted_boot.c \
100 ${TC_BASE}/tc_err.c \
101 drivers/arm/sbsa/sbsa.c
102
Usama Ariff1513622021-04-09 17:07:41 +0100103BL2_SOURCES += ${TC_BASE}/tc_security.c \
104 ${TC_BASE}/tc_err.c \
105 ${TC_BASE}/tc_trusted_boot.c \
Usama Arifa49bd492021-08-17 17:57:10 +0100106 ${TC_BASE}/tc_bl2_setup.c \
Usama Ariff1513622021-04-09 17:07:41 +0100107 lib/utils/mem_region.c \
108 drivers/arm/tzc/tzc400.c \
109 plat/arm/common/arm_tzc400.c \
110 plat/arm/common/arm_nor_psci_mem_protect.c
111
112BL31_SOURCES += ${INTERCONNECT_SOURCES} \
113 ${TC_CPU_SOURCES} \
114 ${ENT_GIC_SOURCES} \
115 ${TC_BASE}/tc_bl31_setup.c \
116 ${TC_BASE}/tc_topology.c \
Usama Arifa49bd492021-08-17 17:57:10 +0100117 lib/fconf/fconf.c \
118 lib/fconf/fconf_dyn_cfg_getter.c \
Usama Ariff1513622021-04-09 17:07:41 +0100119 drivers/cfi/v2m/v2m_flash.c \
120 lib/utils/mem_region.c \
121 plat/arm/common/arm_nor_psci_mem_protect.c
122
Chris Kaye9272152021-09-28 15:52:14 +0100123BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
124
Usama Ariff1513622021-04-09 17:07:41 +0100125# Add the FDT_SOURCES and options for Dynamic Config
126FDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \
127 ${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts
128FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
129TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
130
131# Add the FW_CONFIG to FIP and specify the same to certtool
132$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
133# Add the TB_FW_CONFIG to FIP and specify the same to certtool
134$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
135
136ifeq (${SPD},spmd)
137ifeq ($(ARM_SPMC_MANIFEST_DTS),)
138ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_manifest.dts
139endif
140
141FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS}
142TC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb
143
144# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
145$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG}))
146endif
147
148#Device tree
149TC_HW_CONFIG_DTS := fdts/tc.dts
150TC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb
151FDT_SOURCES += ${TC_HW_CONFIG_DTS}
152$(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS)))
153
154# Add the HW_CONFIG to FIP and specify the same to certtool
155$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG}))
156
157override CTX_INCLUDE_AARCH32_REGS := 0
158
159override CTX_INCLUDE_PAUTH_REGS := 1
160
161override ENABLE_SPE_FOR_LOWER_ELS := 0
162
163override ENABLE_AMU := 1
Chris Kayc2d29ba2021-05-18 18:49:51 +0100164override ENABLE_AMU_AUXILIARY_COUNTERS := 1
165override ENABLE_AMU_FCONF := 1
166
167override ENABLE_MPMM := 1
168override ENABLE_MPMM_FCONF := 1
Usama Ariff1513622021-04-09 17:07:41 +0100169
Tamas Banede4f052022-09-16 16:26:15 +0200170# Include Measured Boot makefile before any Crypto library makefile.
171# Crypto library makefile may need default definitions of Measured Boot build
172# flags present in Measured Boot makefile.
173ifeq (${MEASURED_BOOT},1)
174 MEASURED_BOOT_MK := drivers/measured_boot/rss/rss_measured_boot.mk
175 $(info Including ${MEASURED_BOOT_MK})
176 include ${MEASURED_BOOT_MK}
177 $(info Including rss_comms.mk)
178 include drivers/arm/rss/rss_comms.mk
179
180 BL1_SOURCES += ${MEASURED_BOOT_SOURCES} \
181 plat/arm/board/tc/tc_common_measured_boot.c \
182 plat/arm/board/tc/tc_bl1_measured_boot.c \
183 lib/psa/measured_boot.c \
184 ${RSS_COMMS_SOURCES}
185
186 BL2_SOURCES += ${MEASURED_BOOT_SOURCES} \
187 plat/arm/board/tc/tc_common_measured_boot.c \
188 plat/arm/board/tc/tc_bl2_measured_boot.c \
189 lib/psa/measured_boot.c \
190 ${RSS_COMMS_SOURCES}
191
192PLAT_INCLUDES += -Iinclude/lib/psa
193
194endif
195
Mate Toth-Pal14ba4af2022-10-21 14:24:49 +0200196# Add this include as first, before arm_common.mk. This is necessary because
197# arm_common.mk builds Mbed TLS, and platform_test.mk can change the list of
198# Mbed TLS files that are to be compiled (LIBMBEDTLS_SRCS).
199include plat/arm/board/tc/platform_test.mk
200
Usama Ariff1513622021-04-09 17:07:41 +0100201include plat/arm/common/arm_common.mk
202include plat/arm/css/common/css_common.mk
203include plat/arm/soc/common/soc_css.mk
204include plat/arm/board/common/board_common.mk