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Jeenu Viswambharand5ec3672017-01-03 11:01:51 +00001/*
Boyan Karatotev821364e2023-01-27 09:35:10 +00002 * Copyright (c) 2017-2023, Arm Limited and Contributors. All rights reserved.
Jeenu Viswambharand5ec3672017-01-03 11:01:51 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Jeenu Viswambharand5ec3672017-01-03 11:01:51 +00005 */
6
Antonio Nino Diaz9fe40fd2018-10-25 17:11:02 +01007#ifndef ERRATA_REPORT_H
8#define ERRATA_REPORT_H
Jeenu Viswambharand5ec3672017-01-03 11:01:51 +00009
Boyan Karatotev821364e2023-01-27 09:35:10 +000010#include <lib/cpus/cpu_ops.h>
11
12
13#define ERRATUM_WA_FUNC_SIZE CPU_WORD_SIZE
14#define ERRATUM_CHECK_FUNC_SIZE CPU_WORD_SIZE
15#define ERRATUM_ID_SIZE 4
16#define ERRATUM_CVE_SIZE 2
17#define ERRATUM_CHOSEN_SIZE 1
18#define ERRATUM_MITIGATED_SIZE 1
19
20#define ERRATUM_WA_FUNC 0
21#define ERRATUM_CHECK_FUNC ERRATUM_WA_FUNC + ERRATUM_WA_FUNC_SIZE
22#define ERRATUM_ID ERRATUM_CHECK_FUNC + ERRATUM_CHECK_FUNC_SIZE
23#define ERRATUM_CVE ERRATUM_ID + ERRATUM_ID_SIZE
24#define ERRATUM_CHOSEN ERRATUM_CVE + ERRATUM_CVE_SIZE
25#define ERRATUM_MITIGATED ERRATUM_CHOSEN + ERRATUM_CHOSEN_SIZE
26#define ERRATUM_ENTRY_SIZE ERRATUM_MITIGATED + ERRATUM_MITIGATED_SIZE
27
Julius Werner53456fc2019-07-09 13:49:11 -070028#ifndef __ASSEMBLER__
Boyan Karatotev29fa56d2023-01-27 09:38:15 +000029#include <lib/cassert.h>
Jeenu Viswambharand5ec3672017-01-03 11:01:51 +000030
Jeenu Viswambharand5ec3672017-01-03 11:01:51 +000031void print_errata_status(void);
Roberto Vargas05712702018-02-12 12:36:17 +000032void errata_print_msg(unsigned int status, const char *cpu, const char *id);
Roberto Vargas05712702018-02-12 12:36:17 +000033
Boyan Karatotev29fa56d2023-01-27 09:38:15 +000034/*
35 * NOTE that this structure will be different on AArch32 and AArch64. The
36 * uintptr_t will reflect the change and the alignment will be correct in both.
37 */
38struct erratum_entry {
39 uintptr_t (*wa_func)(uint64_t cpu_rev);
40 uintptr_t (*check_func)(uint64_t cpu_rev);
41 /* Will fit CVEs with up to 10 character in the ID field */
42 uint32_t id;
43 /* Denote CVEs with their year or errata with 0 */
44 uint16_t cve;
45 uint8_t chosen;
46 /* TODO(errata ABI): placeholder for the mitigated field */
47 uint8_t _mitigated;
48} __packed;
49
50CASSERT(sizeof(struct erratum_entry) == ERRATUM_ENTRY_SIZE,
51 assert_erratum_entry_asm_c_different_sizes);
Boyan Karatotev821364e2023-01-27 09:35:10 +000052#else
53
54/*
55 * errata framework macro helpers
56 *
57 * NOTE an erratum and CVE id could clash. However, both numbers are very large
58 * and the probablity is minuscule. Working around this makes code very
59 * complicated and extremely difficult to read so it is not considered. In the
60 * unlikely event that this does happen, prepending the CVE id with a 0 should
61 * resolve the conflict
62 */
63#define ERRATUM(id) 0, id
64#define CVE(year, id) year, id
65#define NO_ISB 1
66#define NO_ASSERT 0
Boyan Karatotevcea0c262023-04-04 11:29:00 +010067#define NO_APPLY_AT_RESET 0
68#define APPLY_AT_RESET 1
69/* useful for errata that end up always being worked around */
70#define ERRATUM_ALWAYS_CHOSEN 1
Boyan Karatotev821364e2023-01-27 09:35:10 +000071
Julius Werner53456fc2019-07-09 13:49:11 -070072#endif /* __ASSEMBLER__ */
Jeenu Viswambharand5ec3672017-01-03 11:01:51 +000073
74/* Errata status */
75#define ERRATA_NOT_APPLIES 0
76#define ERRATA_APPLIES 1
77#define ERRATA_MISSING 2
78
johpow0185ea43d2020-10-07 15:08:01 -050079/* Macro to get CPU revision code for checking errata version compatibility. */
80#define CPU_REV(r, p) ((r << 4) | p)
81
Antonio Nino Diaz9fe40fd2018-10-25 17:11:02 +010082#endif /* ERRATA_REPORT_H */