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Jeenu Viswambharand5ec3672017-01-03 11:01:51 +00001/*
Boyan Karatotev821364e2023-01-27 09:35:10 +00002 * Copyright (c) 2017-2023, Arm Limited and Contributors. All rights reserved.
Jeenu Viswambharand5ec3672017-01-03 11:01:51 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Jeenu Viswambharand5ec3672017-01-03 11:01:51 +00005 */
6
Antonio Nino Diaz9fe40fd2018-10-25 17:11:02 +01007#ifndef ERRATA_REPORT_H
8#define ERRATA_REPORT_H
Jeenu Viswambharand5ec3672017-01-03 11:01:51 +00009
Boyan Karatotev821364e2023-01-27 09:35:10 +000010#include <lib/cpus/cpu_ops.h>
11
12
13#define ERRATUM_WA_FUNC_SIZE CPU_WORD_SIZE
14#define ERRATUM_CHECK_FUNC_SIZE CPU_WORD_SIZE
15#define ERRATUM_ID_SIZE 4
16#define ERRATUM_CVE_SIZE 2
17#define ERRATUM_CHOSEN_SIZE 1
18#define ERRATUM_MITIGATED_SIZE 1
19
20#define ERRATUM_WA_FUNC 0
21#define ERRATUM_CHECK_FUNC ERRATUM_WA_FUNC + ERRATUM_WA_FUNC_SIZE
22#define ERRATUM_ID ERRATUM_CHECK_FUNC + ERRATUM_CHECK_FUNC_SIZE
23#define ERRATUM_CVE ERRATUM_ID + ERRATUM_ID_SIZE
24#define ERRATUM_CHOSEN ERRATUM_CVE + ERRATUM_CVE_SIZE
25#define ERRATUM_MITIGATED ERRATUM_CHOSEN + ERRATUM_CHOSEN_SIZE
26#define ERRATUM_ENTRY_SIZE ERRATUM_MITIGATED + ERRATUM_MITIGATED_SIZE
27
Julius Werner53456fc2019-07-09 13:49:11 -070028#ifndef __ASSEMBLER__
Jeenu Viswambharand5ec3672017-01-03 11:01:51 +000029
Jeenu Viswambharand5ec3672017-01-03 11:01:51 +000030void print_errata_status(void);
Roberto Vargas05712702018-02-12 12:36:17 +000031void errata_print_msg(unsigned int status, const char *cpu, const char *id);
Roberto Vargas05712702018-02-12 12:36:17 +000032
Boyan Karatotev821364e2023-01-27 09:35:10 +000033#else
34
35/*
36 * errata framework macro helpers
37 *
38 * NOTE an erratum and CVE id could clash. However, both numbers are very large
39 * and the probablity is minuscule. Working around this makes code very
40 * complicated and extremely difficult to read so it is not considered. In the
41 * unlikely event that this does happen, prepending the CVE id with a 0 should
42 * resolve the conflict
43 */
44#define ERRATUM(id) 0, id
45#define CVE(year, id) year, id
46#define NO_ISB 1
47#define NO_ASSERT 0
48
Julius Werner53456fc2019-07-09 13:49:11 -070049#endif /* __ASSEMBLER__ */
Jeenu Viswambharand5ec3672017-01-03 11:01:51 +000050
51/* Errata status */
52#define ERRATA_NOT_APPLIES 0
53#define ERRATA_APPLIES 1
54#define ERRATA_MISSING 2
55
johpow0185ea43d2020-10-07 15:08:01 -050056/* Macro to get CPU revision code for checking errata version compatibility. */
57#define CPU_REV(r, p) ((r << 4) | p)
58
Antonio Nino Diaz9fe40fd2018-10-25 17:11:02 +010059#endif /* ERRATA_REPORT_H */