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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Masahiro Yamada2a4fe4f2018-02-01 18:42:24 +09002 * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta4f6ad662013-10-25 09:08:21 +01005 */
6
7#include <arch.h>
Andrew Thoelke38bde412014-03-18 13:46:55 +00008#include <asm_macros.S>
Julius Werneraae9bb12017-09-18 16:49:48 -07009#include <console.h>
Dan Handleyed6ff952014-05-14 17:44:19 +010010#include <platform_def.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010011
Achin Gupta4f6ad662013-10-25 09:08:21 +010012 .weak plat_report_exception
Soby Mathew066f7132014-07-14 16:57:23 +010013 .weak plat_crash_console_init
14 .weak plat_crash_console_putc
Antonio Nino Diazd3ec5432017-02-17 17:11:27 +000015 .weak plat_crash_console_flush
Soby Mathewf1785fd2014-08-14 12:22:32 +010016 .weak plat_reset_handler
Soby Mathew8e2f2872014-08-14 12:49:05 +010017 .weak plat_disable_acp
Juan Castillod1413b22015-10-05 16:59:38 +010018 .weak bl1_plat_prepare_exit
Antonio Nino Diaz1f21bcf2016-02-01 13:57:25 +000019 .weak plat_panic_handler
Jeenu Viswambharane834ee12018-04-27 15:17:03 +010020 .weak bl31_plat_enable_mmu
21 .weak bl32_plat_enable_mmu
Achin Gupta4f6ad662013-10-25 09:08:21 +010022
Soby Mathew70716d62015-07-13 16:26:11 +010023#if !ENABLE_PLAT_COMPAT
24 .globl platform_get_core_pos
25
26#define MPIDR_RES_BIT_MASK 0xff000000
27
28 /* ------------------------------------------------------------------
29 * int platform_get_core_pos(int mpidr)
30 * Returns the CPU index of the CPU specified by mpidr. This is
31 * defined when platform compatibility is disabled to enable Trusted
32 * Firmware components like SPD using the old platform API to work.
33 * This API is deprecated and it assumes that the mpidr specified is
34 * that of a valid and present CPU. Instead, plat_my_core_pos()
35 * should be used for CPU index of the current CPU and
36 * plat_core_pos_by_mpidr() should be used for CPU index of a
37 * CPU specified by its mpidr.
38 * ------------------------------------------------------------------
39 */
40func_deprecated platform_get_core_pos
41 bic x0, x0, #MPIDR_RES_BIT_MASK
42 mrs x1, mpidr_el1
43 bic x1, x1, #MPIDR_RES_BIT_MASK
44 cmp x0, x1
45 beq plat_my_core_pos
46 b platform_core_pos_helper
47endfunc_deprecated platform_get_core_pos
48#endif
49
Achin Gupta4f6ad662013-10-25 09:08:21 +010050 /* -----------------------------------------------------
Achin Gupta4f6ad662013-10-25 09:08:21 +010051 * Placeholder function which should be redefined by
52 * each platform.
53 * -----------------------------------------------------
54 */
Andrew Thoelke38bde412014-03-18 13:46:55 +000055func plat_report_exception
Achin Gupta4f6ad662013-10-25 09:08:21 +010056 ret
Kévin Petita877c252015-03-24 14:03:57 +000057endfunc plat_report_exception
Soby Mathew066f7132014-07-14 16:57:23 +010058
Julius Werneraae9bb12017-09-18 16:49:48 -070059#if MULTI_CONSOLE_API
Soby Mathew066f7132014-07-14 16:57:23 +010060 /* -----------------------------------------------------
Julius Werneraae9bb12017-09-18 16:49:48 -070061 * int plat_crash_console_init(void)
62 * Use normal console by default. Switch it to crash
63 * mode so serial consoles become active again.
64 * NOTE: This default implementation will only work for
65 * crashes that occur after a normal console (marked
66 * valid for the crash state) has been registered with
67 * the console framework. To debug crashes that occur
68 * earlier, the platform has to override these functions
69 * with an implementation that initializes a console
70 * driver with hardcoded parameters. See
71 * docs/porting-guide.rst for more information.
Soby Mathew066f7132014-07-14 16:57:23 +010072 * -----------------------------------------------------
73 */
74func plat_crash_console_init
Julius Werneraae9bb12017-09-18 16:49:48 -070075#if defined(IMAGE_BL1)
76 /*
77 * BL1 code can possibly crash so early that the data segment is not yet
78 * accessible. Don't risk undefined behavior by trying to run the normal
79 * console framework. Platforms that want to debug BL1 will need to
80 * override this with custom functions that can run from registers only.
81 */
Soby Mathew066f7132014-07-14 16:57:23 +010082 mov x0, #0
83 ret
Julius Werneraae9bb12017-09-18 16:49:48 -070084#else /* IMAGE_BL1 */
85 mov x3, x30
86 mov x0, #CONSOLE_FLAG_CRASH
87 bl console_switch_state
88 mov x0, #1
89 ret x3
90#endif
Kévin Petita877c252015-03-24 14:03:57 +000091endfunc plat_crash_console_init
Soby Mathew066f7132014-07-14 16:57:23 +010092
93 /* -----------------------------------------------------
Julius Werneraae9bb12017-09-18 16:49:48 -070094 * void plat_crash_console_putc(int character)
95 * Output through the normal console by default.
Soby Mathew066f7132014-07-14 16:57:23 +010096 * -----------------------------------------------------
97 */
98func plat_crash_console_putc
Julius Werneraae9bb12017-09-18 16:49:48 -070099 b console_putc
Kévin Petita877c252015-03-24 14:03:57 +0000100endfunc plat_crash_console_putc
Soby Mathewf1785fd2014-08-14 12:22:32 +0100101
102 /* -----------------------------------------------------
Julius Werneraae9bb12017-09-18 16:49:48 -0700103 * void plat_crash_console_flush(void)
104 * Flush normal console by default.
105 * -----------------------------------------------------
106 */
107func plat_crash_console_flush
108 b console_flush
109endfunc plat_crash_console_flush
110
111#else /* MULTI_CONSOLE_API */
112
113 /* -----------------------------------------------------
114 * In the old API these are all no-op stubs that need to
115 * be overridden by the platform to be useful.
Antonio Nino Diazd3ec5432017-02-17 17:11:27 +0000116 * -----------------------------------------------------
117 */
Julius Werneraae9bb12017-09-18 16:49:48 -0700118func plat_crash_console_init
119 mov x0, #0
120 ret
121endfunc plat_crash_console_init
122
123func plat_crash_console_putc
124 ret
125endfunc plat_crash_console_putc
126
Antonio Nino Diazd3ec5432017-02-17 17:11:27 +0000127func plat_crash_console_flush
128 ret
129endfunc plat_crash_console_flush
Julius Werneraae9bb12017-09-18 16:49:48 -0700130#endif
Antonio Nino Diazd3ec5432017-02-17 17:11:27 +0000131
132 /* -----------------------------------------------------
133 * Placeholder function which should be redefined by
Masahiro Yamada4c165ca2016-09-24 18:07:46 +0900134 * each platform. This function should preserve x19 - x29.
Soby Mathewf1785fd2014-08-14 12:22:32 +0100135 * -----------------------------------------------------
136 */
137func plat_reset_handler
138 ret
Kévin Petita877c252015-03-24 14:03:57 +0000139endfunc plat_reset_handler
Soby Mathew8e2f2872014-08-14 12:49:05 +0100140
141 /* -----------------------------------------------------
142 * Placeholder function which should be redefined by
143 * each platform. This function is allowed to use
144 * registers x0 - x17.
145 * -----------------------------------------------------
146 */
147func plat_disable_acp
148 ret
Kévin Petita877c252015-03-24 14:03:57 +0000149endfunc plat_disable_acp
Juan Castillod1413b22015-10-05 16:59:38 +0100150
151 /* -----------------------------------------------------
Sandrine Bailleux87322b32015-11-10 15:01:57 +0000152 * void bl1_plat_prepare_exit(entry_point_info_t *ep_info);
Juan Castillod1413b22015-10-05 16:59:38 +0100153 * Called before exiting BL1. Default: do nothing
154 * -----------------------------------------------------
155 */
156func bl1_plat_prepare_exit
157 ret
158endfunc bl1_plat_prepare_exit
Juan Castillo26ae5832015-09-25 15:41:14 +0100159
160 /* -----------------------------------------------------
Antonio Nino Diaz1f21bcf2016-02-01 13:57:25 +0000161 * void plat_panic_handler(void) __dead2;
162 * Endless loop by default.
163 * -----------------------------------------------------
164 */
165func plat_panic_handler
Sandrine Bailleux628198b2016-08-18 09:24:40 +0100166 wfi
Antonio Nino Diaz1f21bcf2016-02-01 13:57:25 +0000167 b plat_panic_handler
168endfunc plat_panic_handler
Jeenu Viswambharane834ee12018-04-27 15:17:03 +0100169
170 /* -----------------------------------------------------
171 * void bl31_plat_enable_mmu(uint32_t flags);
172 *
173 * Enable MMU in BL31.
174 * -----------------------------------------------------
175 */
176func bl31_plat_enable_mmu
177 b enable_mmu_direct_el3
178endfunc bl31_plat_enable_mmu
179
180 /* -----------------------------------------------------
181 * void bl32_plat_enable_mmu(uint32_t flags);
182 *
183 * Enable MMU in BL32.
184 * -----------------------------------------------------
185 */
186func bl32_plat_enable_mmu
187 b enable_mmu_direct_el1
188endfunc bl32_plat_enable_mmu