Olivier Deprez | be67111 | 2019-10-28 09:07:50 +0000 | [diff] [blame] | 1 | /* |
Daniel Boulby | 9460a23 | 2021-12-09 11:20:13 +0000 | [diff] [blame] | 2 | * Copyright (c) 2020-2022, ARM Limited and Contributors. All rights reserved. |
Olivier Deprez | be67111 | 2019-10-28 09:07:50 +0000 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #include <assert.h> |
Olivier Deprez | 33e4412 | 2020-04-16 17:54:27 +0200 | [diff] [blame] | 8 | #include <errno.h> |
Scott Branden | e5dcf98 | 2020-08-25 13:49:32 -0700 | [diff] [blame] | 9 | #include <inttypes.h> |
| 10 | #include <stdint.h> |
| 11 | |
Olivier Deprez | c7631a5 | 2020-03-23 09:53:06 +0100 | [diff] [blame] | 12 | #include <lib/el3_runtime/context_mgmt.h> |
Olivier Deprez | e799f48 | 2021-03-02 17:31:22 +0100 | [diff] [blame] | 13 | #include <lib/spinlock.h> |
Olivier Deprez | be67111 | 2019-10-28 09:07:50 +0000 | [diff] [blame] | 14 | #include "spmd_private.h" |
| 15 | |
Olivier Deprez | eae4596 | 2021-01-19 15:06:47 +0100 | [diff] [blame] | 16 | static struct { |
| 17 | bool secondary_ep_locked; |
| 18 | uintptr_t secondary_ep; |
Olivier Deprez | e799f48 | 2021-03-02 17:31:22 +0100 | [diff] [blame] | 19 | spinlock_t lock; |
Olivier Deprez | eae4596 | 2021-01-19 15:06:47 +0100 | [diff] [blame] | 20 | } g_spmd_pm; |
| 21 | |
Olivier Deprez | 33e4412 | 2020-04-16 17:54:27 +0200 | [diff] [blame] | 22 | /******************************************************************************* |
Olivier Deprez | eae4596 | 2021-01-19 15:06:47 +0100 | [diff] [blame] | 23 | * spmd_pm_secondary_ep_register |
Olivier Deprez | 33e4412 | 2020-04-16 17:54:27 +0200 | [diff] [blame] | 24 | ******************************************************************************/ |
Olivier Deprez | eae4596 | 2021-01-19 15:06:47 +0100 | [diff] [blame] | 25 | int spmd_pm_secondary_ep_register(uintptr_t entry_point) |
Olivier Deprez | 33e4412 | 2020-04-16 17:54:27 +0200 | [diff] [blame] | 26 | { |
Olivier Deprez | e799f48 | 2021-03-02 17:31:22 +0100 | [diff] [blame] | 27 | int ret = FFA_ERROR_INVALID_PARAMETER; |
| 28 | |
| 29 | spin_lock(&g_spmd_pm.lock); |
| 30 | |
Olivier Deprez | eae4596 | 2021-01-19 15:06:47 +0100 | [diff] [blame] | 31 | if (g_spmd_pm.secondary_ep_locked == true) { |
Olivier Deprez | e799f48 | 2021-03-02 17:31:22 +0100 | [diff] [blame] | 32 | goto out; |
Olivier Deprez | 33e4412 | 2020-04-16 17:54:27 +0200 | [diff] [blame] | 33 | } |
| 34 | |
Olivier Deprez | 33e4412 | 2020-04-16 17:54:27 +0200 | [diff] [blame] | 35 | /* |
| 36 | * Check entry_point address is a PA within |
| 37 | * load_address <= entry_point < load_address + binary_size |
| 38 | */ |
| 39 | if (!spmd_check_address_in_binary_image(entry_point)) { |
Olivier Deprez | eae4596 | 2021-01-19 15:06:47 +0100 | [diff] [blame] | 40 | ERROR("%s entry point is not within image boundaries\n", |
| 41 | __func__); |
Olivier Deprez | e799f48 | 2021-03-02 17:31:22 +0100 | [diff] [blame] | 42 | goto out; |
Olivier Deprez | 33e4412 | 2020-04-16 17:54:27 +0200 | [diff] [blame] | 43 | } |
| 44 | |
Olivier Deprez | eae4596 | 2021-01-19 15:06:47 +0100 | [diff] [blame] | 45 | g_spmd_pm.secondary_ep = entry_point; |
| 46 | g_spmd_pm.secondary_ep_locked = true; |
Olivier Deprez | 73ef0dc | 2020-06-19 15:33:41 +0200 | [diff] [blame] | 47 | |
Olivier Deprez | eae4596 | 2021-01-19 15:06:47 +0100 | [diff] [blame] | 48 | VERBOSE("%s %lx\n", __func__, entry_point); |
Olivier Deprez | 33e4412 | 2020-04-16 17:54:27 +0200 | [diff] [blame] | 49 | |
Olivier Deprez | e799f48 | 2021-03-02 17:31:22 +0100 | [diff] [blame] | 50 | ret = 0; |
| 51 | |
| 52 | out: |
| 53 | spin_unlock(&g_spmd_pm.lock); |
| 54 | |
| 55 | return ret; |
Olivier Deprez | 33e4412 | 2020-04-16 17:54:27 +0200 | [diff] [blame] | 56 | } |
| 57 | |
Olivier Deprez | be67111 | 2019-10-28 09:07:50 +0000 | [diff] [blame] | 58 | /******************************************************************************* |
| 59 | * This CPU has been turned on. Enter SPMC to initialise S-EL1 or S-EL2. As part |
| 60 | * of the SPMC initialization path, they will initialize any SPs that they |
| 61 | * manage. Entry into SPMC is done after initialising minimal architectural |
| 62 | * state that guarantees safe execution. |
| 63 | ******************************************************************************/ |
| 64 | static void spmd_cpu_on_finish_handler(u_register_t unused) |
| 65 | { |
Olivier Deprez | be67111 | 2019-10-28 09:07:50 +0000 | [diff] [blame] | 66 | spmd_spm_core_context_t *ctx = spmd_get_context(); |
Olivier Deprez | c7631a5 | 2020-03-23 09:53:06 +0100 | [diff] [blame] | 67 | unsigned int linear_id = plat_my_core_pos(); |
Olivier Deprez | 4ab7a4a | 2021-06-21 09:47:13 +0200 | [diff] [blame] | 68 | el3_state_t *el3_state; |
| 69 | uintptr_t entry_point; |
Olivier Deprez | 73ef0dc | 2020-06-19 15:33:41 +0200 | [diff] [blame] | 70 | uint64_t rc; |
Olivier Deprez | be67111 | 2019-10-28 09:07:50 +0000 | [diff] [blame] | 71 | |
Olivier Deprez | c7631a5 | 2020-03-23 09:53:06 +0100 | [diff] [blame] | 72 | assert(ctx != NULL); |
Olivier Deprez | be67111 | 2019-10-28 09:07:50 +0000 | [diff] [blame] | 73 | assert(ctx->state != SPMC_STATE_ON); |
Olivier Deprez | c7631a5 | 2020-03-23 09:53:06 +0100 | [diff] [blame] | 74 | |
Olivier Deprez | e799f48 | 2021-03-02 17:31:22 +0100 | [diff] [blame] | 75 | spin_lock(&g_spmd_pm.lock); |
| 76 | |
Olivier Deprez | c7631a5 | 2020-03-23 09:53:06 +0100 | [diff] [blame] | 77 | /* |
Olivier Deprez | eae4596 | 2021-01-19 15:06:47 +0100 | [diff] [blame] | 78 | * Leave the possibility that the SPMC does not call |
| 79 | * FFA_SECONDARY_EP_REGISTER in which case re-use the |
| 80 | * primary core address for booting secondary cores. |
Olivier Deprez | c7631a5 | 2020-03-23 09:53:06 +0100 | [diff] [blame] | 81 | */ |
Olivier Deprez | eae4596 | 2021-01-19 15:06:47 +0100 | [diff] [blame] | 82 | if (g_spmd_pm.secondary_ep_locked == true) { |
Olivier Deprez | 4ab7a4a | 2021-06-21 09:47:13 +0200 | [diff] [blame] | 83 | /* |
| 84 | * The CPU context has already been initialized at boot time |
| 85 | * (in spmd_spmc_init by a call to cm_setup_context). Adjust |
| 86 | * below the target core entry point based on the address |
| 87 | * passed to by FFA_SECONDARY_EP_REGISTER. |
| 88 | */ |
| 89 | entry_point = g_spmd_pm.secondary_ep; |
| 90 | el3_state = get_el3state_ctx(&ctx->cpu_ctx); |
| 91 | write_ctx_reg(el3_state, CTX_ELR_EL3, entry_point); |
Olivier Deprez | c7631a5 | 2020-03-23 09:53:06 +0100 | [diff] [blame] | 92 | } |
| 93 | |
Olivier Deprez | e799f48 | 2021-03-02 17:31:22 +0100 | [diff] [blame] | 94 | spin_unlock(&g_spmd_pm.lock); |
| 95 | |
Olivier Deprez | 4ab7a4a | 2021-06-21 09:47:13 +0200 | [diff] [blame] | 96 | /* Mark CPU as initiating ON operation. */ |
Olivier Deprez | c7631a5 | 2020-03-23 09:53:06 +0100 | [diff] [blame] | 97 | ctx->state = SPMC_STATE_ON_PENDING; |
Olivier Deprez | be67111 | 2019-10-28 09:07:50 +0000 | [diff] [blame] | 98 | |
| 99 | rc = spmd_spm_core_sync_entry(ctx); |
Olivier Deprez | 73ef0dc | 2020-06-19 15:33:41 +0200 | [diff] [blame] | 100 | if (rc != 0ULL) { |
Scott Branden | e5dcf98 | 2020-08-25 13:49:32 -0700 | [diff] [blame] | 101 | ERROR("%s failed (%" PRIu64 ") on CPU%u\n", __func__, rc, |
Olivier Deprez | c7631a5 | 2020-03-23 09:53:06 +0100 | [diff] [blame] | 102 | linear_id); |
Olivier Deprez | be67111 | 2019-10-28 09:07:50 +0000 | [diff] [blame] | 103 | ctx->state = SPMC_STATE_OFF; |
| 104 | return; |
| 105 | } |
| 106 | |
| 107 | ctx->state = SPMC_STATE_ON; |
Olivier Deprez | c7631a5 | 2020-03-23 09:53:06 +0100 | [diff] [blame] | 108 | |
| 109 | VERBOSE("CPU %u on!\n", linear_id); |
| 110 | } |
| 111 | |
| 112 | /******************************************************************************* |
| 113 | * spmd_cpu_off_handler |
| 114 | ******************************************************************************/ |
| 115 | static int32_t spmd_cpu_off_handler(u_register_t unused) |
| 116 | { |
| 117 | spmd_spm_core_context_t *ctx = spmd_get_context(); |
| 118 | unsigned int linear_id = plat_my_core_pos(); |
Olivier Deprez | 73ef0dc | 2020-06-19 15:33:41 +0200 | [diff] [blame] | 119 | int64_t rc; |
Olivier Deprez | c7631a5 | 2020-03-23 09:53:06 +0100 | [diff] [blame] | 120 | |
| 121 | assert(ctx != NULL); |
| 122 | assert(ctx->state != SPMC_STATE_OFF); |
| 123 | |
Olivier Deprez | c7631a5 | 2020-03-23 09:53:06 +0100 | [diff] [blame] | 124 | /* Build an SPMD to SPMC direct message request. */ |
Daniel Boulby | 9460a23 | 2021-12-09 11:20:13 +0000 | [diff] [blame] | 125 | spmd_build_spmc_message(get_gpregs_ctx(&ctx->cpu_ctx), |
Marc Bonnici | 25f4b54 | 2022-04-12 17:18:13 +0100 | [diff] [blame] | 126 | FFA_FWK_MSG_PSCI, PSCI_CPU_OFF); |
Olivier Deprez | c7631a5 | 2020-03-23 09:53:06 +0100 | [diff] [blame] | 127 | |
| 128 | rc = spmd_spm_core_sync_entry(ctx); |
Olivier Deprez | 73ef0dc | 2020-06-19 15:33:41 +0200 | [diff] [blame] | 129 | if (rc != 0ULL) { |
Scott Branden | e5dcf98 | 2020-08-25 13:49:32 -0700 | [diff] [blame] | 130 | ERROR("%s failed (%" PRIu64 ") on CPU%u\n", __func__, rc, linear_id); |
Olivier Deprez | c7631a5 | 2020-03-23 09:53:06 +0100 | [diff] [blame] | 131 | } |
| 132 | |
Olivier Deprez | eae4596 | 2021-01-19 15:06:47 +0100 | [diff] [blame] | 133 | /* Expect a direct message response from the SPMC. */ |
| 134 | u_register_t ffa_resp_func = read_ctx_reg(get_gpregs_ctx(&ctx->cpu_ctx), |
| 135 | CTX_GPREG_X0); |
| 136 | if (ffa_resp_func != FFA_MSG_SEND_DIRECT_RESP_SMC32) { |
| 137 | ERROR("%s invalid SPMC response (%lx).\n", |
| 138 | __func__, ffa_resp_func); |
| 139 | return -EINVAL; |
| 140 | } |
Olivier Deprez | c7631a5 | 2020-03-23 09:53:06 +0100 | [diff] [blame] | 141 | |
Olivier Deprez | c7631a5 | 2020-03-23 09:53:06 +0100 | [diff] [blame] | 142 | ctx->state = SPMC_STATE_OFF; |
| 143 | |
| 144 | VERBOSE("CPU %u off!\n", linear_id); |
| 145 | |
| 146 | return 0; |
Olivier Deprez | be67111 | 2019-10-28 09:07:50 +0000 | [diff] [blame] | 147 | } |
| 148 | |
| 149 | /******************************************************************************* |
| 150 | * Structure populated by the SPM Dispatcher to perform any bookkeeping before |
| 151 | * PSCI executes a power mgmt. operation. |
| 152 | ******************************************************************************/ |
| 153 | const spd_pm_ops_t spmd_pm = { |
| 154 | .svc_on_finish = spmd_cpu_on_finish_handler, |
Olivier Deprez | c7631a5 | 2020-03-23 09:53:06 +0100 | [diff] [blame] | 155 | .svc_off = spmd_cpu_off_handler |
Olivier Deprez | be67111 | 2019-10-28 09:07:50 +0000 | [diff] [blame] | 156 | }; |