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laurenw-arm2ce1e352023-02-07 13:40:05 -06001# Copyright (c) 2021-2023, Arm Limited. All rights reserved.
Usama Ariff1513622021-04-09 17:07:41 +01002#
3# SPDX-License-Identifier: BSD-3-Clause
4#
5
Chris Kaye9272152021-09-28 15:52:14 +01006include common/fdt_wrappers.mk
7
Manish V Badarkhe9bd11932022-11-11 09:36:29 +00008ifeq ($(TARGET_PLATFORM), 0)
9$(warning Platform ${PLAT}$(TARGET_PLATFORM) is deprecated. \
10Some of the features might not work as expected)
11endif
12
Rupinderjit Singh820b3b62022-04-04 17:28:41 +010013ifeq ($(shell expr $(TARGET_PLATFORM) \<= 2), 0)
14 $(error TARGET_PLATFORM must be less than or equal to 2)
Usama Ariff1513622021-04-09 17:07:41 +010015endif
16
Olivier Deprez7e5597c2022-07-20 17:37:23 +020017$(eval $(call add_define,TARGET_PLATFORM))
18
Usama Ariff1513622021-04-09 17:07:41 +010019CSS_LOAD_SCP_IMAGES := 1
20
21CSS_USE_SCMI_SDS_DRIVER := 1
22
Manish Pandeyd419e222023-02-13 12:39:17 +000023ENABLE_FEAT_RAS := 1
24
25RAS_FFH_SUPPORT := 0
Usama Ariff1513622021-04-09 17:07:41 +010026
27SDEI_SUPPORT := 0
28
29EL3_EXCEPTION_HANDLING := 0
30
Manish Pandey0e3379d2022-10-10 11:43:08 +010031HANDLE_EA_EL3_FIRST_NS := 0
Usama Ariff1513622021-04-09 17:07:41 +010032
33# System coherency is managed in hardware
34HW_ASSISTED_COHERENCY := 1
35
36# When building for systems with hardware-assisted coherency, there's no need to
37# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too.
38USE_COHERENT_MEM := 0
39
40GIC_ENABLE_V4_EXTN := 1
41
42# GIC-600 configuration
43GICV3_SUPPORT_GIC600 := 1
44
Usama Arif1925c782021-08-20 20:53:34 +010045# Enable SVE
Jayanth Dodderi Chidanand4e169e72023-03-31 10:39:22 +010046ENABLE_SVE_FOR_NS := 2
Usama Arif1925c782021-08-20 20:53:34 +010047ENABLE_SVE_FOR_SWD := 1
Usama Ariff1513622021-04-09 17:07:41 +010048
Davidson K65361052021-10-13 18:49:41 +053049# enable trace buffer control registers access to NS by default
50ENABLE_TRBE_FOR_NS := 1
51
52# enable trace system registers access to NS by default
53ENABLE_SYS_REG_TRACE_FOR_NS := 1
54
55# enable trace filter control registers access to NS by default
56ENABLE_TRF_FOR_NS := 1
57
Usama Ariff1513622021-04-09 17:07:41 +010058# Include GICv3 driver files
59include drivers/arm/gic/v3/gicv3.mk
60
61ENT_GIC_SOURCES := ${GICV3_SOURCES} \
62 plat/common/plat_gicv3.c \
63 plat/arm/common/arm_gicv3.c
64
65override NEED_BL2U := no
66
67override ARM_PLAT_MT := 1
68
69TC_BASE = plat/arm/board/tc
70
71PLAT_INCLUDES += -I${TC_BASE}/include/
72
Usama Ariff1513622021-04-09 17:07:41 +010073# CPU libraries for TARGET_PLATFORM=0
74ifeq (${TARGET_PLATFORM}, 0)
Rupinderjit Singh820b3b62022-04-04 17:28:41 +010075TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a510.S \
76 lib/cpus/aarch64/cortex_a710.S \
Usama Ariff1513622021-04-09 17:07:41 +010077 lib/cpus/aarch64/cortex_x2.S
78endif
79
80# CPU libraries for TARGET_PLATFORM=1
81ifeq (${TARGET_PLATFORM}, 1)
Rupinderjit Singh820b3b62022-04-04 17:28:41 +010082TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a510.S \
Rupinderjit Singh7e465552022-08-23 11:55:27 +010083 lib/cpus/aarch64/cortex_a715.S \
84 lib/cpus/aarch64/cortex_x3.S
Usama Ariff1513622021-04-09 17:07:41 +010085endif
86
Rupinderjit Singh820b3b62022-04-04 17:28:41 +010087# CPU libraries for TARGET_PLATFORM=2
88ifeq (${TARGET_PLATFORM}, 2)
89TC_CPU_SOURCES += lib/cpus/aarch64/cortex_hayes.S \
Harrison Mutai2205f9a2022-10-03 12:48:35 +010090 lib/cpus/aarch64/cortex_hunter.S \
91 lib/cpus/aarch64/cortex_hunter_elp_arm.S
Rupinderjit Singh820b3b62022-04-04 17:28:41 +010092endif
93
Usama Ariff1513622021-04-09 17:07:41 +010094INTERCONNECT_SOURCES := ${TC_BASE}/tc_interconnect.c
95
96PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \
97 ${TC_BASE}/include/tc_helpers.S
98
99BL1_SOURCES += ${INTERCONNECT_SOURCES} \
100 ${TC_CPU_SOURCES} \
101 ${TC_BASE}/tc_trusted_boot.c \
102 ${TC_BASE}/tc_err.c \
103 drivers/arm/sbsa/sbsa.c
104
Usama Ariff1513622021-04-09 17:07:41 +0100105BL2_SOURCES += ${TC_BASE}/tc_security.c \
106 ${TC_BASE}/tc_err.c \
107 ${TC_BASE}/tc_trusted_boot.c \
Usama Arifa49bd492021-08-17 17:57:10 +0100108 ${TC_BASE}/tc_bl2_setup.c \
Usama Ariff1513622021-04-09 17:07:41 +0100109 lib/utils/mem_region.c \
110 drivers/arm/tzc/tzc400.c \
111 plat/arm/common/arm_tzc400.c \
112 plat/arm/common/arm_nor_psci_mem_protect.c
113
114BL31_SOURCES += ${INTERCONNECT_SOURCES} \
115 ${TC_CPU_SOURCES} \
116 ${ENT_GIC_SOURCES} \
117 ${TC_BASE}/tc_bl31_setup.c \
118 ${TC_BASE}/tc_topology.c \
Usama Arifa49bd492021-08-17 17:57:10 +0100119 lib/fconf/fconf.c \
120 lib/fconf/fconf_dyn_cfg_getter.c \
Usama Ariff1513622021-04-09 17:07:41 +0100121 drivers/cfi/v2m/v2m_flash.c \
122 lib/utils/mem_region.c \
Madhukar Pappireddye108df22023-03-22 15:40:40 -0500123 plat/arm/common/arm_nor_psci_mem_protect.c \
124 drivers/arm/sbsa/sbsa.c
Usama Ariff1513622021-04-09 17:07:41 +0100125
Chris Kaye9272152021-09-28 15:52:14 +0100126BL31_SOURCES += ${FDT_WRAPPERS_SOURCES}
127
Usama Ariff1513622021-04-09 17:07:41 +0100128# Add the FDT_SOURCES and options for Dynamic Config
129FDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \
130 ${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts
131FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
132TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
133
134# Add the FW_CONFIG to FIP and specify the same to certtool
135$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
136# Add the TB_FW_CONFIG to FIP and specify the same to certtool
137$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
138
139ifeq (${SPD},spmd)
140ifeq ($(ARM_SPMC_MANIFEST_DTS),)
141ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_manifest.dts
142endif
143
144FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS}
145TC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb
146
147# Add the TOS_FW_CONFIG to FIP and specify the same to certtool
148$(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG}))
149endif
150
151#Device tree
152TC_HW_CONFIG_DTS := fdts/tc.dts
153TC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb
154FDT_SOURCES += ${TC_HW_CONFIG_DTS}
155$(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS)))
156
157# Add the HW_CONFIG to FIP and specify the same to certtool
158$(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG}))
159
160override CTX_INCLUDE_AARCH32_REGS := 0
161
162override CTX_INCLUDE_PAUTH_REGS := 1
163
Andre Przywara30661a92023-02-03 15:30:14 +0000164override ENABLE_SPE_FOR_NS := 0
Usama Ariff1513622021-04-09 17:07:41 +0100165
Andre Przywara0b7f1b02023-03-21 13:53:19 +0000166override ENABLE_FEAT_AMU := 1
Chris Kayc2d29ba2021-05-18 18:49:51 +0100167override ENABLE_AMU_AUXILIARY_COUNTERS := 1
168override ENABLE_AMU_FCONF := 1
169
170override ENABLE_MPMM := 1
171override ENABLE_MPMM_FCONF := 1
Usama Ariff1513622021-04-09 17:07:41 +0100172
Tamas Banede4f052022-09-16 16:26:15 +0200173# Include Measured Boot makefile before any Crypto library makefile.
174# Crypto library makefile may need default definitions of Measured Boot build
175# flags present in Measured Boot makefile.
176ifeq (${MEASURED_BOOT},1)
177 MEASURED_BOOT_MK := drivers/measured_boot/rss/rss_measured_boot.mk
178 $(info Including ${MEASURED_BOOT_MK})
179 include ${MEASURED_BOOT_MK}
180 $(info Including rss_comms.mk)
181 include drivers/arm/rss/rss_comms.mk
182
183 BL1_SOURCES += ${MEASURED_BOOT_SOURCES} \
184 plat/arm/board/tc/tc_common_measured_boot.c \
185 plat/arm/board/tc/tc_bl1_measured_boot.c \
186 lib/psa/measured_boot.c \
187 ${RSS_COMMS_SOURCES}
188
189 BL2_SOURCES += ${MEASURED_BOOT_SOURCES} \
190 plat/arm/board/tc/tc_common_measured_boot.c \
191 plat/arm/board/tc/tc_bl2_measured_boot.c \
192 lib/psa/measured_boot.c \
193 ${RSS_COMMS_SOURCES}
194
195PLAT_INCLUDES += -Iinclude/lib/psa
196
197endif
198
laurenw-arm4c4181c2023-05-04 14:55:37 -0500199ifneq (${PLATFORM_TEST},)
200 $(eval $(call add_define,PLATFORM_TESTS))
laurenw-arm2ce1e352023-02-07 13:40:05 -0600201
laurenw-arm4c4181c2023-05-04 14:55:37 -0500202 ifeq (${PLATFORM_TEST},rss-nv-counters)
203 include drivers/arm/rss/rss_comms.mk
laurenw-arm2ce1e352023-02-07 13:40:05 -0600204
laurenw-arm4c4181c2023-05-04 14:55:37 -0500205 # Test code.
206 BL31_SOURCES += plat/arm/board/tc/nv_counter_test.c
207
208 # Code under testing.
209 BL31_SOURCES += lib/psa/rss_platform.c \
laurenw-arm2ce1e352023-02-07 13:40:05 -0600210 drivers/arm/rss/rss_comms.c \
211 ${RSS_COMMS_SOURCES}
212
laurenw-arm4c4181c2023-05-04 14:55:37 -0500213 PLAT_INCLUDES += -Iinclude/lib/psa
laurenw-arm2ce1e352023-02-07 13:40:05 -0600214
laurenw-arm4c4181c2023-05-04 14:55:37 -0500215 $(eval $(call add_define,PLATFORM_TEST_NV_COUNTERS))
216 else ifeq (${PLATFORM_TEST},tfm-testsuite)
217 # Add this include as first, before arm_common.mk. This is necessary
218 # because arm_common.mk builds Mbed TLS, and platform_test.mk can
219 # change the list of Mbed TLS files that are to be compiled
220 # (LIBMBEDTLS_SRCS).
221 include plat/arm/board/tc/platform_test.mk
222 else
223 $(error "Unsupported PLATFORM_TEST value")
224 endif
laurenw-arm2ce1e352023-02-07 13:40:05 -0600225endif
226
Mate Toth-Pal14ba4af2022-10-21 14:24:49 +0200227
Usama Ariff1513622021-04-09 17:07:41 +0100228include plat/arm/common/arm_common.mk
229include plat/arm/css/common/css_common.mk
230include plat/arm/soc/common/soc_css.mk
231include plat/arm/board/common/board_common.mk