Olivier Deprez | 7e5597c | 2022-07-20 17:37:23 +0200 | [diff] [blame] | 1 | # Copyright (c) 2021-2022, Arm Limited. All rights reserved. |
Usama Arif | f151362 | 2021-04-09 17:07:41 +0100 | [diff] [blame] | 2 | # |
| 3 | # SPDX-License-Identifier: BSD-3-Clause |
| 4 | # |
| 5 | |
Chris Kay | e927215 | 2021-09-28 15:52:14 +0100 | [diff] [blame] | 6 | include common/fdt_wrappers.mk |
| 7 | |
Rupinderjit Singh | 820b3b6 | 2022-04-04 17:28:41 +0100 | [diff] [blame] | 8 | ifeq ($(shell expr $(TARGET_PLATFORM) \<= 2), 0) |
| 9 | $(error TARGET_PLATFORM must be less than or equal to 2) |
Usama Arif | f151362 | 2021-04-09 17:07:41 +0100 | [diff] [blame] | 10 | endif |
| 11 | |
Olivier Deprez | 7e5597c | 2022-07-20 17:37:23 +0200 | [diff] [blame] | 12 | $(eval $(call add_define,TARGET_PLATFORM)) |
| 13 | |
Usama Arif | f151362 | 2021-04-09 17:07:41 +0100 | [diff] [blame] | 14 | CSS_LOAD_SCP_IMAGES := 1 |
| 15 | |
| 16 | CSS_USE_SCMI_SDS_DRIVER := 1 |
| 17 | |
| 18 | RAS_EXTENSION := 0 |
| 19 | |
| 20 | SDEI_SUPPORT := 0 |
| 21 | |
| 22 | EL3_EXCEPTION_HANDLING := 0 |
| 23 | |
| 24 | HANDLE_EA_EL3_FIRST := 0 |
| 25 | |
| 26 | # System coherency is managed in hardware |
| 27 | HW_ASSISTED_COHERENCY := 1 |
| 28 | |
| 29 | # When building for systems with hardware-assisted coherency, there's no need to |
| 30 | # use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. |
| 31 | USE_COHERENT_MEM := 0 |
| 32 | |
| 33 | GIC_ENABLE_V4_EXTN := 1 |
| 34 | |
| 35 | # GIC-600 configuration |
| 36 | GICV3_SUPPORT_GIC600 := 1 |
| 37 | |
Usama Arif | 1925c78 | 2021-08-20 20:53:34 +0100 | [diff] [blame] | 38 | # Enable SVE |
| 39 | ENABLE_SVE_FOR_NS := 1 |
| 40 | ENABLE_SVE_FOR_SWD := 1 |
Usama Arif | f151362 | 2021-04-09 17:07:41 +0100 | [diff] [blame] | 41 | |
Davidson K | 6536105 | 2021-10-13 18:49:41 +0530 | [diff] [blame] | 42 | # enable trace buffer control registers access to NS by default |
| 43 | ENABLE_TRBE_FOR_NS := 1 |
| 44 | |
| 45 | # enable trace system registers access to NS by default |
| 46 | ENABLE_SYS_REG_TRACE_FOR_NS := 1 |
| 47 | |
| 48 | # enable trace filter control registers access to NS by default |
| 49 | ENABLE_TRF_FOR_NS := 1 |
| 50 | |
Usama Arif | f151362 | 2021-04-09 17:07:41 +0100 | [diff] [blame] | 51 | # Include GICv3 driver files |
| 52 | include drivers/arm/gic/v3/gicv3.mk |
| 53 | |
| 54 | ENT_GIC_SOURCES := ${GICV3_SOURCES} \ |
| 55 | plat/common/plat_gicv3.c \ |
| 56 | plat/arm/common/arm_gicv3.c |
| 57 | |
| 58 | override NEED_BL2U := no |
| 59 | |
| 60 | override ARM_PLAT_MT := 1 |
| 61 | |
| 62 | TC_BASE = plat/arm/board/tc |
| 63 | |
| 64 | PLAT_INCLUDES += -I${TC_BASE}/include/ |
| 65 | |
Usama Arif | f151362 | 2021-04-09 17:07:41 +0100 | [diff] [blame] | 66 | # CPU libraries for TARGET_PLATFORM=0 |
| 67 | ifeq (${TARGET_PLATFORM}, 0) |
Rupinderjit Singh | 820b3b6 | 2022-04-04 17:28:41 +0100 | [diff] [blame] | 68 | TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a510.S \ |
| 69 | lib/cpus/aarch64/cortex_a710.S \ |
Usama Arif | f151362 | 2021-04-09 17:07:41 +0100 | [diff] [blame] | 70 | lib/cpus/aarch64/cortex_x2.S |
| 71 | endif |
| 72 | |
| 73 | # CPU libraries for TARGET_PLATFORM=1 |
| 74 | ifeq (${TARGET_PLATFORM}, 1) |
Rupinderjit Singh | 820b3b6 | 2022-04-04 17:28:41 +0100 | [diff] [blame] | 75 | TC_CPU_SOURCES += lib/cpus/aarch64/cortex_a510.S \ |
| 76 | lib/cpus/aarch64/cortex_makalu.S \ |
Usama Arif | f151362 | 2021-04-09 17:07:41 +0100 | [diff] [blame] | 77 | lib/cpus/aarch64/cortex_makalu_elp_arm.S |
| 78 | endif |
| 79 | |
Rupinderjit Singh | 820b3b6 | 2022-04-04 17:28:41 +0100 | [diff] [blame] | 80 | # CPU libraries for TARGET_PLATFORM=2 |
| 81 | ifeq (${TARGET_PLATFORM}, 2) |
| 82 | TC_CPU_SOURCES += lib/cpus/aarch64/cortex_hayes.S \ |
| 83 | lib/cpus/aarch64/cortex_hunter.S |
| 84 | endif |
| 85 | |
Usama Arif | f151362 | 2021-04-09 17:07:41 +0100 | [diff] [blame] | 86 | INTERCONNECT_SOURCES := ${TC_BASE}/tc_interconnect.c |
| 87 | |
| 88 | PLAT_BL_COMMON_SOURCES += ${TC_BASE}/tc_plat.c \ |
| 89 | ${TC_BASE}/include/tc_helpers.S |
| 90 | |
| 91 | BL1_SOURCES += ${INTERCONNECT_SOURCES} \ |
| 92 | ${TC_CPU_SOURCES} \ |
| 93 | ${TC_BASE}/tc_trusted_boot.c \ |
| 94 | ${TC_BASE}/tc_err.c \ |
| 95 | drivers/arm/sbsa/sbsa.c |
| 96 | |
| 97 | |
| 98 | BL2_SOURCES += ${TC_BASE}/tc_security.c \ |
| 99 | ${TC_BASE}/tc_err.c \ |
| 100 | ${TC_BASE}/tc_trusted_boot.c \ |
Usama Arif | a49bd49 | 2021-08-17 17:57:10 +0100 | [diff] [blame] | 101 | ${TC_BASE}/tc_bl2_setup.c \ |
Usama Arif | f151362 | 2021-04-09 17:07:41 +0100 | [diff] [blame] | 102 | lib/utils/mem_region.c \ |
| 103 | drivers/arm/tzc/tzc400.c \ |
| 104 | plat/arm/common/arm_tzc400.c \ |
| 105 | plat/arm/common/arm_nor_psci_mem_protect.c |
| 106 | |
| 107 | BL31_SOURCES += ${INTERCONNECT_SOURCES} \ |
| 108 | ${TC_CPU_SOURCES} \ |
| 109 | ${ENT_GIC_SOURCES} \ |
| 110 | ${TC_BASE}/tc_bl31_setup.c \ |
| 111 | ${TC_BASE}/tc_topology.c \ |
Usama Arif | a49bd49 | 2021-08-17 17:57:10 +0100 | [diff] [blame] | 112 | lib/fconf/fconf.c \ |
| 113 | lib/fconf/fconf_dyn_cfg_getter.c \ |
Usama Arif | f151362 | 2021-04-09 17:07:41 +0100 | [diff] [blame] | 114 | drivers/cfi/v2m/v2m_flash.c \ |
| 115 | lib/utils/mem_region.c \ |
| 116 | plat/arm/common/arm_nor_psci_mem_protect.c |
| 117 | |
Chris Kay | e927215 | 2021-09-28 15:52:14 +0100 | [diff] [blame] | 118 | BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} |
| 119 | |
Usama Arif | f151362 | 2021-04-09 17:07:41 +0100 | [diff] [blame] | 120 | # Add the FDT_SOURCES and options for Dynamic Config |
| 121 | FDT_SOURCES += ${TC_BASE}/fdts/${PLAT}_fw_config.dts \ |
| 122 | ${TC_BASE}/fdts/${PLAT}_tb_fw_config.dts |
| 123 | FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb |
| 124 | TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb |
| 125 | |
| 126 | # Add the FW_CONFIG to FIP and specify the same to certtool |
| 127 | $(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG})) |
| 128 | # Add the TB_FW_CONFIG to FIP and specify the same to certtool |
| 129 | $(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG})) |
| 130 | |
| 131 | ifeq (${SPD},spmd) |
| 132 | ifeq ($(ARM_SPMC_MANIFEST_DTS),) |
| 133 | ARM_SPMC_MANIFEST_DTS := ${TC_BASE}/fdts/${PLAT}_spmc_manifest.dts |
| 134 | endif |
| 135 | |
| 136 | FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} |
| 137 | TC_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb |
| 138 | |
| 139 | # Add the TOS_FW_CONFIG to FIP and specify the same to certtool |
| 140 | $(eval $(call TOOL_ADD_PAYLOAD,${TC_TOS_FW_CONFIG},--tos-fw-config,${TC_TOS_FW_CONFIG})) |
| 141 | endif |
| 142 | |
| 143 | #Device tree |
| 144 | TC_HW_CONFIG_DTS := fdts/tc.dts |
| 145 | TC_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb |
| 146 | FDT_SOURCES += ${TC_HW_CONFIG_DTS} |
| 147 | $(eval TC_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(TC_HW_CONFIG_DTS))) |
| 148 | |
| 149 | # Add the HW_CONFIG to FIP and specify the same to certtool |
| 150 | $(eval $(call TOOL_ADD_PAYLOAD,${TC_HW_CONFIG},--hw-config,${TC_HW_CONFIG})) |
| 151 | |
| 152 | override CTX_INCLUDE_AARCH32_REGS := 0 |
| 153 | |
| 154 | override CTX_INCLUDE_PAUTH_REGS := 1 |
| 155 | |
| 156 | override ENABLE_SPE_FOR_LOWER_ELS := 0 |
| 157 | |
| 158 | override ENABLE_AMU := 1 |
Chris Kay | c2d29ba | 2021-05-18 18:49:51 +0100 | [diff] [blame] | 159 | override ENABLE_AMU_AUXILIARY_COUNTERS := 1 |
| 160 | override ENABLE_AMU_FCONF := 1 |
| 161 | |
| 162 | override ENABLE_MPMM := 1 |
| 163 | override ENABLE_MPMM_FCONF := 1 |
Usama Arif | f151362 | 2021-04-09 17:07:41 +0100 | [diff] [blame] | 164 | |
| 165 | include plat/arm/common/arm_common.mk |
| 166 | include plat/arm/css/common/css_common.mk |
| 167 | include plat/arm/soc/common/soc_css.mk |
| 168 | include plat/arm/board/common/board_common.mk |