Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 1 | /* |
Michal Simek | 2a47faa | 2023-04-14 08:43:51 +0200 | [diff] [blame] | 2 | * Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved. |
Michal Simek | b8eca3b | 2024-04-19 12:16:46 +0200 | [diff] [blame] | 3 | * Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved. |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 4 | * |
| 5 | * SPDX-License-Identifier: BSD-3-Clause |
| 6 | */ |
| 7 | |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 8 | #include <assert.h> |
Prasad Kummari | 536e110 | 2023-06-22 10:50:02 +0530 | [diff] [blame] | 9 | |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 10 | #include <common/debug.h> |
| 11 | #include <lib/mmio.h> |
| 12 | #include <lib/psci/psci.h> |
Saeed Nowshadi | c5a1bda | 2019-12-08 23:35:35 -0800 | [diff] [blame] | 13 | #include <plat/arm/common/plat_arm.h> |
Prasad Kummari | 536e110 | 2023-06-22 10:50:02 +0530 | [diff] [blame] | 14 | #include <plat/common/platform.h> |
| 15 | #include <plat_arm.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 16 | |
Jay Buddhabhatti | 10e71e4 | 2023-06-19 05:08:54 -0700 | [diff] [blame] | 17 | #include "drivers/delay_timer.h" |
Prasad Kummari | 536e110 | 2023-06-22 10:50:02 +0530 | [diff] [blame] | 18 | #include <plat_private.h> |
Tejas Patel | 6171711 | 2019-02-27 18:44:57 +0530 | [diff] [blame] | 19 | #include "pm_api_sys.h" |
| 20 | #include "pm_client.h" |
Prasad Kummari | 536e110 | 2023-06-22 10:50:02 +0530 | [diff] [blame] | 21 | #include <pm_common.h> |
Jay Buddhabhatti | 10e71e4 | 2023-06-19 05:08:54 -0700 | [diff] [blame] | 22 | #include "pm_ipi.h" |
| 23 | #include "pm_svc_main.h" |
Tejas Patel | 6171711 | 2019-02-27 18:44:57 +0530 | [diff] [blame] | 24 | |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 25 | static uintptr_t versal_sec_entry; |
| 26 | |
Venkatesh Yadav Abbarapu | bde8759 | 2022-05-24 11:11:12 +0530 | [diff] [blame] | 27 | static int32_t versal_pwr_domain_on(u_register_t mpidr) |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 28 | { |
Venkatesh Yadav Abbarapu | bde8759 | 2022-05-24 11:11:12 +0530 | [diff] [blame] | 29 | int32_t cpu_id = plat_core_pos_by_mpidr(mpidr); |
Tejas Patel | 6171711 | 2019-02-27 18:44:57 +0530 | [diff] [blame] | 30 | const struct pm_proc *proc; |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 31 | |
| 32 | VERBOSE("%s: mpidr: 0x%lx\n", __func__, mpidr); |
| 33 | |
Abhyuday Godhasara | f55a5cd | 2021-08-09 08:15:13 -0700 | [diff] [blame] | 34 | if (cpu_id == -1) { |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 35 | return PSCI_E_INTERN_FAIL; |
Abhyuday Godhasara | f55a5cd | 2021-08-09 08:15:13 -0700 | [diff] [blame] | 36 | } |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 37 | |
Venkatesh Yadav Abbarapu | bde8759 | 2022-05-24 11:11:12 +0530 | [diff] [blame] | 38 | proc = pm_get_proc((uint32_t)cpu_id); |
Ronak Jain | 807f41b | 2024-05-08 02:41:13 -0700 | [diff] [blame] | 39 | if (proc == NULL) { |
Michal Simek | b8eca3b | 2024-04-19 12:16:46 +0200 | [diff] [blame] | 40 | return PSCI_E_INTERN_FAIL; |
| 41 | } |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 42 | |
Tejas Patel | 6171711 | 2019-02-27 18:44:57 +0530 | [diff] [blame] | 43 | /* Send request to PMC to wake up selected ACPU core */ |
Abhyuday Godhasara | f435a14 | 2021-08-20 00:04:33 -0700 | [diff] [blame] | 44 | (void)pm_req_wakeup(proc->node_id, (versal_sec_entry & 0xFFFFFFFFU) | 0x1U, |
| 45 | versal_sec_entry >> 32, 0, SECURE_FLAG); |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 46 | |
Tejas Patel | 6171711 | 2019-02-27 18:44:57 +0530 | [diff] [blame] | 47 | /* Clear power down request */ |
| 48 | pm_client_wakeup(proc); |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 49 | |
| 50 | return PSCI_E_SUCCESS; |
| 51 | } |
| 52 | |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 53 | /** |
| 54 | * versal_pwr_domain_suspend() - This function sends request to PMC to suspend |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 55 | * core. |
| 56 | * @target_state: Targated state. |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 57 | * |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 58 | */ |
| 59 | static void versal_pwr_domain_suspend(const psci_power_state_t *target_state) |
| 60 | { |
Venkatesh Yadav Abbarapu | bde8759 | 2022-05-24 11:11:12 +0530 | [diff] [blame] | 61 | uint32_t state; |
| 62 | uint32_t cpu_id = plat_my_core_pos(); |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 63 | const struct pm_proc *proc = pm_get_proc(cpu_id); |
| 64 | |
Ronak Jain | 807f41b | 2024-05-08 02:41:13 -0700 | [diff] [blame] | 65 | if (proc == NULL) { |
Michal Simek | b8eca3b | 2024-04-19 12:16:46 +0200 | [diff] [blame] | 66 | return; |
| 67 | } |
| 68 | |
Abhyuday Godhasara | 589afa5 | 2021-08-11 06:15:13 -0700 | [diff] [blame] | 69 | for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) { |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 70 | VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", |
| 71 | __func__, i, target_state->pwr_domain_state[i]); |
Abhyuday Godhasara | f55a5cd | 2021-08-09 08:15:13 -0700 | [diff] [blame] | 72 | } |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 73 | |
| 74 | plat_versal_gic_cpuif_disable(); |
| 75 | |
Ravi Patel | eafc878 | 2019-06-21 05:00:49 -0700 | [diff] [blame] | 76 | if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { |
| 77 | plat_versal_gic_save(); |
| 78 | } |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 79 | |
| 80 | state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ? |
| 81 | PM_STATE_SUSPEND_TO_RAM : PM_STATE_CPU_IDLE; |
| 82 | |
| 83 | /* Send request to PMC to suspend this core */ |
Abhyuday Godhasara | f435a14 | 2021-08-20 00:04:33 -0700 | [diff] [blame] | 84 | (void)pm_self_suspend(proc->node_id, MAX_LATENCY, state, versal_sec_entry, |
| 85 | SECURE_FLAG); |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 86 | |
| 87 | /* APU is to be turned off */ |
| 88 | if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { |
| 89 | /* disable coherency */ |
| 90 | plat_arm_interconnect_exit_coherency(); |
| 91 | } |
| 92 | } |
| 93 | |
| 94 | /** |
| 95 | * versal_pwr_domain_suspend_finish() - This function performs actions to finish |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 96 | * suspend procedure. |
| 97 | * @target_state: Targated state. |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 98 | * |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 99 | */ |
| 100 | static void versal_pwr_domain_suspend_finish( |
| 101 | const psci_power_state_t *target_state) |
| 102 | { |
Venkatesh Yadav Abbarapu | bde8759 | 2022-05-24 11:11:12 +0530 | [diff] [blame] | 103 | uint32_t cpu_id = plat_my_core_pos(); |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 104 | const struct pm_proc *proc = pm_get_proc(cpu_id); |
| 105 | |
Ronak Jain | 807f41b | 2024-05-08 02:41:13 -0700 | [diff] [blame] | 106 | if (proc == NULL) { |
Michal Simek | b8eca3b | 2024-04-19 12:16:46 +0200 | [diff] [blame] | 107 | return; |
| 108 | } |
| 109 | |
Abhyuday Godhasara | 589afa5 | 2021-08-11 06:15:13 -0700 | [diff] [blame] | 110 | for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) { |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 111 | VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", |
| 112 | __func__, i, target_state->pwr_domain_state[i]); |
Abhyuday Godhasara | f55a5cd | 2021-08-09 08:15:13 -0700 | [diff] [blame] | 113 | } |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 114 | |
| 115 | /* Clear the APU power control register for this cpu */ |
| 116 | pm_client_wakeup(proc); |
| 117 | |
| 118 | /* enable coherency */ |
| 119 | plat_arm_interconnect_enter_coherency(); |
| 120 | |
| 121 | /* APU was turned off, so restore GIC context */ |
| 122 | if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) { |
| 123 | plat_versal_gic_resume(); |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 124 | } |
Ravi Patel | eafc878 | 2019-06-21 05:00:49 -0700 | [diff] [blame] | 125 | |
| 126 | plat_versal_gic_cpuif_enable(); |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 127 | } |
| 128 | |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 129 | void versal_pwr_domain_on_finish(const psci_power_state_t *target_state) |
| 130 | { |
| 131 | /* Enable the gic cpu interface */ |
| 132 | plat_versal_gic_pcpu_init(); |
| 133 | |
| 134 | /* Program the gic per-cpu distributor or re-distributor interface */ |
| 135 | plat_versal_gic_cpuif_enable(); |
| 136 | } |
| 137 | |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 138 | /** |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 139 | * versal_system_off() - This function sends the system off request to firmware. |
| 140 | * This function does not return. |
| 141 | * |
Saeed Nowshadi | c5a1bda | 2019-12-08 23:35:35 -0800 | [diff] [blame] | 142 | */ |
| 143 | static void __dead2 versal_system_off(void) |
| 144 | { |
| 145 | /* Send the power down request to the PMC */ |
Abhyuday Godhasara | f435a14 | 2021-08-20 00:04:33 -0700 | [diff] [blame] | 146 | (void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_SHUTDOWN, |
| 147 | pm_get_shutdown_scope(), SECURE_FLAG); |
Saeed Nowshadi | c5a1bda | 2019-12-08 23:35:35 -0800 | [diff] [blame] | 148 | |
Abhyuday Godhasara | f55a5cd | 2021-08-09 08:15:13 -0700 | [diff] [blame] | 149 | while (1) { |
Saeed Nowshadi | c5a1bda | 2019-12-08 23:35:35 -0800 | [diff] [blame] | 150 | wfi(); |
Abhyuday Godhasara | f55a5cd | 2021-08-09 08:15:13 -0700 | [diff] [blame] | 151 | } |
Saeed Nowshadi | c5a1bda | 2019-12-08 23:35:35 -0800 | [diff] [blame] | 152 | } |
| 153 | |
| 154 | /** |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 155 | * versal_system_reset() - This function sends the reset request to firmware |
| 156 | * for the system to reset. This function does not |
| 157 | * return. |
| 158 | * |
Saeed Nowshadi | c5a1bda | 2019-12-08 23:35:35 -0800 | [diff] [blame] | 159 | */ |
| 160 | static void __dead2 versal_system_reset(void) |
| 161 | { |
Jay Buddhabhatti | 10e71e4 | 2023-06-19 05:08:54 -0700 | [diff] [blame] | 162 | uint32_t ret, timeout = 10000U; |
| 163 | |
| 164 | request_cpu_pwrdwn(); |
| 165 | |
| 166 | /* |
| 167 | * Send the system reset request to the firmware if power down request |
| 168 | * is not received from firmware. |
| 169 | */ |
| 170 | if (!pwrdwn_req_received) { |
| 171 | (void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_RESET, |
| 172 | pm_get_shutdown_scope(), SECURE_FLAG); |
| 173 | |
| 174 | /* |
| 175 | * Wait for system shutdown request completed and idle callback |
| 176 | * not received. |
| 177 | */ |
| 178 | do { |
| 179 | ret = ipi_mb_enquire_status(primary_proc->ipi->local_ipi_id, |
| 180 | primary_proc->ipi->remote_ipi_id); |
| 181 | udelay(100); |
| 182 | timeout--; |
| 183 | } while ((ret != IPI_MB_STATUS_RECV_PENDING) && (timeout > 0U)); |
| 184 | } |
| 185 | |
| 186 | (void)psci_cpu_off(); |
Saeed Nowshadi | c5a1bda | 2019-12-08 23:35:35 -0800 | [diff] [blame] | 187 | |
Abhyuday Godhasara | f55a5cd | 2021-08-09 08:15:13 -0700 | [diff] [blame] | 188 | while (1) { |
Saeed Nowshadi | c5a1bda | 2019-12-08 23:35:35 -0800 | [diff] [blame] | 189 | wfi(); |
Abhyuday Godhasara | f55a5cd | 2021-08-09 08:15:13 -0700 | [diff] [blame] | 190 | } |
Saeed Nowshadi | c5a1bda | 2019-12-08 23:35:35 -0800 | [diff] [blame] | 191 | } |
| 192 | |
| 193 | /** |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 194 | * versal_pwr_domain_off() - This function performs actions to turn off core. |
| 195 | * @target_state: Targated state. |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 196 | * |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 197 | */ |
| 198 | static void versal_pwr_domain_off(const psci_power_state_t *target_state) |
| 199 | { |
Jay Buddhabhatti | b8c581f | 2024-06-24 01:47:39 -0700 | [diff] [blame] | 200 | uint32_t ret, fw_api_version, version[RET_PAYLOAD_ARG_CNT] = {0U}; |
Venkatesh Yadav Abbarapu | bde8759 | 2022-05-24 11:11:12 +0530 | [diff] [blame] | 201 | uint32_t cpu_id = plat_my_core_pos(); |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 202 | const struct pm_proc *proc = pm_get_proc(cpu_id); |
| 203 | |
Ronak Jain | 807f41b | 2024-05-08 02:41:13 -0700 | [diff] [blame] | 204 | if (proc == NULL) { |
Michal Simek | b8eca3b | 2024-04-19 12:16:46 +0200 | [diff] [blame] | 205 | return; |
| 206 | } |
| 207 | |
Abhyuday Godhasara | 589afa5 | 2021-08-11 06:15:13 -0700 | [diff] [blame] | 208 | for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) { |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 209 | VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n", |
| 210 | __func__, i, target_state->pwr_domain_state[i]); |
Abhyuday Godhasara | f55a5cd | 2021-08-09 08:15:13 -0700 | [diff] [blame] | 211 | } |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 212 | |
| 213 | /* Prevent interrupts from spuriously waking up this cpu */ |
| 214 | plat_versal_gic_cpuif_disable(); |
| 215 | |
| 216 | /* |
| 217 | * Send request to PMC to power down the appropriate APU CPU |
| 218 | * core. |
| 219 | * According to PSCI specification, CPU_off function does not |
| 220 | * have resume address and CPU core can only be woken up |
| 221 | * invoking CPU_on function, during which resume address will |
| 222 | * be set. |
| 223 | */ |
Jay Buddhabhatti | 31488a3 | 2023-09-11 23:50:06 -0700 | [diff] [blame] | 224 | ret = pm_feature_check((uint32_t)PM_SELF_SUSPEND, &version[0], SECURE_FLAG); |
| 225 | if (ret == PM_RET_SUCCESS) { |
| 226 | fw_api_version = version[0] & 0xFFFFU; |
| 227 | if (fw_api_version >= 3U) { |
| 228 | (void)pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_OFF, 0, |
| 229 | SECURE_FLAG); |
| 230 | } else { |
| 231 | (void)pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_IDLE, 0, |
| 232 | SECURE_FLAG); |
| 233 | } |
| 234 | } |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 235 | } |
| 236 | |
| 237 | /** |
| 238 | * versal_validate_power_state() - This function ensures that the power state |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 239 | * parameter in request is valid. |
| 240 | * @power_state: Power state of core. |
| 241 | * @req_state: Requested state. |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 242 | * |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 243 | * Return: Returns status, either success or reason. |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 244 | * |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 245 | */ |
Venkatesh Yadav Abbarapu | bde8759 | 2022-05-24 11:11:12 +0530 | [diff] [blame] | 246 | static int32_t versal_validate_power_state(uint32_t power_state, |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 247 | psci_power_state_t *req_state) |
| 248 | { |
| 249 | VERBOSE("%s: power_state: 0x%x\n", __func__, power_state); |
| 250 | |
Venkatesh Yadav Abbarapu | bde8759 | 2022-05-24 11:11:12 +0530 | [diff] [blame] | 251 | uint32_t pstate = psci_get_pstate_type(power_state); |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 252 | |
| 253 | assert(req_state); |
| 254 | |
| 255 | /* Sanity check the requested state */ |
Abhyuday Godhasara | f55a5cd | 2021-08-09 08:15:13 -0700 | [diff] [blame] | 256 | if (pstate == PSTATE_TYPE_STANDBY) { |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 257 | req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE; |
Abhyuday Godhasara | f55a5cd | 2021-08-09 08:15:13 -0700 | [diff] [blame] | 258 | } else { |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 259 | req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE; |
Abhyuday Godhasara | f55a5cd | 2021-08-09 08:15:13 -0700 | [diff] [blame] | 260 | } |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 261 | |
| 262 | /* We expect the 'state id' to be zero */ |
Abhyuday Godhasara | bacbdee | 2021-08-20 00:27:03 -0700 | [diff] [blame] | 263 | if (psci_get_pstate_id(power_state) != 0U) { |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 264 | return PSCI_E_INVALID_PARAMS; |
Abhyuday Godhasara | f55a5cd | 2021-08-09 08:15:13 -0700 | [diff] [blame] | 265 | } |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 266 | |
| 267 | return PSCI_E_SUCCESS; |
| 268 | } |
| 269 | |
| 270 | /** |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 271 | * versal_get_sys_suspend_power_state() - Get power state for system suspend. |
| 272 | * @req_state: Requested state. |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 273 | * |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 274 | */ |
| 275 | static void versal_get_sys_suspend_power_state(psci_power_state_t *req_state) |
| 276 | { |
| 277 | req_state->pwr_domain_state[PSCI_CPU_PWR_LVL] = PLAT_MAX_OFF_STATE; |
| 278 | req_state->pwr_domain_state[1] = PLAT_MAX_OFF_STATE; |
| 279 | } |
| 280 | |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 281 | static const struct plat_psci_ops versal_nopmc_psci_ops = { |
Tejas Patel | 6171711 | 2019-02-27 18:44:57 +0530 | [diff] [blame] | 282 | .pwr_domain_on = versal_pwr_domain_on, |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 283 | .pwr_domain_off = versal_pwr_domain_off, |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 284 | .pwr_domain_on_finish = versal_pwr_domain_on_finish, |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 285 | .pwr_domain_suspend = versal_pwr_domain_suspend, |
| 286 | .pwr_domain_suspend_finish = versal_pwr_domain_suspend_finish, |
Saeed Nowshadi | c5a1bda | 2019-12-08 23:35:35 -0800 | [diff] [blame] | 287 | .system_off = versal_system_off, |
| 288 | .system_reset = versal_system_reset, |
Tejas Patel | 54d1319 | 2019-02-27 18:44:55 +0530 | [diff] [blame] | 289 | .validate_power_state = versal_validate_power_state, |
| 290 | .get_sys_suspend_power_state = versal_get_sys_suspend_power_state, |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 291 | }; |
| 292 | |
| 293 | /******************************************************************************* |
| 294 | * Export the platform specific power ops. |
| 295 | ******************************************************************************/ |
Venkatesh Yadav Abbarapu | 2cefbcd | 2022-07-31 14:05:40 +0530 | [diff] [blame] | 296 | int32_t plat_setup_psci_ops(uintptr_t sec_entrypoint, |
Siva Durga Prasad Paladugu | fe4af66 | 2018-09-25 18:44:58 +0530 | [diff] [blame] | 297 | const struct plat_psci_ops **psci_ops) |
| 298 | { |
| 299 | versal_sec_entry = sec_entrypoint; |
| 300 | |
| 301 | *psci_ops = &versal_nopmc_psci_ops; |
| 302 | |
| 303 | return 0; |
| 304 | } |