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Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +05301/*
Abhyuday Godhasaraf55a5cd2021-08-09 08:15:13 -07002 * Copyright (c) 2018-2021, ARM Limited and Contributors. All rights reserved.
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +05303 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Tejas Patel54d13192019-02-27 18:44:55 +05307#include <assert.h>
8#include <plat_arm.h>
Tejas Patel69409962018-12-14 00:55:29 -08009#include <plat_private.h>
Tejas Patel61717112019-02-27 18:44:57 +053010#include <pm_common.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000011#include <common/debug.h>
12#include <lib/mmio.h>
13#include <lib/psci/psci.h>
14#include <plat/common/platform.h>
Saeed Nowshadic5a1bda2019-12-08 23:35:35 -080015#include <plat/arm/common/plat_arm.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000016
Tejas Patel61717112019-02-27 18:44:57 +053017#include "pm_api_sys.h"
18#include "pm_client.h"
19
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053020static uintptr_t versal_sec_entry;
21
Venkatesh Yadav Abbarapubde87592022-05-24 11:11:12 +053022static int32_t versal_pwr_domain_on(u_register_t mpidr)
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053023{
Venkatesh Yadav Abbarapubde87592022-05-24 11:11:12 +053024 int32_t cpu_id = plat_core_pos_by_mpidr(mpidr);
Tejas Patel61717112019-02-27 18:44:57 +053025 const struct pm_proc *proc;
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053026
27 VERBOSE("%s: mpidr: 0x%lx\n", __func__, mpidr);
28
Abhyuday Godhasaraf55a5cd2021-08-09 08:15:13 -070029 if (cpu_id == -1) {
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053030 return PSCI_E_INTERN_FAIL;
Abhyuday Godhasaraf55a5cd2021-08-09 08:15:13 -070031 }
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053032
Venkatesh Yadav Abbarapubde87592022-05-24 11:11:12 +053033 proc = pm_get_proc((uint32_t)cpu_id);
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053034
Tejas Patel61717112019-02-27 18:44:57 +053035 /* Send request to PMC to wake up selected ACPU core */
Abhyuday Godhasaraf435a142021-08-20 00:04:33 -070036 (void)pm_req_wakeup(proc->node_id, (versal_sec_entry & 0xFFFFFFFFU) | 0x1U,
37 versal_sec_entry >> 32, 0, SECURE_FLAG);
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053038
Tejas Patel61717112019-02-27 18:44:57 +053039 /* Clear power down request */
40 pm_client_wakeup(proc);
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +053041
42 return PSCI_E_SUCCESS;
43}
44
Tejas Patel54d13192019-02-27 18:44:55 +053045/**
46 * versal_pwr_domain_suspend() - This function sends request to PMC to suspend
47 * core.
48 *
49 * @target_state Targated state
50 */
51static void versal_pwr_domain_suspend(const psci_power_state_t *target_state)
52{
Venkatesh Yadav Abbarapubde87592022-05-24 11:11:12 +053053 uint32_t state;
54 uint32_t cpu_id = plat_my_core_pos();
Tejas Patel54d13192019-02-27 18:44:55 +053055 const struct pm_proc *proc = pm_get_proc(cpu_id);
56
Abhyuday Godhasara589afa52021-08-11 06:15:13 -070057 for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) {
Tejas Patel54d13192019-02-27 18:44:55 +053058 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
59 __func__, i, target_state->pwr_domain_state[i]);
Abhyuday Godhasaraf55a5cd2021-08-09 08:15:13 -070060 }
Tejas Patel54d13192019-02-27 18:44:55 +053061
62 plat_versal_gic_cpuif_disable();
63
Ravi Pateleafc8782019-06-21 05:00:49 -070064 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
65 plat_versal_gic_save();
66 }
Tejas Patel54d13192019-02-27 18:44:55 +053067
68 state = target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE ?
69 PM_STATE_SUSPEND_TO_RAM : PM_STATE_CPU_IDLE;
70
71 /* Send request to PMC to suspend this core */
Abhyuday Godhasaraf435a142021-08-20 00:04:33 -070072 (void)pm_self_suspend(proc->node_id, MAX_LATENCY, state, versal_sec_entry,
73 SECURE_FLAG);
Tejas Patel54d13192019-02-27 18:44:55 +053074
75 /* APU is to be turned off */
76 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
77 /* disable coherency */
78 plat_arm_interconnect_exit_coherency();
79 }
80}
81
82/**
83 * versal_pwr_domain_suspend_finish() - This function performs actions to finish
84 * suspend procedure.
85 *
86 * @target_state Targated state
87 */
88static void versal_pwr_domain_suspend_finish(
89 const psci_power_state_t *target_state)
90{
Venkatesh Yadav Abbarapubde87592022-05-24 11:11:12 +053091 uint32_t cpu_id = plat_my_core_pos();
Tejas Patel54d13192019-02-27 18:44:55 +053092 const struct pm_proc *proc = pm_get_proc(cpu_id);
93
Abhyuday Godhasara589afa52021-08-11 06:15:13 -070094 for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) {
Tejas Patel54d13192019-02-27 18:44:55 +053095 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
96 __func__, i, target_state->pwr_domain_state[i]);
Abhyuday Godhasaraf55a5cd2021-08-09 08:15:13 -070097 }
Tejas Patel54d13192019-02-27 18:44:55 +053098
99 /* Clear the APU power control register for this cpu */
100 pm_client_wakeup(proc);
101
102 /* enable coherency */
103 plat_arm_interconnect_enter_coherency();
104
105 /* APU was turned off, so restore GIC context */
106 if (target_state->pwr_domain_state[1] > PLAT_MAX_RET_STATE) {
107 plat_versal_gic_resume();
Tejas Patel54d13192019-02-27 18:44:55 +0530108 }
Ravi Pateleafc8782019-06-21 05:00:49 -0700109
110 plat_versal_gic_cpuif_enable();
Tejas Patel54d13192019-02-27 18:44:55 +0530111}
112
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +0530113void versal_pwr_domain_on_finish(const psci_power_state_t *target_state)
114{
115 /* Enable the gic cpu interface */
116 plat_versal_gic_pcpu_init();
117
118 /* Program the gic per-cpu distributor or re-distributor interface */
119 plat_versal_gic_cpuif_enable();
120}
121
Tejas Patel54d13192019-02-27 18:44:55 +0530122/**
Saeed Nowshadic5a1bda2019-12-08 23:35:35 -0800123 * versal_system_off() - This function sends the system off request
124 * to firmware. This function does not return.
125 */
126static void __dead2 versal_system_off(void)
127{
128 /* Send the power down request to the PMC */
Abhyuday Godhasaraf435a142021-08-20 00:04:33 -0700129 (void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_SHUTDOWN,
130 pm_get_shutdown_scope(), SECURE_FLAG);
Saeed Nowshadic5a1bda2019-12-08 23:35:35 -0800131
Abhyuday Godhasaraf55a5cd2021-08-09 08:15:13 -0700132 while (1) {
Saeed Nowshadic5a1bda2019-12-08 23:35:35 -0800133 wfi();
Abhyuday Godhasaraf55a5cd2021-08-09 08:15:13 -0700134 }
Saeed Nowshadic5a1bda2019-12-08 23:35:35 -0800135}
136
137/**
138 * versal_system_reset() - This function sends the reset request
139 * to firmware for the system to reset. This function does not return.
140 */
141static void __dead2 versal_system_reset(void)
142{
143 /* Send the system reset request to the PMC */
Abhyuday Godhasaraf435a142021-08-20 00:04:33 -0700144 (void)pm_system_shutdown(XPM_SHUTDOWN_TYPE_RESET,
145 pm_get_shutdown_scope(), SECURE_FLAG);
Saeed Nowshadic5a1bda2019-12-08 23:35:35 -0800146
Abhyuday Godhasaraf55a5cd2021-08-09 08:15:13 -0700147 while (1) {
Saeed Nowshadic5a1bda2019-12-08 23:35:35 -0800148 wfi();
Abhyuday Godhasaraf55a5cd2021-08-09 08:15:13 -0700149 }
Saeed Nowshadic5a1bda2019-12-08 23:35:35 -0800150}
151
152/**
Tejas Patel54d13192019-02-27 18:44:55 +0530153 * versal_pwr_domain_off() - This function performs actions to turn off core
154 *
155 * @target_state Targated state
156 */
157static void versal_pwr_domain_off(const psci_power_state_t *target_state)
158{
Venkatesh Yadav Abbarapubde87592022-05-24 11:11:12 +0530159 uint32_t cpu_id = plat_my_core_pos();
Tejas Patel54d13192019-02-27 18:44:55 +0530160 const struct pm_proc *proc = pm_get_proc(cpu_id);
161
Abhyuday Godhasara589afa52021-08-11 06:15:13 -0700162 for (size_t i = 0U; i <= PLAT_MAX_PWR_LVL; i++) {
Tejas Patel54d13192019-02-27 18:44:55 +0530163 VERBOSE("%s: target_state->pwr_domain_state[%lu]=%x\n",
164 __func__, i, target_state->pwr_domain_state[i]);
Abhyuday Godhasaraf55a5cd2021-08-09 08:15:13 -0700165 }
Tejas Patel54d13192019-02-27 18:44:55 +0530166
167 /* Prevent interrupts from spuriously waking up this cpu */
168 plat_versal_gic_cpuif_disable();
169
170 /*
171 * Send request to PMC to power down the appropriate APU CPU
172 * core.
173 * According to PSCI specification, CPU_off function does not
174 * have resume address and CPU core can only be woken up
175 * invoking CPU_on function, during which resume address will
176 * be set.
177 */
Abhyuday Godhasaraf435a142021-08-20 00:04:33 -0700178 (void)pm_self_suspend(proc->node_id, MAX_LATENCY, PM_STATE_CPU_IDLE, 0,
179 SECURE_FLAG);
Tejas Patel54d13192019-02-27 18:44:55 +0530180}
181
182/**
183 * versal_validate_power_state() - This function ensures that the power state
184 * parameter in request is valid.
185 *
186 * @power_state Power state of core
187 * @req_state Requested state
188 *
189 * @return Returns status, either success or reason
190 */
Venkatesh Yadav Abbarapubde87592022-05-24 11:11:12 +0530191static int32_t versal_validate_power_state(uint32_t power_state,
Tejas Patel54d13192019-02-27 18:44:55 +0530192 psci_power_state_t *req_state)
193{
194 VERBOSE("%s: power_state: 0x%x\n", __func__, power_state);
195
Venkatesh Yadav Abbarapubde87592022-05-24 11:11:12 +0530196 uint32_t pstate = psci_get_pstate_type(power_state);
Tejas Patel54d13192019-02-27 18:44:55 +0530197
198 assert(req_state);
199
200 /* Sanity check the requested state */
Abhyuday Godhasaraf55a5cd2021-08-09 08:15:13 -0700201 if (pstate == PSTATE_TYPE_STANDBY) {
Tejas Patel54d13192019-02-27 18:44:55 +0530202 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE;
Abhyuday Godhasaraf55a5cd2021-08-09 08:15:13 -0700203 } else {
Tejas Patel54d13192019-02-27 18:44:55 +0530204 req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_OFF_STATE;
Abhyuday Godhasaraf55a5cd2021-08-09 08:15:13 -0700205 }
Tejas Patel54d13192019-02-27 18:44:55 +0530206
207 /* We expect the 'state id' to be zero */
Abhyuday Godhasarabacbdee2021-08-20 00:27:03 -0700208 if (psci_get_pstate_id(power_state) != 0U) {
Tejas Patel54d13192019-02-27 18:44:55 +0530209 return PSCI_E_INVALID_PARAMS;
Abhyuday Godhasaraf55a5cd2021-08-09 08:15:13 -0700210 }
Tejas Patel54d13192019-02-27 18:44:55 +0530211
212 return PSCI_E_SUCCESS;
213}
214
215/**
216 * versal_get_sys_suspend_power_state() - Get power state for system suspend
217 *
218 * @req_state Requested state
219 */
220static void versal_get_sys_suspend_power_state(psci_power_state_t *req_state)
221{
222 req_state->pwr_domain_state[PSCI_CPU_PWR_LVL] = PLAT_MAX_OFF_STATE;
223 req_state->pwr_domain_state[1] = PLAT_MAX_OFF_STATE;
224}
225
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +0530226static const struct plat_psci_ops versal_nopmc_psci_ops = {
Tejas Patel61717112019-02-27 18:44:57 +0530227 .pwr_domain_on = versal_pwr_domain_on,
Tejas Patel54d13192019-02-27 18:44:55 +0530228 .pwr_domain_off = versal_pwr_domain_off,
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +0530229 .pwr_domain_on_finish = versal_pwr_domain_on_finish,
Tejas Patel54d13192019-02-27 18:44:55 +0530230 .pwr_domain_suspend = versal_pwr_domain_suspend,
231 .pwr_domain_suspend_finish = versal_pwr_domain_suspend_finish,
Saeed Nowshadic5a1bda2019-12-08 23:35:35 -0800232 .system_off = versal_system_off,
233 .system_reset = versal_system_reset,
Tejas Patel54d13192019-02-27 18:44:55 +0530234 .validate_power_state = versal_validate_power_state,
235 .get_sys_suspend_power_state = versal_get_sys_suspend_power_state,
Siva Durga Prasad Paladugufe4af662018-09-25 18:44:58 +0530236};
237
238/*******************************************************************************
239 * Export the platform specific power ops.
240 ******************************************************************************/
241int plat_setup_psci_ops(uintptr_t sec_entrypoint,
242 const struct plat_psci_ops **psci_ops)
243{
244 versal_sec_entry = sec_entrypoint;
245
246 *psci_ops = &versal_nopmc_psci_ops;
247
248 return 0;
249}