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Rex-BC Chen749b2112021-09-28 11:24:09 +08001#
2# Copyright (c) 2021, MediaTek Inc. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7MTK_PLAT := plat/mediatek
8MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT}
9
10PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
Christine Zhuccd26002021-10-11 21:29:58 +080011 -I${MTK_PLAT}/common/drivers/gic600/ \
Rex-BC Chend24c05d2021-10-06 18:55:53 +080012 -I${MTK_PLAT}/common/drivers/timer/ \
Penny Janfb70fb42021-10-03 10:11:04 +080013 -I${MTK_PLAT_SOC}/drivers/emi_mpu/ \
James Lo4ac7a412021-10-06 18:12:30 +080014 -I${MTK_PLAT_SOC}/drivers/pmic/ \
Rex-BC Chen749b2112021-09-28 11:24:09 +080015 -I${MTK_PLAT_SOC}/include/
16
Christine Zhuccd26002021-10-11 21:29:58 +080017GICV3_SUPPORT_GIC600 := 1
Rex-BC Chen749b2112021-09-28 11:24:09 +080018include drivers/arm/gic/v3/gicv3.mk
19include lib/xlat_tables_v2/xlat_tables.mk
20
21PLAT_BL_COMMON_SOURCES := ${GICV3_SOURCES} \
22 ${XLAT_TABLES_LIB_SRCS} \
23 plat/common/aarch64/crash_console_helpers.S \
24 plat/common/plat_psci_common.c
25
26
27BL31_SOURCES += common/desc_image_load.c \
Rex-BC Chen0bee8f92021-10-06 19:00:13 +080028 drivers/delay_timer/delay_timer.c \
29 drivers/delay_timer/generic_delay_timer.c \
Rex-BC Chen749b2112021-09-28 11:24:09 +080030 drivers/ti/uart/aarch64/16550_console.S \
31 lib/bl_aux_params/bl_aux_params.c \
32 lib/cpus/aarch64/cortex_a55.S \
33 lib/cpus/aarch64/cortex_a76.S \
34 plat/common/plat_gicv3.c \
Christine Zhuccd26002021-10-11 21:29:58 +080035 ${MTK_PLAT}/common/drivers/gic600/mt_gic_v3.c \
James Lo4ac7a412021-10-06 18:12:30 +080036 ${MTK_PLAT}/common/drivers/pmic_wrap/pmic_wrap_init.c \
Rex-BC Chen749b2112021-09-28 11:24:09 +080037 ${MTK_PLAT}/common/mtk_plat_common.c \
Rex-BC Chenabd9ecf2021-10-06 19:25:50 +080038 ${MTK_PLAT}/common/mtk_sip_svc.c \
Rex-BC Chen749b2112021-09-28 11:24:09 +080039 ${MTK_PLAT}/common/params_setup.c \
Rex-BC Chend24c05d2021-10-06 18:55:53 +080040 ${MTK_PLAT}/common/drivers/timer/mt_timer.c \
Rex-BC Chen749b2112021-09-28 11:24:09 +080041 ${MTK_PLAT_SOC}/aarch64/platform_common.c \
42 ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \
43 ${MTK_PLAT_SOC}/bl31_plat_setup.c \
Penny Janfb70fb42021-10-03 10:11:04 +080044 ${MTK_PLAT_SOC}/drivers/emi_mpu/emi_mpu.c \
James Lo4ac7a412021-10-06 18:12:30 +080045 ${MTK_PLAT_SOC}/drivers/pmic/pmic.c \
Rex-BC Chen749b2112021-09-28 11:24:09 +080046 ${MTK_PLAT_SOC}/plat_pm.c \
Rex-BC Chenabd9ecf2021-10-06 19:25:50 +080047 ${MTK_PLAT_SOC}/plat_sip_calls.c \
Rex-BC Chen749b2112021-09-28 11:24:09 +080048 ${MTK_PLAT_SOC}/plat_topology.c
49
50# Configs for A76 and A55
51HW_ASSISTED_COHERENCY := 1
52USE_COHERENT_MEM := 0
53CTX_INCLUDE_AARCH32_REGS := 0
54ERRATA_A55_1530923 := 1
55ERRATA_A55_1221012 := 1
56
57# indicate the reset vector address can be programmed
58PROGRAMMABLE_RESET_ADDRESS := 1
59
60COLD_BOOT_SINGLE_CPU := 1
61
62MACH_MT8186 := 1
63$(eval $(call add_define,MACH_MT8186))
64
65include lib/coreboot/coreboot.mk