Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 1 | /* |
Alexei Fedorov | caa1802 | 2020-07-14 10:47:25 +0100 | [diff] [blame^] | 2 | * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
Alexei Fedorov | caa1802 | 2020-07-14 10:47:25 +0100 | [diff] [blame^] | 7 | #pragma message __FILE__ " is deprecated, use gicv2.mk instead" |
| 8 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 9 | #include <assert.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 10 | |
| 11 | #include <drivers/arm/gic_common.h> |
| 12 | #include <lib/mmio.h> |
| 13 | |
Soby Mathew | 50f6fe4 | 2016-02-01 17:59:22 +0000 | [diff] [blame] | 14 | #include "gic_common_private.h" |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 15 | |
| 16 | /******************************************************************************* |
| 17 | * GIC Distributor interface accessors for reading entire registers |
| 18 | ******************************************************************************/ |
| 19 | /* |
| 20 | * Accessor to read the GIC Distributor IGROUPR corresponding to the interrupt |
| 21 | * `id`, 32 interrupt ids at a time. |
| 22 | */ |
| 23 | unsigned int gicd_read_igroupr(uintptr_t base, unsigned int id) |
| 24 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 25 | unsigned int n = id >> IGROUPR_SHIFT; |
| 26 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 27 | return mmio_read_32(base + GICD_IGROUPR + (n << 2)); |
| 28 | } |
| 29 | |
| 30 | /* |
| 31 | * Accessor to read the GIC Distributor ISENABLER corresponding to the |
| 32 | * interrupt `id`, 32 interrupt ids at a time. |
| 33 | */ |
| 34 | unsigned int gicd_read_isenabler(uintptr_t base, unsigned int id) |
| 35 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 36 | unsigned int n = id >> ISENABLER_SHIFT; |
| 37 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 38 | return mmio_read_32(base + GICD_ISENABLER + (n << 2)); |
| 39 | } |
| 40 | |
| 41 | /* |
| 42 | * Accessor to read the GIC Distributor ICENABLER corresponding to the |
| 43 | * interrupt `id`, 32 interrupt IDs at a time. |
| 44 | */ |
| 45 | unsigned int gicd_read_icenabler(uintptr_t base, unsigned int id) |
| 46 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 47 | unsigned int n = id >> ICENABLER_SHIFT; |
| 48 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 49 | return mmio_read_32(base + GICD_ICENABLER + (n << 2)); |
| 50 | } |
| 51 | |
| 52 | /* |
| 53 | * Accessor to read the GIC Distributor ISPENDR corresponding to the |
| 54 | * interrupt `id`, 32 interrupt IDs at a time. |
| 55 | */ |
| 56 | unsigned int gicd_read_ispendr(uintptr_t base, unsigned int id) |
| 57 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 58 | unsigned int n = id >> ISPENDR_SHIFT; |
| 59 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 60 | return mmio_read_32(base + GICD_ISPENDR + (n << 2)); |
| 61 | } |
| 62 | |
| 63 | /* |
| 64 | * Accessor to read the GIC Distributor ICPENDR corresponding to the |
| 65 | * interrupt `id`, 32 interrupt IDs at a time. |
| 66 | */ |
| 67 | unsigned int gicd_read_icpendr(uintptr_t base, unsigned int id) |
| 68 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 69 | unsigned int n = id >> ICPENDR_SHIFT; |
| 70 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 71 | return mmio_read_32(base + GICD_ICPENDR + (n << 2)); |
| 72 | } |
| 73 | |
| 74 | /* |
| 75 | * Accessor to read the GIC Distributor ISACTIVER corresponding to the |
| 76 | * interrupt `id`, 32 interrupt IDs at a time. |
| 77 | */ |
| 78 | unsigned int gicd_read_isactiver(uintptr_t base, unsigned int id) |
| 79 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 80 | unsigned int n = id >> ISACTIVER_SHIFT; |
| 81 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 82 | return mmio_read_32(base + GICD_ISACTIVER + (n << 2)); |
| 83 | } |
| 84 | |
| 85 | /* |
| 86 | * Accessor to read the GIC Distributor ICACTIVER corresponding to the |
| 87 | * interrupt `id`, 32 interrupt IDs at a time. |
| 88 | */ |
| 89 | unsigned int gicd_read_icactiver(uintptr_t base, unsigned int id) |
| 90 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 91 | unsigned int n = id >> ICACTIVER_SHIFT; |
| 92 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 93 | return mmio_read_32(base + GICD_ICACTIVER + (n << 2)); |
| 94 | } |
| 95 | |
| 96 | /* |
| 97 | * Accessor to read the GIC Distributor IPRIORITYR corresponding to the |
| 98 | * interrupt `id`, 4 interrupt IDs at a time. |
| 99 | */ |
| 100 | unsigned int gicd_read_ipriorityr(uintptr_t base, unsigned int id) |
| 101 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 102 | unsigned int n = id >> IPRIORITYR_SHIFT; |
| 103 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 104 | return mmio_read_32(base + GICD_IPRIORITYR + (n << 2)); |
| 105 | } |
| 106 | |
| 107 | /* |
| 108 | * Accessor to read the GIC Distributor ICGFR corresponding to the |
| 109 | * interrupt `id`, 16 interrupt IDs at a time. |
| 110 | */ |
| 111 | unsigned int gicd_read_icfgr(uintptr_t base, unsigned int id) |
| 112 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 113 | unsigned int n = id >> ICFGR_SHIFT; |
| 114 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 115 | return mmio_read_32(base + GICD_ICFGR + (n << 2)); |
| 116 | } |
| 117 | |
| 118 | /* |
| 119 | * Accessor to read the GIC Distributor NSACR corresponding to the |
| 120 | * interrupt `id`, 16 interrupt IDs at a time. |
| 121 | */ |
| 122 | unsigned int gicd_read_nsacr(uintptr_t base, unsigned int id) |
| 123 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 124 | unsigned int n = id >> NSACR_SHIFT; |
| 125 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 126 | return mmio_read_32(base + GICD_NSACR + (n << 2)); |
| 127 | } |
| 128 | |
| 129 | /******************************************************************************* |
| 130 | * GIC Distributor interface accessors for writing entire registers |
| 131 | ******************************************************************************/ |
| 132 | /* |
| 133 | * Accessor to write the GIC Distributor IGROUPR corresponding to the |
| 134 | * interrupt `id`, 32 interrupt IDs at a time. |
| 135 | */ |
| 136 | void gicd_write_igroupr(uintptr_t base, unsigned int id, unsigned int val) |
| 137 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 138 | unsigned int n = id >> IGROUPR_SHIFT; |
| 139 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 140 | mmio_write_32(base + GICD_IGROUPR + (n << 2), val); |
| 141 | } |
| 142 | |
| 143 | /* |
| 144 | * Accessor to write the GIC Distributor ISENABLER corresponding to the |
| 145 | * interrupt `id`, 32 interrupt IDs at a time. |
| 146 | */ |
| 147 | void gicd_write_isenabler(uintptr_t base, unsigned int id, unsigned int val) |
| 148 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 149 | unsigned int n = id >> ISENABLER_SHIFT; |
| 150 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 151 | mmio_write_32(base + GICD_ISENABLER + (n << 2), val); |
| 152 | } |
| 153 | |
| 154 | /* |
| 155 | * Accessor to write the GIC Distributor ICENABLER corresponding to the |
| 156 | * interrupt `id`, 32 interrupt IDs at a time. |
| 157 | */ |
| 158 | void gicd_write_icenabler(uintptr_t base, unsigned int id, unsigned int val) |
| 159 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 160 | unsigned int n = id >> ICENABLER_SHIFT; |
| 161 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 162 | mmio_write_32(base + GICD_ICENABLER + (n << 2), val); |
| 163 | } |
| 164 | |
| 165 | /* |
| 166 | * Accessor to write the GIC Distributor ISPENDR corresponding to the |
| 167 | * interrupt `id`, 32 interrupt IDs at a time. |
| 168 | */ |
| 169 | void gicd_write_ispendr(uintptr_t base, unsigned int id, unsigned int val) |
| 170 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 171 | unsigned int n = id >> ISPENDR_SHIFT; |
| 172 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 173 | mmio_write_32(base + GICD_ISPENDR + (n << 2), val); |
| 174 | } |
| 175 | |
| 176 | /* |
| 177 | * Accessor to write the GIC Distributor ICPENDR corresponding to the |
| 178 | * interrupt `id`, 32 interrupt IDs at a time. |
| 179 | */ |
| 180 | void gicd_write_icpendr(uintptr_t base, unsigned int id, unsigned int val) |
| 181 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 182 | unsigned int n = id >> ICPENDR_SHIFT; |
| 183 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 184 | mmio_write_32(base + GICD_ICPENDR + (n << 2), val); |
| 185 | } |
| 186 | |
| 187 | /* |
| 188 | * Accessor to write the GIC Distributor ISACTIVER corresponding to the |
| 189 | * interrupt `id`, 32 interrupt IDs at a time. |
| 190 | */ |
| 191 | void gicd_write_isactiver(uintptr_t base, unsigned int id, unsigned int val) |
| 192 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 193 | unsigned int n = id >> ISACTIVER_SHIFT; |
| 194 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 195 | mmio_write_32(base + GICD_ISACTIVER + (n << 2), val); |
| 196 | } |
| 197 | |
| 198 | /* |
| 199 | * Accessor to write the GIC Distributor ICACTIVER corresponding to the |
| 200 | * interrupt `id`, 32 interrupt IDs at a time. |
| 201 | */ |
| 202 | void gicd_write_icactiver(uintptr_t base, unsigned int id, unsigned int val) |
| 203 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 204 | unsigned int n = id >> ICACTIVER_SHIFT; |
| 205 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 206 | mmio_write_32(base + GICD_ICACTIVER + (n << 2), val); |
| 207 | } |
| 208 | |
| 209 | /* |
| 210 | * Accessor to write the GIC Distributor IPRIORITYR corresponding to the |
| 211 | * interrupt `id`, 4 interrupt IDs at a time. |
| 212 | */ |
| 213 | void gicd_write_ipriorityr(uintptr_t base, unsigned int id, unsigned int val) |
| 214 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 215 | unsigned int n = id >> IPRIORITYR_SHIFT; |
| 216 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 217 | mmio_write_32(base + GICD_IPRIORITYR + (n << 2), val); |
| 218 | } |
| 219 | |
| 220 | /* |
| 221 | * Accessor to write the GIC Distributor ICFGR corresponding to the |
| 222 | * interrupt `id`, 16 interrupt IDs at a time. |
| 223 | */ |
| 224 | void gicd_write_icfgr(uintptr_t base, unsigned int id, unsigned int val) |
| 225 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 226 | unsigned int n = id >> ICFGR_SHIFT; |
| 227 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 228 | mmio_write_32(base + GICD_ICFGR + (n << 2), val); |
| 229 | } |
| 230 | |
| 231 | /* |
| 232 | * Accessor to write the GIC Distributor NSACR corresponding to the |
| 233 | * interrupt `id`, 16 interrupt IDs at a time. |
| 234 | */ |
| 235 | void gicd_write_nsacr(uintptr_t base, unsigned int id, unsigned int val) |
| 236 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 237 | unsigned int n = id >> NSACR_SHIFT; |
| 238 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 239 | mmio_write_32(base + GICD_NSACR + (n << 2), val); |
| 240 | } |
| 241 | |
| 242 | /******************************************************************************* |
Soby Mathew | 50f6fe4 | 2016-02-01 17:59:22 +0000 | [diff] [blame] | 243 | * GIC Distributor functions for accessing the GIC registers |
| 244 | * corresponding to a single interrupt ID. These functions use bitwise |
| 245 | * operations or appropriate register accesses to modify or return |
| 246 | * the bit-field corresponding the single interrupt ID. |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 247 | ******************************************************************************/ |
| 248 | unsigned int gicd_get_igroupr(uintptr_t base, unsigned int id) |
| 249 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 250 | unsigned int bit_num = id & ((1U << IGROUPR_SHIFT) - 1U); |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 251 | unsigned int reg_val = gicd_read_igroupr(base, id); |
| 252 | |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 253 | return (reg_val >> bit_num) & 0x1U; |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 254 | } |
| 255 | |
| 256 | void gicd_set_igroupr(uintptr_t base, unsigned int id) |
| 257 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 258 | unsigned int bit_num = id & ((1U << IGROUPR_SHIFT) - 1U); |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 259 | unsigned int reg_val = gicd_read_igroupr(base, id); |
| 260 | |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 261 | gicd_write_igroupr(base, id, reg_val | (1U << bit_num)); |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 262 | } |
| 263 | |
| 264 | void gicd_clr_igroupr(uintptr_t base, unsigned int id) |
| 265 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 266 | unsigned int bit_num = id & ((1U << IGROUPR_SHIFT) - 1U); |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 267 | unsigned int reg_val = gicd_read_igroupr(base, id); |
| 268 | |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 269 | gicd_write_igroupr(base, id, reg_val & ~(1U << bit_num)); |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 270 | } |
| 271 | |
| 272 | void gicd_set_isenabler(uintptr_t base, unsigned int id) |
| 273 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 274 | unsigned int bit_num = id & ((1U << ISENABLER_SHIFT) - 1U); |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 275 | |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 276 | gicd_write_isenabler(base, id, (1U << bit_num)); |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 277 | } |
| 278 | |
| 279 | void gicd_set_icenabler(uintptr_t base, unsigned int id) |
| 280 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 281 | unsigned int bit_num = id & ((1U << ICENABLER_SHIFT) - 1U); |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 282 | |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 283 | gicd_write_icenabler(base, id, (1U << bit_num)); |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 284 | } |
| 285 | |
| 286 | void gicd_set_ispendr(uintptr_t base, unsigned int id) |
| 287 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 288 | unsigned int bit_num = id & ((1U << ISPENDR_SHIFT) - 1U); |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 289 | |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 290 | gicd_write_ispendr(base, id, (1U << bit_num)); |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 291 | } |
| 292 | |
| 293 | void gicd_set_icpendr(uintptr_t base, unsigned int id) |
| 294 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 295 | unsigned int bit_num = id & ((1U << ICPENDR_SHIFT) - 1U); |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 296 | |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 297 | gicd_write_icpendr(base, id, (1U << bit_num)); |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 298 | } |
| 299 | |
Jeenu Viswambharan | 24e7029 | 2017-09-22 08:32:09 +0100 | [diff] [blame] | 300 | unsigned int gicd_get_isactiver(uintptr_t base, unsigned int id) |
| 301 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 302 | unsigned int bit_num = id & ((1U << ISACTIVER_SHIFT) - 1U); |
Jeenu Viswambharan | 24e7029 | 2017-09-22 08:32:09 +0100 | [diff] [blame] | 303 | unsigned int reg_val = gicd_read_isactiver(base, id); |
| 304 | |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 305 | return (reg_val >> bit_num) & 0x1U; |
Jeenu Viswambharan | 24e7029 | 2017-09-22 08:32:09 +0100 | [diff] [blame] | 306 | } |
| 307 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 308 | void gicd_set_isactiver(uintptr_t base, unsigned int id) |
| 309 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 310 | unsigned int bit_num = id & ((1U << ISACTIVER_SHIFT) - 1U); |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 311 | |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 312 | gicd_write_isactiver(base, id, (1U << bit_num)); |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 313 | } |
| 314 | |
| 315 | void gicd_set_icactiver(uintptr_t base, unsigned int id) |
| 316 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 317 | unsigned int bit_num = id & ((1U << ICACTIVER_SHIFT) - 1U); |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 318 | |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 319 | gicd_write_icactiver(base, id, (1U << bit_num)); |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 320 | } |
Soby Mathew | 421259e | 2016-01-15 14:20:57 +0000 | [diff] [blame] | 321 | |
| 322 | void gicd_set_ipriorityr(uintptr_t base, unsigned int id, unsigned int pri) |
| 323 | { |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 324 | uint8_t val = pri & GIC_PRI_MASK; |
| 325 | |
| 326 | mmio_write_8(base + GICD_IPRIORITYR + id, val); |
Soby Mathew | 421259e | 2016-01-15 14:20:57 +0000 | [diff] [blame] | 327 | } |
Jeenu Viswambharan | 4684bce | 2017-09-22 08:32:09 +0100 | [diff] [blame] | 328 | |
| 329 | void gicd_set_icfgr(uintptr_t base, unsigned int id, unsigned int cfg) |
| 330 | { |
Jeenu Viswambharan | b6982c0 | 2018-03-22 08:57:52 +0000 | [diff] [blame] | 331 | /* Interrupt configuration is a 2-bit field */ |
Antonio Nino Diaz | ca994e7 | 2018-08-21 10:02:33 +0100 | [diff] [blame] | 332 | unsigned int bit_num = id & ((1U << ICFGR_SHIFT) - 1U); |
Jeenu Viswambharan | b6982c0 | 2018-03-22 08:57:52 +0000 | [diff] [blame] | 333 | unsigned int bit_shift = bit_num << 1; |
| 334 | |
Jeenu Viswambharan | 4684bce | 2017-09-22 08:32:09 +0100 | [diff] [blame] | 335 | uint32_t reg_val = gicd_read_icfgr(base, id); |
| 336 | |
| 337 | /* Clear the field, and insert required configuration */ |
Jeenu Viswambharan | b6982c0 | 2018-03-22 08:57:52 +0000 | [diff] [blame] | 338 | reg_val &= ~(GIC_CFG_MASK << bit_shift); |
| 339 | reg_val |= ((cfg & GIC_CFG_MASK) << bit_shift); |
Jeenu Viswambharan | 4684bce | 2017-09-22 08:32:09 +0100 | [diff] [blame] | 340 | |
| 341 | gicd_write_icfgr(base, id, reg_val); |
| 342 | } |