Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 1 | /* |
Yann Gautier | f9d40d5 | 2019-01-17 14:41:46 +0100 | [diff] [blame] | 2 | * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 7 | #include <assert.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 8 | #include <string.h> |
| 9 | |
| 10 | #include <platform_def.h> |
| 11 | |
| 12 | #include <arch_helpers.h> |
| 13 | #include <common/bl_common.h> |
| 14 | #include <common/debug.h> |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 15 | #include <context.h> |
Yann Gautier | f9d40d5 | 2019-01-17 14:41:46 +0100 | [diff] [blame] | 16 | #include <drivers/arm/gicv2.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 17 | #include <drivers/arm/tzc400.h> |
| 18 | #include <drivers/generic_delay_timer.h> |
Yann Gautier | 52448ab | 2019-01-17 14:53:24 +0100 | [diff] [blame] | 19 | #include <drivers/st/bsec.h> |
Etienne Carriere | e96162e | 2020-04-10 11:32:54 +0200 | [diff] [blame] | 20 | #include <drivers/st/etzpc.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 21 | #include <drivers/st/stm32_console.h> |
Yann Gautier | 14d769c | 2019-01-18 11:13:15 +0100 | [diff] [blame] | 22 | #include <drivers/st/stm32_gpio.h> |
Yann Gautier | 091eab5 | 2019-06-04 18:06:34 +0200 | [diff] [blame] | 23 | #include <drivers/st/stm32_iwdg.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 24 | #include <drivers/st/stm32mp1_clk.h> |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 25 | #include <dt-bindings/clock/stm32mp1-clks.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 26 | #include <lib/el3_runtime/context_mgmt.h> |
| 27 | #include <lib/mmio.h> |
| 28 | #include <lib/xlat_tables/xlat_tables_v2.h> |
| 29 | #include <plat/common/platform.h> |
| 30 | |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 31 | #include <platform_sp_min.h> |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 32 | |
| 33 | /****************************************************************************** |
| 34 | * Placeholder variables for copying the arguments that have been passed to |
| 35 | * BL32 from BL2. |
| 36 | ******************************************************************************/ |
| 37 | static entry_point_info_t bl33_image_ep_info; |
| 38 | |
Andre Przywara | 678c6fa | 2020-01-25 00:58:35 +0000 | [diff] [blame] | 39 | static console_t console; |
Yann Gautier | 8593e44 | 2018-11-14 18:46:15 +0100 | [diff] [blame] | 40 | |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 41 | /******************************************************************************* |
| 42 | * Interrupt handler for FIQ (secure IRQ) |
| 43 | ******************************************************************************/ |
| 44 | void sp_min_plat_fiq_handler(uint32_t id) |
| 45 | { |
Yann Gautier | f9d40d5 | 2019-01-17 14:41:46 +0100 | [diff] [blame] | 46 | switch (id & INT_ID_MASK) { |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 47 | case STM32MP1_IRQ_TZC400: |
| 48 | ERROR("STM32MP1_IRQ_TZC400 generated\n"); |
| 49 | panic(); |
| 50 | break; |
| 51 | case STM32MP1_IRQ_AXIERRIRQ: |
| 52 | ERROR("STM32MP1_IRQ_AXIERRIRQ generated\n"); |
| 53 | panic(); |
| 54 | break; |
| 55 | default: |
Yann Gautier | f9d40d5 | 2019-01-17 14:41:46 +0100 | [diff] [blame] | 56 | ERROR("SECURE IT handler not define for it : %u", id); |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 57 | break; |
| 58 | } |
| 59 | } |
| 60 | |
| 61 | /******************************************************************************* |
| 62 | * Return a pointer to the 'entry_point_info' structure of the next image for |
| 63 | * the security state specified. BL33 corresponds to the non-secure image type |
| 64 | * while BL32 corresponds to the secure image type. A NULL pointer is returned |
| 65 | * if the image does not exist. |
| 66 | ******************************************************************************/ |
| 67 | entry_point_info_t *sp_min_plat_get_bl33_ep_info(void) |
| 68 | { |
| 69 | entry_point_info_t *next_image_info; |
| 70 | |
| 71 | next_image_info = &bl33_image_ep_info; |
| 72 | |
| 73 | if (next_image_info->pc == 0U) { |
| 74 | return NULL; |
| 75 | } |
| 76 | |
| 77 | return next_image_info; |
| 78 | } |
| 79 | |
Etienne Carriere | 72369b1 | 2019-12-08 08:17:56 +0100 | [diff] [blame] | 80 | CASSERT((STM32MP_SEC_SYSRAM_BASE == STM32MP_SYSRAM_BASE) && |
| 81 | ((STM32MP_SEC_SYSRAM_BASE + STM32MP_SEC_SYSRAM_SIZE) <= |
| 82 | (STM32MP_SYSRAM_BASE + STM32MP_SYSRAM_SIZE)), |
| 83 | assert_secure_sysram_fits_at_begining_of_sysram); |
| 84 | |
| 85 | #ifdef STM32MP_NS_SYSRAM_BASE |
| 86 | CASSERT((STM32MP_NS_SYSRAM_BASE >= STM32MP_SEC_SYSRAM_BASE) && |
| 87 | ((STM32MP_NS_SYSRAM_BASE + STM32MP_NS_SYSRAM_SIZE) == |
| 88 | (STM32MP_SYSRAM_BASE + STM32MP_SYSRAM_SIZE)), |
| 89 | assert_non_secure_sysram_fits_at_end_of_sysram); |
| 90 | |
| 91 | CASSERT((STM32MP_NS_SYSRAM_BASE & (PAGE_SIZE_4KB - U(1))) == 0U, |
| 92 | assert_non_secure_sysram_base_is_4kbyte_aligned); |
| 93 | |
| 94 | #define TZMA1_SECURE_RANGE \ |
| 95 | (((STM32MP_NS_SYSRAM_BASE - STM32MP_SYSRAM_BASE) >> FOUR_KB_SHIFT) - 1U) |
| 96 | #else |
Etienne Carriere | e96162e | 2020-04-10 11:32:54 +0200 | [diff] [blame] | 97 | #define TZMA1_SECURE_RANGE STM32MP1_ETZPC_TZMA_ALL_SECURE |
Etienne Carriere | 72369b1 | 2019-12-08 08:17:56 +0100 | [diff] [blame] | 98 | #endif /* STM32MP_NS_SYSRAM_BASE */ |
Etienne Carriere | e96162e | 2020-04-10 11:32:54 +0200 | [diff] [blame] | 99 | #define TZMA0_SECURE_RANGE STM32MP1_ETZPC_TZMA_ALL_SECURE |
| 100 | |
| 101 | static void stm32mp1_etzpc_early_setup(void) |
| 102 | { |
| 103 | unsigned int n; |
| 104 | |
| 105 | if (etzpc_init() != 0) { |
| 106 | panic(); |
| 107 | } |
| 108 | |
| 109 | etzpc_configure_tzma(STM32MP1_ETZPC_TZMA_ROM, TZMA0_SECURE_RANGE); |
| 110 | etzpc_configure_tzma(STM32MP1_ETZPC_TZMA_SYSRAM, TZMA1_SECURE_RANGE); |
| 111 | |
| 112 | /* Release security on all shared resources */ |
| 113 | for (n = 0; n < STM32MP1_ETZPC_SEC_ID_LIMIT; n++) { |
| 114 | etzpc_configure_decprot(n, ETZPC_DECPROT_NS_RW); |
| 115 | } |
| 116 | } |
| 117 | |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 118 | /******************************************************************************* |
| 119 | * Perform any BL32 specific platform actions. |
| 120 | ******************************************************************************/ |
| 121 | void sp_min_early_platform_setup2(u_register_t arg0, u_register_t arg1, |
| 122 | u_register_t arg2, u_register_t arg3) |
| 123 | { |
Yann Gautier | f9d40d5 | 2019-01-17 14:41:46 +0100 | [diff] [blame] | 124 | struct dt_node_info dt_uart_info; |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 125 | int result; |
| 126 | bl_params_t *params_from_bl2 = (bl_params_t *)arg0; |
| 127 | |
| 128 | /* Imprecise aborts can be masked in NonSecure */ |
| 129 | write_scr(read_scr() | SCR_AW_BIT); |
| 130 | |
Yann Gautier | 7ffe84b | 2019-07-11 10:45:09 +0200 | [diff] [blame] | 131 | mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, |
| 132 | BL_CODE_END - BL_CODE_BASE, |
| 133 | MT_CODE | MT_SECURE); |
| 134 | |
| 135 | configure_mmu(); |
| 136 | |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 137 | assert(params_from_bl2 != NULL); |
| 138 | assert(params_from_bl2->h.type == PARAM_BL_PARAMS); |
| 139 | assert(params_from_bl2->h.version >= VERSION_2); |
| 140 | |
| 141 | bl_params_node_t *bl_params = params_from_bl2->head; |
| 142 | |
| 143 | /* |
| 144 | * Copy BL33 entry point information. |
| 145 | * They are stored in Secure RAM, in BL2's address space. |
| 146 | */ |
| 147 | while (bl_params != NULL) { |
| 148 | if (bl_params->image_id == BL33_IMAGE_ID) { |
| 149 | bl33_image_ep_info = *bl_params->ep_info; |
| 150 | break; |
| 151 | } |
| 152 | |
| 153 | bl_params = bl_params->next_params_info; |
| 154 | } |
| 155 | |
| 156 | if (dt_open_and_check() < 0) { |
| 157 | panic(); |
| 158 | } |
| 159 | |
Yann Gautier | 52448ab | 2019-01-17 14:53:24 +0100 | [diff] [blame] | 160 | if (bsec_probe() != 0) { |
| 161 | panic(); |
| 162 | } |
| 163 | |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 164 | if (stm32mp1_clk_probe() < 0) { |
| 165 | panic(); |
| 166 | } |
| 167 | |
Yann Gautier | f9d40d5 | 2019-01-17 14:41:46 +0100 | [diff] [blame] | 168 | result = dt_get_stdout_uart_info(&dt_uart_info); |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 169 | |
Yann Gautier | 038bff2 | 2019-01-17 19:17:47 +0100 | [diff] [blame] | 170 | if ((result > 0) && (dt_uart_info.status != 0U)) { |
Yann Gautier | a30e5f7 | 2019-09-04 11:55:10 +0200 | [diff] [blame] | 171 | unsigned int console_flags; |
| 172 | |
Yann Gautier | f9d40d5 | 2019-01-17 14:41:46 +0100 | [diff] [blame] | 173 | if (console_stm32_register(dt_uart_info.base, 0, |
Yann Gautier | a2e2a30 | 2019-02-14 11:13:39 +0100 | [diff] [blame] | 174 | STM32MP_UART_BAUDRATE, &console) == |
Yann Gautier | 8593e44 | 2018-11-14 18:46:15 +0100 | [diff] [blame] | 175 | 0) { |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 176 | panic(); |
| 177 | } |
Yann Gautier | 738df26 | 2019-04-24 16:14:22 +0200 | [diff] [blame] | 178 | |
Yann Gautier | a30e5f7 | 2019-09-04 11:55:10 +0200 | [diff] [blame] | 179 | console_flags = CONSOLE_FLAG_BOOT | CONSOLE_FLAG_CRASH | |
| 180 | CONSOLE_FLAG_TRANSLATE_CRLF; |
Yann Gautier | 738df26 | 2019-04-24 16:14:22 +0200 | [diff] [blame] | 181 | #ifdef DEBUG |
Yann Gautier | a30e5f7 | 2019-09-04 11:55:10 +0200 | [diff] [blame] | 182 | console_flags |= CONSOLE_FLAG_RUNTIME; |
Yann Gautier | 738df26 | 2019-04-24 16:14:22 +0200 | [diff] [blame] | 183 | #endif |
Andre Przywara | 678c6fa | 2020-01-25 00:58:35 +0000 | [diff] [blame] | 184 | console_set_scope(&console, console_flags); |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 185 | } |
Etienne Carriere | e96162e | 2020-04-10 11:32:54 +0200 | [diff] [blame] | 186 | |
| 187 | stm32mp1_etzpc_early_setup(); |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 188 | } |
| 189 | |
| 190 | /******************************************************************************* |
| 191 | * Initialize the MMU, security and the GIC. |
| 192 | ******************************************************************************/ |
| 193 | void sp_min_platform_setup(void) |
| 194 | { |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 195 | /* Initialize tzc400 after DDR initialization */ |
| 196 | stm32mp1_security_setup(); |
| 197 | |
| 198 | generic_delay_timer_init(); |
| 199 | |
| 200 | stm32mp1_gic_init(); |
Yann Gautier | 14d769c | 2019-01-18 11:13:15 +0100 | [diff] [blame] | 201 | |
Yann Gautier | 14d769c | 2019-01-18 11:13:15 +0100 | [diff] [blame] | 202 | /* Set GPIO bank Z as non secure */ |
| 203 | for (uint32_t pin = 0U; pin < STM32MP_GPIOZ_PIN_MAX_COUNT; pin++) { |
| 204 | set_gpio_secure_cfg(GPIO_BANK_Z, pin, false); |
| 205 | } |
Yann Gautier | 091eab5 | 2019-06-04 18:06:34 +0200 | [diff] [blame] | 206 | |
| 207 | if (stm32_iwdg_init() < 0) { |
| 208 | panic(); |
| 209 | } |
Yann Gautier | 9d135e4 | 2018-07-16 19:36:06 +0200 | [diff] [blame] | 210 | } |
| 211 | |
| 212 | void sp_min_plat_arch_setup(void) |
| 213 | { |
| 214 | } |