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Dan Handley9df48042015-03-19 18:58:55 +00001/*
Soby Mathew7d5a2e72018-01-10 15:59:31 +00002 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Dan Handley9df48042015-03-19 18:58:55 +00005 */
6
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00007#include <assert.h>
8
Dan Handley9df48042015-03-19 18:58:55 +00009#include <arch.h>
10#include <arch_helpers.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000011#include <common/bl_common.h>
12#include <common/debug.h>
13#include <drivers/console.h>
14#include <lib/extensions/ras.h>
15#include <lib/mmio.h>
16#include <lib/utils.h>
17#include <lib/xlat_tables/xlat_tables_compat.h>
18#include <plat/common/platform.h>
Antonio Nino Diaza320ecd2019-01-15 14:19:50 +000019#include <platform_def.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000020
Dan Handley9df48042015-03-19 18:58:55 +000021#include <plat_arm.h>
Dan Handley9df48042015-03-19 18:58:55 +000022
Dan Handley9df48042015-03-19 18:58:55 +000023/*
24 * Placeholder variables for copying the arguments that have been passed to
Juan Castillo7d199412015-12-14 09:35:25 +000025 * BL31 from BL2.
Dan Handley9df48042015-03-19 18:58:55 +000026 */
27static entry_point_info_t bl32_image_ep_info;
28static entry_point_info_t bl33_image_ep_info;
29
Soby Mathew7823d9e2018-10-14 08:13:44 +010030#if !RESET_TO_BL31
Soby Mathewaf14b462018-06-01 16:53:38 +010031/*
32 * Check that BL31_BASE is above ARM_TB_FW_CONFIG_LIMIT. The reserved page
33 * is required for SOC_FW_CONFIG/TOS_FW_CONFIG passed from BL2.
34 */
35CASSERT(BL31_BASE >= ARM_TB_FW_CONFIG_LIMIT, assert_bl31_base_overflows);
Soby Mathew7823d9e2018-10-14 08:13:44 +010036#endif
Dan Handley9df48042015-03-19 18:58:55 +000037
38/* Weak definitions may be overridden in specific ARM standard platform */
Soby Mathew7d5a2e72018-01-10 15:59:31 +000039#pragma weak bl31_early_platform_setup2
Dan Handley9df48042015-03-19 18:58:55 +000040#pragma weak bl31_platform_setup
41#pragma weak bl31_plat_arch_setup
42#pragma weak bl31_plat_get_next_image_ep_info
Dan Handley9df48042015-03-19 18:58:55 +000043
Daniel Boulbyb1b058d2018-09-18 11:52:49 +010044#define MAP_BL31_TOTAL MAP_REGION_FLAT( \
Soby Mathew7823d9e2018-10-14 08:13:44 +010045 BL31_START, \
46 BL31_END - BL31_START, \
Daniel Boulby45a2c9e2018-07-06 16:54:44 +010047 MT_MEMORY | MT_RW | MT_SECURE)
Daniel Boulbyb1b058d2018-09-18 11:52:49 +010048#if RECLAIM_INIT_CODE
49IMPORT_SYM(unsigned long, __INIT_CODE_START__, BL_INIT_CODE_BASE);
50IMPORT_SYM(unsigned long, __INIT_CODE_END__, BL_INIT_CODE_END);
51
52#define MAP_BL_INIT_CODE MAP_REGION_FLAT( \
53 BL_INIT_CODE_BASE, \
54 BL_INIT_CODE_END \
55 - BL_INIT_CODE_BASE, \
56 MT_CODE | MT_SECURE)
57#endif
Dan Handley9df48042015-03-19 18:58:55 +000058
59/*******************************************************************************
60 * Return a pointer to the 'entry_point_info' structure of the next image for the
Juan Castillo7d199412015-12-14 09:35:25 +000061 * security state specified. BL33 corresponds to the non-secure image type
62 * while BL32 corresponds to the secure image type. A NULL pointer is returned
Dan Handley9df48042015-03-19 18:58:55 +000063 * if the image does not exist.
64 ******************************************************************************/
Sandrine Bailleuxb3b6e222018-07-11 12:44:22 +020065struct entry_point_info *bl31_plat_get_next_image_ep_info(uint32_t type)
Dan Handley9df48042015-03-19 18:58:55 +000066{
67 entry_point_info_t *next_image_info;
68
69 assert(sec_state_is_valid(type));
70 next_image_info = (type == NON_SECURE)
71 ? &bl33_image_ep_info : &bl32_image_ep_info;
72 /*
73 * None of the images on the ARM development platforms can have 0x0
74 * as the entrypoint
75 */
76 if (next_image_info->pc)
77 return next_image_info;
78 else
79 return NULL;
80}
81
82/*******************************************************************************
Juan Castillo7d199412015-12-14 09:35:25 +000083 * Perform any BL31 early platform setup common to ARM standard platforms.
Dan Handley9df48042015-03-19 18:58:55 +000084 * Here is an opportunity to copy parameters passed by the calling EL (S-EL1
John Tsichritzisd653d332018-09-14 10:34:57 +010085 * in BL2 & EL3 in BL1) before they are lost (potentially). This needs to be
Dan Handley9df48042015-03-19 18:58:55 +000086 * done before the MMU is initialized so that the memory layout can be used
87 * while creating page tables. BL2 has flushed this information to memory, so
88 * we are guaranteed to pick up good data.
89 ******************************************************************************/
Daniel Boulbyf45a4bb2018-09-18 13:26:03 +010090void __init arm_bl31_early_platform_setup(void *from_bl2, uintptr_t soc_fw_config,
Soby Mathew7d5a2e72018-01-10 15:59:31 +000091 uintptr_t hw_config, void *plat_params_from_bl2)
Dan Handley9df48042015-03-19 18:58:55 +000092{
93 /* Initialize the console to provide early debug support */
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +010094 arm_console_boot_init();
Dan Handley9df48042015-03-19 18:58:55 +000095
96#if RESET_TO_BL31
Juan Castillo7d199412015-12-14 09:35:25 +000097 /* There are no parameters from BL2 if BL31 is a reset vector */
Dan Handley9df48042015-03-19 18:58:55 +000098 assert(from_bl2 == NULL);
99 assert(plat_params_from_bl2 == NULL);
100
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100101# ifdef BL32_BASE
Juan Castillo7d199412015-12-14 09:35:25 +0000102 /* Populate entry point information for BL32 */
Dan Handley9df48042015-03-19 18:58:55 +0000103 SET_PARAM_HEAD(&bl32_image_ep_info,
104 PARAM_EP,
105 VERSION_1,
106 0);
107 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
108 bl32_image_ep_info.pc = BL32_BASE;
109 bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry();
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100110# endif /* BL32_BASE */
Dan Handley9df48042015-03-19 18:58:55 +0000111
Juan Castillo7d199412015-12-14 09:35:25 +0000112 /* Populate entry point information for BL33 */
Dan Handley9df48042015-03-19 18:58:55 +0000113 SET_PARAM_HEAD(&bl33_image_ep_info,
114 PARAM_EP,
115 VERSION_1,
116 0);
117 /*
Juan Castillo7d199412015-12-14 09:35:25 +0000118 * Tell BL31 where the non-trusted software image
Dan Handley9df48042015-03-19 18:58:55 +0000119 * is located and the entry state information
120 */
121 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint();
Soby Mathew4876ae32016-05-09 17:20:10 +0100122
Dan Handley9df48042015-03-19 18:58:55 +0000123 bl33_image_ep_info.spsr = arm_get_spsr_for_bl33_entry();
124 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
125
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100126# if ARM_LINUX_KERNEL_AS_BL33
127 /*
128 * According to the file ``Documentation/arm64/booting.txt`` of the
129 * Linux kernel tree, Linux expects the physical address of the device
130 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and
131 * must be 0.
132 */
133 bl33_image_ep_info.args.arg0 = (u_register_t)ARM_PRELOADED_DTB_BASE;
134 bl33_image_ep_info.args.arg1 = 0U;
135 bl33_image_ep_info.args.arg2 = 0U;
136 bl33_image_ep_info.args.arg3 = 0U;
137# endif
138
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100139#else /* RESET_TO_BL31 */
140
Dan Handley9df48042015-03-19 18:58:55 +0000141 /*
142 * In debug builds, we pass a special value in 'plat_params_from_bl2'
Juan Castillo7d199412015-12-14 09:35:25 +0000143 * to verify platform parameters from BL2 to BL31.
Dan Handley9df48042015-03-19 18:58:55 +0000144 * In release builds, it's not used.
145 */
146 assert(((unsigned long long)plat_params_from_bl2) ==
147 ARM_BL31_PLAT_PARAM_VAL);
148
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100149 /*
150 * Check params passed from BL2 should not be NULL,
151 */
152 bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2;
153 assert(params_from_bl2 != NULL);
154 assert(params_from_bl2->h.type == PARAM_BL_PARAMS);
155 assert(params_from_bl2->h.version >= VERSION_2);
156
157 bl_params_node_t *bl_params = params_from_bl2->head;
158
159 /*
160 * Copy BL33 and BL32 (if present), entry point information.
161 * They are stored in Secure RAM, in BL2's address space.
162 */
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +0100163 while (bl_params != NULL) {
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100164 if (bl_params->image_id == BL32_IMAGE_ID)
165 bl32_image_ep_info = *bl_params->ep_info;
166
167 if (bl_params->image_id == BL33_IMAGE_ID)
168 bl33_image_ep_info = *bl_params->ep_info;
169
170 bl_params = bl_params->next_params_info;
171 }
172
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +0100173 if (bl33_image_ep_info.pc == 0U)
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100174 panic();
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100175#endif /* RESET_TO_BL31 */
Dan Handley9df48042015-03-19 18:58:55 +0000176}
177
Soby Mathew7d5a2e72018-01-10 15:59:31 +0000178void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
179 u_register_t arg2, u_register_t arg3)
Dan Handley9df48042015-03-19 18:58:55 +0000180{
Soby Mathew7d5a2e72018-01-10 15:59:31 +0000181 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
Dan Handley9df48042015-03-19 18:58:55 +0000182
183 /*
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000184 * Initialize Interconnect for this cluster during cold boot.
Dan Handley9df48042015-03-19 18:58:55 +0000185 * No need for locks as no other CPU is active.
186 */
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000187 plat_arm_interconnect_init();
Sandrine Bailleuxda797f62015-05-14 14:13:05 +0100188
Dan Handley9df48042015-03-19 18:58:55 +0000189 /*
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000190 * Enable Interconnect coherency for the primary CPU's cluster.
Sandrine Bailleuxda797f62015-05-14 14:13:05 +0100191 * Earlier bootloader stages might already do this (e.g. Trusted
192 * Firmware's BL1 does it) but we can't assume so. There is no harm in
193 * executing this code twice anyway.
Dan Handley9df48042015-03-19 18:58:55 +0000194 * Platform specific PSCI code will enable coherency for other
195 * clusters.
196 */
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000197 plat_arm_interconnect_enter_coherency();
Dan Handley9df48042015-03-19 18:58:55 +0000198}
199
200/*******************************************************************************
Juan Castillo7d199412015-12-14 09:35:25 +0000201 * Perform any BL31 platform setup common to ARM standard platforms
Dan Handley9df48042015-03-19 18:58:55 +0000202 ******************************************************************************/
203void arm_bl31_platform_setup(void)
204{
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000205 /* Initialize the GIC driver, cpu and distributor interfaces */
206 plat_arm_gic_driver_init();
Dan Handley9df48042015-03-19 18:58:55 +0000207 plat_arm_gic_init();
Dan Handley9df48042015-03-19 18:58:55 +0000208
209#if RESET_TO_BL31
210 /*
211 * Do initial security configuration to allow DRAM/device access
212 * (if earlier BL has not already done so).
213 */
214 plat_arm_security_setup();
215
Roberto Vargas550eb082018-01-05 16:00:05 +0000216#if defined(PLAT_ARM_MEM_PROT_ADDR)
217 arm_nor_psci_do_dyn_mem_protect();
218#endif /* PLAT_ARM_MEM_PROT_ADDR */
219
Dan Handley9df48042015-03-19 18:58:55 +0000220#endif /* RESET_TO_BL31 */
221
222 /* Enable and initialize the System level generic timer */
223 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF,
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +0100224 CNTCR_FCREQ(0U) | CNTCR_EN);
Dan Handley9df48042015-03-19 18:58:55 +0000225
226 /* Allow access to the System counter timer module */
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100227 arm_configure_sys_timer();
Dan Handley9df48042015-03-19 18:58:55 +0000228
229 /* Initialize power controller before setting up topology */
230 plat_arm_pwrc_setup();
Jeenu Viswambharana5b5b8d2018-02-06 12:21:39 +0000231
232#if RAS_EXTENSION
233 ras_init();
234#endif
Dan Handley9df48042015-03-19 18:58:55 +0000235}
236
Soby Mathew2fd66be2015-12-09 11:38:43 +0000237/*******************************************************************************
Juan Castillo7d199412015-12-14 09:35:25 +0000238 * Perform any BL31 platform runtime setup prior to BL31 exit common to ARM
Soby Mathew2fd66be2015-12-09 11:38:43 +0000239 * standard platforms
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100240 * Perform BL31 platform setup
Soby Mathew2fd66be2015-12-09 11:38:43 +0000241 ******************************************************************************/
242void arm_bl31_plat_runtime_setup(void)
243{
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100244#if MULTI_CONSOLE_API
245 console_switch_state(CONSOLE_FLAG_RUNTIME);
246#else
247 console_uninit();
248#endif
249
Soby Mathew2fd66be2015-12-09 11:38:43 +0000250 /* Initialize the runtime console */
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100251 arm_console_runtime_init();
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100252#if RECLAIM_INIT_CODE
253 arm_free_init_memory();
254#endif
Soby Mathew2fd66be2015-12-09 11:38:43 +0000255}
256
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100257#if RECLAIM_INIT_CODE
258/*
259 * Zero out and make RW memory used to store image boot time code so it can
260 * be reclaimed during runtime
261 */
262void arm_free_init_memory(void)
263{
264 int ret = xlat_change_mem_attributes(BL_INIT_CODE_BASE,
265 BL_INIT_CODE_END - BL_INIT_CODE_BASE,
266 MT_RW_DATA);
267
268 if (ret != 0) {
269 ERROR("Could not reclaim initialization code");
270 panic();
271 }
272}
273#endif
274
Daniel Boulbyf45a4bb2018-09-18 13:26:03 +0100275void __init bl31_platform_setup(void)
Dan Handley9df48042015-03-19 18:58:55 +0000276{
277 arm_bl31_platform_setup();
278}
279
Soby Mathew2fd66be2015-12-09 11:38:43 +0000280void bl31_plat_runtime_setup(void)
281{
282 arm_bl31_plat_runtime_setup();
283}
284
Dan Handley9df48042015-03-19 18:58:55 +0000285/*******************************************************************************
Sandrine Bailleux4a1267a2016-05-18 16:11:47 +0100286 * Perform the very early platform specific architectural setup shared between
287 * ARM standard platforms. This only does basic initialization. Later
288 * architectural setup (bl31_arch_setup()) does not do anything platform
289 * specific.
Dan Handley9df48042015-03-19 18:58:55 +0000290 ******************************************************************************/
Daniel Boulbyf45a4bb2018-09-18 13:26:03 +0100291void __init arm_bl31_plat_arch_setup(void)
Dan Handley9df48042015-03-19 18:58:55 +0000292{
Daniel Boulby45a2c9e2018-07-06 16:54:44 +0100293 const mmap_region_t bl_regions[] = {
294 MAP_BL31_TOTAL,
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100295#if RECLAIM_INIT_CODE
296 MAP_BL_INIT_CODE,
297#endif
Daniel Boulby4e97abd2018-07-16 14:09:15 +0100298 ARM_MAP_BL_RO,
Roberto Vargase3adc372018-05-23 09:27:06 +0100299#if USE_ROMLIB
300 ARM_MAP_ROMLIB_CODE,
301 ARM_MAP_ROMLIB_DATA,
302#endif
Dan Handley9df48042015-03-19 18:58:55 +0000303#if USE_COHERENT_MEM
Daniel Boulby45a2c9e2018-07-06 16:54:44 +0100304 ARM_MAP_BL_COHERENT_RAM,
Dan Handley9df48042015-03-19 18:58:55 +0000305#endif
Daniel Boulby45a2c9e2018-07-06 16:54:44 +0100306 {0}
307 };
308
Roberto Vargas344ff022018-10-19 16:44:18 +0100309 setup_page_tables(bl_regions, plat_arm_get_mmap());
Daniel Boulby45a2c9e2018-07-06 16:54:44 +0100310
Sandrine Bailleux4a1267a2016-05-18 16:11:47 +0100311 enable_mmu_el3(0);
Roberto Vargase3adc372018-05-23 09:27:06 +0100312
313 arm_setup_romlib();
Dan Handley9df48042015-03-19 18:58:55 +0000314}
315
Daniel Boulbyf45a4bb2018-09-18 13:26:03 +0100316void __init bl31_plat_arch_setup(void)
Dan Handley9df48042015-03-19 18:58:55 +0000317{
318 arm_bl31_plat_arch_setup();
319}