blob: 6346f0fffd2bf440f8804ec1c73f121df8788210 [file] [log] [blame]
Dan Handley9df48042015-03-19 18:58:55 +00001/*
Soby Mathew7d5a2e72018-01-10 15:59:31 +00002 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Dan Handley9df48042015-03-19 18:58:55 +00005 */
6
7#include <arch.h>
8#include <arch_helpers.h>
9#include <arm_def.h>
Dan Handley9df48042015-03-19 18:58:55 +000010#include <assert.h>
11#include <bl_common.h>
Dan Handley9df48042015-03-19 18:58:55 +000012#include <console.h>
Yatharth Kocharf9a0f162016-09-13 17:07:57 +010013#include <debug.h>
Dan Handley9df48042015-03-19 18:58:55 +000014#include <mmio.h>
15#include <plat_arm.h>
16#include <platform.h>
Jeenu Viswambharana5b5b8d2018-02-06 12:21:39 +000017#include <ras.h>
Dan Handley9df48042015-03-19 18:58:55 +000018
Soby Mathewa0fedc42016-06-16 14:52:04 +010019#define BL31_END (uintptr_t)(&__BL31_END__)
Dan Handley9df48042015-03-19 18:58:55 +000020
Dan Handley9df48042015-03-19 18:58:55 +000021/*
22 * Placeholder variables for copying the arguments that have been passed to
Juan Castillo7d199412015-12-14 09:35:25 +000023 * BL31 from BL2.
Dan Handley9df48042015-03-19 18:58:55 +000024 */
25static entry_point_info_t bl32_image_ep_info;
26static entry_point_info_t bl33_image_ep_info;
27
Soby Mathewaf14b462018-06-01 16:53:38 +010028/*
29 * Check that BL31_BASE is above ARM_TB_FW_CONFIG_LIMIT. The reserved page
30 * is required for SOC_FW_CONFIG/TOS_FW_CONFIG passed from BL2.
31 */
32CASSERT(BL31_BASE >= ARM_TB_FW_CONFIG_LIMIT, assert_bl31_base_overflows);
Dan Handley9df48042015-03-19 18:58:55 +000033
34/* Weak definitions may be overridden in specific ARM standard platform */
Soby Mathew7d5a2e72018-01-10 15:59:31 +000035#pragma weak bl31_early_platform_setup2
Dan Handley9df48042015-03-19 18:58:55 +000036#pragma weak bl31_platform_setup
37#pragma weak bl31_plat_arch_setup
38#pragma weak bl31_plat_get_next_image_ep_info
Dan Handley9df48042015-03-19 18:58:55 +000039
40
41/*******************************************************************************
42 * Return a pointer to the 'entry_point_info' structure of the next image for the
Juan Castillo7d199412015-12-14 09:35:25 +000043 * security state specified. BL33 corresponds to the non-secure image type
44 * while BL32 corresponds to the secure image type. A NULL pointer is returned
Dan Handley9df48042015-03-19 18:58:55 +000045 * if the image does not exist.
46 ******************************************************************************/
47entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
48{
49 entry_point_info_t *next_image_info;
50
51 assert(sec_state_is_valid(type));
52 next_image_info = (type == NON_SECURE)
53 ? &bl33_image_ep_info : &bl32_image_ep_info;
54 /*
55 * None of the images on the ARM development platforms can have 0x0
56 * as the entrypoint
57 */
58 if (next_image_info->pc)
59 return next_image_info;
60 else
61 return NULL;
62}
63
64/*******************************************************************************
Juan Castillo7d199412015-12-14 09:35:25 +000065 * Perform any BL31 early platform setup common to ARM standard platforms.
Dan Handley9df48042015-03-19 18:58:55 +000066 * Here is an opportunity to copy parameters passed by the calling EL (S-EL1
67 * in BL2 & S-EL3 in BL1) before they are lost (potentially). This needs to be
68 * done before the MMU is initialized so that the memory layout can be used
69 * while creating page tables. BL2 has flushed this information to memory, so
70 * we are guaranteed to pick up good data.
71 ******************************************************************************/
Yatharth Kocharf9a0f162016-09-13 17:07:57 +010072#if LOAD_IMAGE_V2
Soby Mathew7d5a2e72018-01-10 15:59:31 +000073void arm_bl31_early_platform_setup(void *from_bl2, uintptr_t soc_fw_config,
74 uintptr_t hw_config, void *plat_params_from_bl2)
Yatharth Kocharf9a0f162016-09-13 17:07:57 +010075#else
Soby Mathew7d5a2e72018-01-10 15:59:31 +000076void arm_bl31_early_platform_setup(bl31_params_t *from_bl2, uintptr_t soc_fw_config,
77 uintptr_t hw_config, void *plat_params_from_bl2)
Yatharth Kocharf9a0f162016-09-13 17:07:57 +010078#endif
Dan Handley9df48042015-03-19 18:58:55 +000079{
80 /* Initialize the console to provide early debug support */
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +010081 arm_console_boot_init();
Dan Handley9df48042015-03-19 18:58:55 +000082
83#if RESET_TO_BL31
Juan Castillo7d199412015-12-14 09:35:25 +000084 /* There are no parameters from BL2 if BL31 is a reset vector */
Dan Handley9df48042015-03-19 18:58:55 +000085 assert(from_bl2 == NULL);
86 assert(plat_params_from_bl2 == NULL);
87
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +010088# ifdef BL32_BASE
Juan Castillo7d199412015-12-14 09:35:25 +000089 /* Populate entry point information for BL32 */
Dan Handley9df48042015-03-19 18:58:55 +000090 SET_PARAM_HEAD(&bl32_image_ep_info,
91 PARAM_EP,
92 VERSION_1,
93 0);
94 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
95 bl32_image_ep_info.pc = BL32_BASE;
96 bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry();
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +010097# endif /* BL32_BASE */
Dan Handley9df48042015-03-19 18:58:55 +000098
Juan Castillo7d199412015-12-14 09:35:25 +000099 /* Populate entry point information for BL33 */
Dan Handley9df48042015-03-19 18:58:55 +0000100 SET_PARAM_HEAD(&bl33_image_ep_info,
101 PARAM_EP,
102 VERSION_1,
103 0);
104 /*
Juan Castillo7d199412015-12-14 09:35:25 +0000105 * Tell BL31 where the non-trusted software image
Dan Handley9df48042015-03-19 18:58:55 +0000106 * is located and the entry state information
107 */
108 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint();
Soby Mathew4876ae32016-05-09 17:20:10 +0100109
Dan Handley9df48042015-03-19 18:58:55 +0000110 bl33_image_ep_info.spsr = arm_get_spsr_for_bl33_entry();
111 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
112
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100113# if ARM_LINUX_KERNEL_AS_BL33
114 /*
115 * According to the file ``Documentation/arm64/booting.txt`` of the
116 * Linux kernel tree, Linux expects the physical address of the device
117 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and
118 * must be 0.
119 */
120 bl33_image_ep_info.args.arg0 = (u_register_t)ARM_PRELOADED_DTB_BASE;
121 bl33_image_ep_info.args.arg1 = 0U;
122 bl33_image_ep_info.args.arg2 = 0U;
123 bl33_image_ep_info.args.arg3 = 0U;
124# endif
125
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100126#else /* RESET_TO_BL31 */
127
Dan Handley9df48042015-03-19 18:58:55 +0000128 /*
129 * In debug builds, we pass a special value in 'plat_params_from_bl2'
Juan Castillo7d199412015-12-14 09:35:25 +0000130 * to verify platform parameters from BL2 to BL31.
Dan Handley9df48042015-03-19 18:58:55 +0000131 * In release builds, it's not used.
132 */
133 assert(((unsigned long long)plat_params_from_bl2) ==
134 ARM_BL31_PLAT_PARAM_VAL);
135
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100136# if LOAD_IMAGE_V2
137 /*
138 * Check params passed from BL2 should not be NULL,
139 */
140 bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2;
141 assert(params_from_bl2 != NULL);
142 assert(params_from_bl2->h.type == PARAM_BL_PARAMS);
143 assert(params_from_bl2->h.version >= VERSION_2);
144
145 bl_params_node_t *bl_params = params_from_bl2->head;
146
147 /*
148 * Copy BL33 and BL32 (if present), entry point information.
149 * They are stored in Secure RAM, in BL2's address space.
150 */
151 while (bl_params) {
152 if (bl_params->image_id == BL32_IMAGE_ID)
153 bl32_image_ep_info = *bl_params->ep_info;
154
155 if (bl_params->image_id == BL33_IMAGE_ID)
156 bl33_image_ep_info = *bl_params->ep_info;
157
158 bl_params = bl_params->next_params_info;
159 }
160
161 if (bl33_image_ep_info.pc == 0)
162 panic();
163
164# else /* LOAD_IMAGE_V2 */
165
166 /*
167 * Check params passed from BL2 should not be NULL,
168 */
169 assert(from_bl2 != NULL);
170 assert(from_bl2->h.type == PARAM_BL31);
171 assert(from_bl2->h.version >= VERSION_1);
172
Soby Mathew7d5a2e72018-01-10 15:59:31 +0000173 /* Dynamic Config is not supported for LOAD_IMAGE_V1 */
174 assert(soc_fw_config == 0);
175 assert(hw_config == 0);
176
Dan Handley9df48042015-03-19 18:58:55 +0000177 /*
Juan Castillo7d199412015-12-14 09:35:25 +0000178 * Copy BL32 (if populated by BL2) and BL33 entry point information.
Dan Handley9df48042015-03-19 18:58:55 +0000179 * They are stored in Secure RAM, in BL2's address space.
180 */
Juan Castillo456deef2015-11-06 10:01:37 +0000181 if (from_bl2->bl32_ep_info)
182 bl32_image_ep_info = *from_bl2->bl32_ep_info;
Dan Handley9df48042015-03-19 18:58:55 +0000183 bl33_image_ep_info = *from_bl2->bl33_ep_info;
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100184
185# endif /* LOAD_IMAGE_V2 */
186#endif /* RESET_TO_BL31 */
Dan Handley9df48042015-03-19 18:58:55 +0000187}
188
Soby Mathew7d5a2e72018-01-10 15:59:31 +0000189void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
190 u_register_t arg2, u_register_t arg3)
Dan Handley9df48042015-03-19 18:58:55 +0000191{
Soby Mathew7d5a2e72018-01-10 15:59:31 +0000192 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
Dan Handley9df48042015-03-19 18:58:55 +0000193
194 /*
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000195 * Initialize Interconnect for this cluster during cold boot.
Dan Handley9df48042015-03-19 18:58:55 +0000196 * No need for locks as no other CPU is active.
197 */
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000198 plat_arm_interconnect_init();
Sandrine Bailleuxda797f62015-05-14 14:13:05 +0100199
Dan Handley9df48042015-03-19 18:58:55 +0000200 /*
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000201 * Enable Interconnect coherency for the primary CPU's cluster.
Sandrine Bailleuxda797f62015-05-14 14:13:05 +0100202 * Earlier bootloader stages might already do this (e.g. Trusted
203 * Firmware's BL1 does it) but we can't assume so. There is no harm in
204 * executing this code twice anyway.
Dan Handley9df48042015-03-19 18:58:55 +0000205 * Platform specific PSCI code will enable coherency for other
206 * clusters.
207 */
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000208 plat_arm_interconnect_enter_coherency();
Dan Handley9df48042015-03-19 18:58:55 +0000209}
210
211/*******************************************************************************
Juan Castillo7d199412015-12-14 09:35:25 +0000212 * Perform any BL31 platform setup common to ARM standard platforms
Dan Handley9df48042015-03-19 18:58:55 +0000213 ******************************************************************************/
214void arm_bl31_platform_setup(void)
215{
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000216 /* Initialize the GIC driver, cpu and distributor interfaces */
217 plat_arm_gic_driver_init();
Dan Handley9df48042015-03-19 18:58:55 +0000218 plat_arm_gic_init();
Dan Handley9df48042015-03-19 18:58:55 +0000219
220#if RESET_TO_BL31
221 /*
222 * Do initial security configuration to allow DRAM/device access
223 * (if earlier BL has not already done so).
224 */
225 plat_arm_security_setup();
226
Roberto Vargas550eb082018-01-05 16:00:05 +0000227#if defined(PLAT_ARM_MEM_PROT_ADDR)
228 arm_nor_psci_do_dyn_mem_protect();
229#endif /* PLAT_ARM_MEM_PROT_ADDR */
230
Dan Handley9df48042015-03-19 18:58:55 +0000231#endif /* RESET_TO_BL31 */
232
233 /* Enable and initialize the System level generic timer */
234 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF,
235 CNTCR_FCREQ(0) | CNTCR_EN);
236
237 /* Allow access to the System counter timer module */
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100238 arm_configure_sys_timer();
Dan Handley9df48042015-03-19 18:58:55 +0000239
240 /* Initialize power controller before setting up topology */
241 plat_arm_pwrc_setup();
Jeenu Viswambharana5b5b8d2018-02-06 12:21:39 +0000242
243#if RAS_EXTENSION
244 ras_init();
245#endif
Dan Handley9df48042015-03-19 18:58:55 +0000246}
247
Soby Mathew2fd66be2015-12-09 11:38:43 +0000248/*******************************************************************************
Juan Castillo7d199412015-12-14 09:35:25 +0000249 * Perform any BL31 platform runtime setup prior to BL31 exit common to ARM
Soby Mathew2fd66be2015-12-09 11:38:43 +0000250 * standard platforms
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100251 * Perform BL31 platform setup
Soby Mathew2fd66be2015-12-09 11:38:43 +0000252 ******************************************************************************/
253void arm_bl31_plat_runtime_setup(void)
254{
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100255#if MULTI_CONSOLE_API
256 console_switch_state(CONSOLE_FLAG_RUNTIME);
257#else
258 console_uninit();
259#endif
260
Soby Mathew2fd66be2015-12-09 11:38:43 +0000261 /* Initialize the runtime console */
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100262 arm_console_runtime_init();
Soby Mathew2fd66be2015-12-09 11:38:43 +0000263}
264
Dan Handley9df48042015-03-19 18:58:55 +0000265void bl31_platform_setup(void)
266{
267 arm_bl31_platform_setup();
268}
269
Soby Mathew2fd66be2015-12-09 11:38:43 +0000270void bl31_plat_runtime_setup(void)
271{
272 arm_bl31_plat_runtime_setup();
273}
274
Dan Handley9df48042015-03-19 18:58:55 +0000275/*******************************************************************************
Sandrine Bailleux4a1267a2016-05-18 16:11:47 +0100276 * Perform the very early platform specific architectural setup shared between
277 * ARM standard platforms. This only does basic initialization. Later
278 * architectural setup (bl31_arch_setup()) does not do anything platform
279 * specific.
Dan Handley9df48042015-03-19 18:58:55 +0000280 ******************************************************************************/
281void arm_bl31_plat_arch_setup(void)
282{
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +0100283 arm_setup_page_tables(BL31_BASE,
284 BL31_END - BL31_BASE,
285 BL_CODE_BASE,
Masahiro Yamada51bef612017-01-18 02:10:08 +0900286 BL_CODE_END,
Sandrine Bailleuxecdc4d32016-07-08 14:38:16 +0100287 BL_RO_DATA_BASE,
Masahiro Yamada51bef612017-01-18 02:10:08 +0900288 BL_RO_DATA_END
Dan Handley9df48042015-03-19 18:58:55 +0000289#if USE_COHERENT_MEM
Masahiro Yamada0fac5af2016-12-28 16:11:41 +0900290 , BL_COHERENT_RAM_BASE,
291 BL_COHERENT_RAM_END
Dan Handley9df48042015-03-19 18:58:55 +0000292#endif
293 );
Sandrine Bailleux4a1267a2016-05-18 16:11:47 +0100294 enable_mmu_el3(0);
Dan Handley9df48042015-03-19 18:58:55 +0000295}
296
297void bl31_plat_arch_setup(void)
298{
299 arm_bl31_plat_arch_setup();
300}