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Dan Handley9df48042015-03-19 18:58:55 +00001/*
Madhukar Pappireddyd7419442020-01-27 15:38:26 -06002 * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Dan Handley9df48042015-03-19 18:58:55 +00005 */
6
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00007#include <assert.h>
8
Dan Handley9df48042015-03-19 18:58:55 +00009#include <arch.h>
10#include <arch_helpers.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000011#include <common/bl_common.h>
12#include <common/debug.h>
13#include <drivers/console.h>
Ambroise Vincent9660dc12019-07-12 13:47:03 +010014#include <lib/debugfs.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000015#include <lib/extensions/ras.h>
16#include <lib/mmio.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000017#include <lib/xlat_tables/xlat_tables_compat.h>
Antonio Nino Diazbd7b7402019-01-25 14:30:04 +000018#include <plat/arm/common/plat_arm.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000019#include <plat/common/platform.h>
Antonio Nino Diaza320ecd2019-01-15 14:19:50 +000020#include <platform_def.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000021
Dan Handley9df48042015-03-19 18:58:55 +000022/*
23 * Placeholder variables for copying the arguments that have been passed to
Juan Castillo7d199412015-12-14 09:35:25 +000024 * BL31 from BL2.
Dan Handley9df48042015-03-19 18:58:55 +000025 */
26static entry_point_info_t bl32_image_ep_info;
27static entry_point_info_t bl33_image_ep_info;
28
Soby Mathew7823d9e2018-10-14 08:13:44 +010029#if !RESET_TO_BL31
Soby Mathewaf14b462018-06-01 16:53:38 +010030/*
31 * Check that BL31_BASE is above ARM_TB_FW_CONFIG_LIMIT. The reserved page
32 * is required for SOC_FW_CONFIG/TOS_FW_CONFIG passed from BL2.
33 */
34CASSERT(BL31_BASE >= ARM_TB_FW_CONFIG_LIMIT, assert_bl31_base_overflows);
Soby Mathew7823d9e2018-10-14 08:13:44 +010035#endif
Dan Handley9df48042015-03-19 18:58:55 +000036
37/* Weak definitions may be overridden in specific ARM standard platform */
Soby Mathew7d5a2e72018-01-10 15:59:31 +000038#pragma weak bl31_early_platform_setup2
Dan Handley9df48042015-03-19 18:58:55 +000039#pragma weak bl31_platform_setup
40#pragma weak bl31_plat_arch_setup
41#pragma weak bl31_plat_get_next_image_ep_info
Dan Handley9df48042015-03-19 18:58:55 +000042
Daniel Boulbyb1b058d2018-09-18 11:52:49 +010043#define MAP_BL31_TOTAL MAP_REGION_FLAT( \
Soby Mathew7823d9e2018-10-14 08:13:44 +010044 BL31_START, \
45 BL31_END - BL31_START, \
Daniel Boulby45a2c9e2018-07-06 16:54:44 +010046 MT_MEMORY | MT_RW | MT_SECURE)
Daniel Boulbyb1b058d2018-09-18 11:52:49 +010047#if RECLAIM_INIT_CODE
48IMPORT_SYM(unsigned long, __INIT_CODE_START__, BL_INIT_CODE_BASE);
49IMPORT_SYM(unsigned long, __INIT_CODE_END__, BL_INIT_CODE_END);
50
51#define MAP_BL_INIT_CODE MAP_REGION_FLAT( \
52 BL_INIT_CODE_BASE, \
53 BL_INIT_CODE_END \
54 - BL_INIT_CODE_BASE, \
55 MT_CODE | MT_SECURE)
56#endif
Dan Handley9df48042015-03-19 18:58:55 +000057
Madhukar Pappireddyd7419442020-01-27 15:38:26 -060058#if SEPARATE_NOBITS_REGION
59#define MAP_BL31_NOBITS MAP_REGION_FLAT( \
60 BL31_NOBITS_BASE, \
61 BL31_NOBITS_LIMIT \
62 - BL31_NOBITS_BASE, \
63 MT_MEMORY | MT_RW | MT_SECURE)
64
65#endif
Dan Handley9df48042015-03-19 18:58:55 +000066/*******************************************************************************
67 * Return a pointer to the 'entry_point_info' structure of the next image for the
Juan Castillo7d199412015-12-14 09:35:25 +000068 * security state specified. BL33 corresponds to the non-secure image type
69 * while BL32 corresponds to the secure image type. A NULL pointer is returned
Dan Handley9df48042015-03-19 18:58:55 +000070 * if the image does not exist.
71 ******************************************************************************/
Sandrine Bailleuxb3b6e222018-07-11 12:44:22 +020072struct entry_point_info *bl31_plat_get_next_image_ep_info(uint32_t type)
Dan Handley9df48042015-03-19 18:58:55 +000073{
74 entry_point_info_t *next_image_info;
75
76 assert(sec_state_is_valid(type));
77 next_image_info = (type == NON_SECURE)
78 ? &bl33_image_ep_info : &bl32_image_ep_info;
79 /*
80 * None of the images on the ARM development platforms can have 0x0
81 * as the entrypoint
82 */
83 if (next_image_info->pc)
84 return next_image_info;
85 else
86 return NULL;
87}
88
89/*******************************************************************************
Juan Castillo7d199412015-12-14 09:35:25 +000090 * Perform any BL31 early platform setup common to ARM standard platforms.
Dan Handley9df48042015-03-19 18:58:55 +000091 * Here is an opportunity to copy parameters passed by the calling EL (S-EL1
John Tsichritzisd653d332018-09-14 10:34:57 +010092 * in BL2 & EL3 in BL1) before they are lost (potentially). This needs to be
Dan Handley9df48042015-03-19 18:58:55 +000093 * done before the MMU is initialized so that the memory layout can be used
94 * while creating page tables. BL2 has flushed this information to memory, so
95 * we are guaranteed to pick up good data.
96 ******************************************************************************/
Daniel Boulbyf45a4bb2018-09-18 13:26:03 +010097void __init arm_bl31_early_platform_setup(void *from_bl2, uintptr_t soc_fw_config,
Soby Mathew7d5a2e72018-01-10 15:59:31 +000098 uintptr_t hw_config, void *plat_params_from_bl2)
Dan Handley9df48042015-03-19 18:58:55 +000099{
100 /* Initialize the console to provide early debug support */
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100101 arm_console_boot_init();
Dan Handley9df48042015-03-19 18:58:55 +0000102
103#if RESET_TO_BL31
Juan Castillo7d199412015-12-14 09:35:25 +0000104 /* There are no parameters from BL2 if BL31 is a reset vector */
Dan Handley9df48042015-03-19 18:58:55 +0000105 assert(from_bl2 == NULL);
106 assert(plat_params_from_bl2 == NULL);
107
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100108# ifdef BL32_BASE
Juan Castillo7d199412015-12-14 09:35:25 +0000109 /* Populate entry point information for BL32 */
Dan Handley9df48042015-03-19 18:58:55 +0000110 SET_PARAM_HEAD(&bl32_image_ep_info,
111 PARAM_EP,
112 VERSION_1,
113 0);
114 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
115 bl32_image_ep_info.pc = BL32_BASE;
116 bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry();
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100117# endif /* BL32_BASE */
Dan Handley9df48042015-03-19 18:58:55 +0000118
Juan Castillo7d199412015-12-14 09:35:25 +0000119 /* Populate entry point information for BL33 */
Dan Handley9df48042015-03-19 18:58:55 +0000120 SET_PARAM_HEAD(&bl33_image_ep_info,
121 PARAM_EP,
122 VERSION_1,
123 0);
124 /*
Juan Castillo7d199412015-12-14 09:35:25 +0000125 * Tell BL31 where the non-trusted software image
Dan Handley9df48042015-03-19 18:58:55 +0000126 * is located and the entry state information
127 */
128 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint();
Soby Mathew4876ae32016-05-09 17:20:10 +0100129
Dan Handley9df48042015-03-19 18:58:55 +0000130 bl33_image_ep_info.spsr = arm_get_spsr_for_bl33_entry();
131 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
132
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100133# if ARM_LINUX_KERNEL_AS_BL33
134 /*
135 * According to the file ``Documentation/arm64/booting.txt`` of the
136 * Linux kernel tree, Linux expects the physical address of the device
137 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and
138 * must be 0.
139 */
140 bl33_image_ep_info.args.arg0 = (u_register_t)ARM_PRELOADED_DTB_BASE;
141 bl33_image_ep_info.args.arg1 = 0U;
142 bl33_image_ep_info.args.arg2 = 0U;
143 bl33_image_ep_info.args.arg3 = 0U;
144# endif
145
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100146#else /* RESET_TO_BL31 */
147
Dan Handley9df48042015-03-19 18:58:55 +0000148 /*
149 * In debug builds, we pass a special value in 'plat_params_from_bl2'
Juan Castillo7d199412015-12-14 09:35:25 +0000150 * to verify platform parameters from BL2 to BL31.
Dan Handley9df48042015-03-19 18:58:55 +0000151 * In release builds, it's not used.
152 */
153 assert(((unsigned long long)plat_params_from_bl2) ==
154 ARM_BL31_PLAT_PARAM_VAL);
155
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100156 /*
157 * Check params passed from BL2 should not be NULL,
158 */
159 bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2;
160 assert(params_from_bl2 != NULL);
161 assert(params_from_bl2->h.type == PARAM_BL_PARAMS);
162 assert(params_from_bl2->h.version >= VERSION_2);
163
164 bl_params_node_t *bl_params = params_from_bl2->head;
165
166 /*
167 * Copy BL33 and BL32 (if present), entry point information.
168 * They are stored in Secure RAM, in BL2's address space.
169 */
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +0100170 while (bl_params != NULL) {
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100171 if (bl_params->image_id == BL32_IMAGE_ID)
172 bl32_image_ep_info = *bl_params->ep_info;
173
174 if (bl_params->image_id == BL33_IMAGE_ID)
175 bl33_image_ep_info = *bl_params->ep_info;
176
177 bl_params = bl_params->next_params_info;
178 }
179
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +0100180 if (bl33_image_ep_info.pc == 0U)
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100181 panic();
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100182#endif /* RESET_TO_BL31 */
Dan Handley9df48042015-03-19 18:58:55 +0000183}
184
Soby Mathew7d5a2e72018-01-10 15:59:31 +0000185void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
186 u_register_t arg2, u_register_t arg3)
Dan Handley9df48042015-03-19 18:58:55 +0000187{
Soby Mathew7d5a2e72018-01-10 15:59:31 +0000188 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
Dan Handley9df48042015-03-19 18:58:55 +0000189
190 /*
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000191 * Initialize Interconnect for this cluster during cold boot.
Dan Handley9df48042015-03-19 18:58:55 +0000192 * No need for locks as no other CPU is active.
193 */
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000194 plat_arm_interconnect_init();
Sandrine Bailleuxda797f62015-05-14 14:13:05 +0100195
Dan Handley9df48042015-03-19 18:58:55 +0000196 /*
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000197 * Enable Interconnect coherency for the primary CPU's cluster.
Sandrine Bailleuxda797f62015-05-14 14:13:05 +0100198 * Earlier bootloader stages might already do this (e.g. Trusted
199 * Firmware's BL1 does it) but we can't assume so. There is no harm in
200 * executing this code twice anyway.
Dan Handley9df48042015-03-19 18:58:55 +0000201 * Platform specific PSCI code will enable coherency for other
202 * clusters.
203 */
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000204 plat_arm_interconnect_enter_coherency();
Dan Handley9df48042015-03-19 18:58:55 +0000205}
206
207/*******************************************************************************
Juan Castillo7d199412015-12-14 09:35:25 +0000208 * Perform any BL31 platform setup common to ARM standard platforms
Dan Handley9df48042015-03-19 18:58:55 +0000209 ******************************************************************************/
210void arm_bl31_platform_setup(void)
211{
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000212 /* Initialize the GIC driver, cpu and distributor interfaces */
213 plat_arm_gic_driver_init();
Dan Handley9df48042015-03-19 18:58:55 +0000214 plat_arm_gic_init();
Dan Handley9df48042015-03-19 18:58:55 +0000215
216#if RESET_TO_BL31
217 /*
218 * Do initial security configuration to allow DRAM/device access
219 * (if earlier BL has not already done so).
220 */
221 plat_arm_security_setup();
222
Roberto Vargas550eb082018-01-05 16:00:05 +0000223#if defined(PLAT_ARM_MEM_PROT_ADDR)
224 arm_nor_psci_do_dyn_mem_protect();
225#endif /* PLAT_ARM_MEM_PROT_ADDR */
226
Dan Handley9df48042015-03-19 18:58:55 +0000227#endif /* RESET_TO_BL31 */
228
229 /* Enable and initialize the System level generic timer */
230 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF,
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +0100231 CNTCR_FCREQ(0U) | CNTCR_EN);
Dan Handley9df48042015-03-19 18:58:55 +0000232
233 /* Allow access to the System counter timer module */
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100234 arm_configure_sys_timer();
Dan Handley9df48042015-03-19 18:58:55 +0000235
236 /* Initialize power controller before setting up topology */
237 plat_arm_pwrc_setup();
Jeenu Viswambharana5b5b8d2018-02-06 12:21:39 +0000238
239#if RAS_EXTENSION
240 ras_init();
241#endif
Ambroise Vincent9660dc12019-07-12 13:47:03 +0100242
243#if USE_DEBUGFS
244 debugfs_init();
245#endif /* USE_DEBUGFS */
Dan Handley9df48042015-03-19 18:58:55 +0000246}
247
Soby Mathew2fd66be2015-12-09 11:38:43 +0000248/*******************************************************************************
Juan Castillo7d199412015-12-14 09:35:25 +0000249 * Perform any BL31 platform runtime setup prior to BL31 exit common to ARM
Soby Mathew2fd66be2015-12-09 11:38:43 +0000250 * standard platforms
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100251 * Perform BL31 platform setup
Soby Mathew2fd66be2015-12-09 11:38:43 +0000252 ******************************************************************************/
253void arm_bl31_plat_runtime_setup(void)
254{
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100255 console_switch_state(CONSOLE_FLAG_RUNTIME);
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100256
Soby Mathew2fd66be2015-12-09 11:38:43 +0000257 /* Initialize the runtime console */
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100258 arm_console_runtime_init();
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100259#if RECLAIM_INIT_CODE
260 arm_free_init_memory();
261#endif
Soby Mathew2fd66be2015-12-09 11:38:43 +0000262}
263
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100264#if RECLAIM_INIT_CODE
265/*
266 * Zero out and make RW memory used to store image boot time code so it can
267 * be reclaimed during runtime
268 */
269void arm_free_init_memory(void)
270{
271 int ret = xlat_change_mem_attributes(BL_INIT_CODE_BASE,
272 BL_INIT_CODE_END - BL_INIT_CODE_BASE,
273 MT_RW_DATA);
274
275 if (ret != 0) {
276 ERROR("Could not reclaim initialization code");
277 panic();
278 }
279}
280#endif
281
Daniel Boulbyf45a4bb2018-09-18 13:26:03 +0100282void __init bl31_platform_setup(void)
Dan Handley9df48042015-03-19 18:58:55 +0000283{
284 arm_bl31_platform_setup();
285}
286
Soby Mathew2fd66be2015-12-09 11:38:43 +0000287void bl31_plat_runtime_setup(void)
288{
289 arm_bl31_plat_runtime_setup();
290}
291
Dan Handley9df48042015-03-19 18:58:55 +0000292/*******************************************************************************
Sandrine Bailleux4a1267a2016-05-18 16:11:47 +0100293 * Perform the very early platform specific architectural setup shared between
294 * ARM standard platforms. This only does basic initialization. Later
295 * architectural setup (bl31_arch_setup()) does not do anything platform
296 * specific.
Dan Handley9df48042015-03-19 18:58:55 +0000297 ******************************************************************************/
Daniel Boulbyf45a4bb2018-09-18 13:26:03 +0100298void __init arm_bl31_plat_arch_setup(void)
Dan Handley9df48042015-03-19 18:58:55 +0000299{
Daniel Boulby45a2c9e2018-07-06 16:54:44 +0100300 const mmap_region_t bl_regions[] = {
301 MAP_BL31_TOTAL,
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100302#if RECLAIM_INIT_CODE
303 MAP_BL_INIT_CODE,
304#endif
Madhukar Pappireddyd7419442020-01-27 15:38:26 -0600305#if SEPARATE_NOBITS_REGION
306 MAP_BL31_NOBITS,
307#endif
Daniel Boulby4e97abd2018-07-16 14:09:15 +0100308 ARM_MAP_BL_RO,
Roberto Vargase3adc372018-05-23 09:27:06 +0100309#if USE_ROMLIB
310 ARM_MAP_ROMLIB_CODE,
311 ARM_MAP_ROMLIB_DATA,
312#endif
Dan Handley9df48042015-03-19 18:58:55 +0000313#if USE_COHERENT_MEM
Daniel Boulby45a2c9e2018-07-06 16:54:44 +0100314 ARM_MAP_BL_COHERENT_RAM,
Dan Handley9df48042015-03-19 18:58:55 +0000315#endif
Daniel Boulby45a2c9e2018-07-06 16:54:44 +0100316 {0}
317 };
318
Roberto Vargas344ff022018-10-19 16:44:18 +0100319 setup_page_tables(bl_regions, plat_arm_get_mmap());
Daniel Boulby45a2c9e2018-07-06 16:54:44 +0100320
Sandrine Bailleux4a1267a2016-05-18 16:11:47 +0100321 enable_mmu_el3(0);
Roberto Vargase3adc372018-05-23 09:27:06 +0100322
323 arm_setup_romlib();
Dan Handley9df48042015-03-19 18:58:55 +0000324}
325
Daniel Boulbyf45a4bb2018-09-18 13:26:03 +0100326void __init bl31_plat_arch_setup(void)
Dan Handley9df48042015-03-19 18:58:55 +0000327{
328 arm_bl31_plat_arch_setup();
329}