Manoj Kumar | 9952970 | 2021-09-15 12:42:49 +0530 | [diff] [blame] | 1 | /* |
Andre Przywara | 60b126a | 2022-03-24 11:55:57 +0000 | [diff] [blame] | 2 | * Copyright (c) 2021-2022, Arm Limited. All rights reserved. |
Manoj Kumar | 9952970 | 2021-09-15 12:42:49 +0530 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | /dts-v1/; |
| 8 | #include "morello.dtsi" |
| 9 | |
| 10 | / { |
Andre Przywara | 60b126a | 2022-03-24 11:55:57 +0000 | [diff] [blame] | 11 | model = "Arm Morello System Development Platform"; |
Manoj Kumar | 9952970 | 2021-09-15 12:42:49 +0530 | [diff] [blame] | 12 | |
| 13 | chosen { |
Andre Przywara | 48eee8f | 2022-03-24 16:14:28 +0000 | [diff] [blame] | 14 | stdout-path = "serial0:115200n8"; |
Manoj Kumar | 9952970 | 2021-09-15 12:42:49 +0530 | [diff] [blame] | 15 | }; |
| 16 | |
| 17 | reserved-memory { |
| 18 | #address-cells = <2>; |
| 19 | #size-cells = <2>; |
| 20 | ranges; |
| 21 | |
| 22 | secure-firmware@ff000000 { |
| 23 | reg = <0 0xff000000 0 0x01000000>; |
| 24 | no-map; |
| 25 | }; |
| 26 | }; |
| 27 | |
| 28 | cpus { |
| 29 | #address-cells = <2>; |
| 30 | #size-cells = <0>; |
| 31 | cpu0@0 { |
| 32 | compatible = "arm,armv8"; |
| 33 | reg = <0x0 0x0>; |
| 34 | device_type = "cpu"; |
| 35 | enable-method = "psci"; |
Anurag Koul | b7682b4 | 2021-12-03 10:16:47 +0000 | [diff] [blame] | 36 | clocks = <&scmi_dvfs 0>; |
Manoj Kumar | 9952970 | 2021-09-15 12:42:49 +0530 | [diff] [blame] | 37 | }; |
| 38 | cpu1@100 { |
| 39 | compatible = "arm,armv8"; |
| 40 | reg = <0x0 0x100>; |
| 41 | device_type = "cpu"; |
| 42 | enable-method = "psci"; |
Anurag Koul | b7682b4 | 2021-12-03 10:16:47 +0000 | [diff] [blame] | 43 | clocks = <&scmi_dvfs 0>; |
Manoj Kumar | 9952970 | 2021-09-15 12:42:49 +0530 | [diff] [blame] | 44 | }; |
| 45 | cpu2@10000 { |
| 46 | compatible = "arm,armv8"; |
| 47 | reg = <0x0 0x10000>; |
| 48 | device_type = "cpu"; |
| 49 | enable-method = "psci"; |
Anurag Koul | b7682b4 | 2021-12-03 10:16:47 +0000 | [diff] [blame] | 50 | clocks = <&scmi_dvfs 1>; |
Manoj Kumar | 9952970 | 2021-09-15 12:42:49 +0530 | [diff] [blame] | 51 | }; |
| 52 | cpu3@10100 { |
| 53 | compatible = "arm,armv8"; |
| 54 | reg = <0x0 0x10100>; |
| 55 | device_type = "cpu"; |
| 56 | enable-method = "psci"; |
Anurag Koul | b7682b4 | 2021-12-03 10:16:47 +0000 | [diff] [blame] | 57 | clocks = <&scmi_dvfs 1>; |
Manoj Kumar | 9952970 | 2021-09-15 12:42:49 +0530 | [diff] [blame] | 58 | }; |
| 59 | }; |
| 60 | |
| 61 | /* The first bank of memory, memory map is actually provided by UEFI. */ |
| 62 | memory@80000000 { |
| 63 | #address-cells = <2>; |
| 64 | #size-cells = <2>; |
| 65 | device_type = "memory"; |
| 66 | /* [0x80000000-0xffffffff] */ |
| 67 | reg = <0x00000000 0x80000000 0x0 0x7F000000>; |
| 68 | }; |
| 69 | |
| 70 | memory@8080000000 { |
| 71 | #address-cells = <2>; |
| 72 | #size-cells = <2>; |
| 73 | device_type = "memory"; |
| 74 | /* [0x8080000000-0x83f7ffffff] */ |
| 75 | reg = <0x00000080 0x80000000 0x3 0x78000000>; |
| 76 | }; |
| 77 | |
| 78 | smmu_pcie: iommu@4f400000 { |
| 79 | compatible = "arm,smmu-v3"; |
| 80 | reg = <0 0x4f400000 0 0x40000>; |
| 81 | interrupts = <GIC_SPI 235 IRQ_TYPE_EDGE_RISING>, |
Andre Przywara | 89d4538 | 2022-03-24 11:56:30 +0000 | [diff] [blame] | 82 | <GIC_SPI 237 IRQ_TYPE_EDGE_RISING>, |
Manoj Kumar | 9952970 | 2021-09-15 12:42:49 +0530 | [diff] [blame] | 83 | <GIC_SPI 40 IRQ_TYPE_EDGE_RISING>, |
Andre Przywara | 89d4538 | 2022-03-24 11:56:30 +0000 | [diff] [blame] | 84 | <GIC_SPI 236 IRQ_TYPE_EDGE_RISING>; |
| 85 | interrupt-names = "eventq", "gerror", "priq", "cmdq-sync"; |
Manoj Kumar | 9952970 | 2021-09-15 12:42:49 +0530 | [diff] [blame] | 86 | msi-parent = <&its2 0>; |
| 87 | #iommu-cells = <1>; |
| 88 | dma-coherent; |
| 89 | }; |
| 90 | |
| 91 | pcie_ctlr: pcie@28c0000000 { |
| 92 | compatible = "pci-host-ecam-generic"; |
| 93 | device_type = "pci"; |
| 94 | reg = <0x28 0xC0000000 0 0x10000000>; |
| 95 | bus-range = <0 255>; |
| 96 | linux,pci-domain = <0>; |
| 97 | #address-cells = <3>; |
| 98 | #size-cells = <2>; |
| 99 | dma-coherent; |
| 100 | ranges = <0x01000000 0x00 0x00000000 0x00 0x6F000000 0x00 0x00800000>, |
| 101 | <0x02000000 0x00 0x60000000 0x00 0x60000000 0x00 0x0F000000>, |
| 102 | <0x42000000 0x09 0x00000000 0x09 0x00000000 0x1F 0xC0000000>; |
| 103 | #interrupt-cells = <1>; |
| 104 | interrupt-map-mask = <0 0 0 7>; |
| 105 | interrupt-map = <0 0 0 1 &gic 0 0 0 169 IRQ_TYPE_LEVEL_HIGH>, |
| 106 | <0 0 0 2 &gic 0 0 0 170 IRQ_TYPE_LEVEL_HIGH>, |
| 107 | <0 0 0 3 &gic 0 0 0 171 IRQ_TYPE_LEVEL_HIGH>, |
| 108 | <0 0 0 4 &gic 0 0 0 172 IRQ_TYPE_LEVEL_HIGH>; |
| 109 | msi-map = <0 &its_pcie 0 0x10000>; |
| 110 | iommu-map = <0 &smmu_pcie 0 0x10000>; |
| 111 | status = "okay"; |
| 112 | }; |
| 113 | |
| 114 | smmu_ccix: iommu@4f000000 { |
| 115 | compatible = "arm,smmu-v3"; |
| 116 | reg = <0 0x4f000000 0 0x40000>; |
| 117 | interrupts = <GIC_SPI 228 IRQ_TYPE_EDGE_RISING>, |
Andre Przywara | 89d4538 | 2022-03-24 11:56:30 +0000 | [diff] [blame] | 118 | <GIC_SPI 230 IRQ_TYPE_EDGE_RISING>, |
Manoj Kumar | 9952970 | 2021-09-15 12:42:49 +0530 | [diff] [blame] | 119 | <GIC_SPI 41 IRQ_TYPE_EDGE_RISING>, |
Andre Przywara | 89d4538 | 2022-03-24 11:56:30 +0000 | [diff] [blame] | 120 | <GIC_SPI 229 IRQ_TYPE_EDGE_RISING>; |
| 121 | interrupt-names = "eventq", "gerror", "priq", "cmdq-sync"; |
Manoj Kumar | 9952970 | 2021-09-15 12:42:49 +0530 | [diff] [blame] | 122 | msi-parent = <&its1 0>; |
| 123 | #iommu-cells = <1>; |
| 124 | dma-coherent; |
| 125 | }; |
| 126 | |
| 127 | ccix_pcie_ctlr: pcie@4fc0000000 { |
| 128 | compatible = "pci-host-ecam-generic"; |
| 129 | device_type = "pci"; |
| 130 | reg = <0x4F 0xC0000000 0 0x10000000>; |
| 131 | bus-range = <0 255>; |
| 132 | linux,pci-domain = <1>; |
| 133 | #address-cells = <3>; |
| 134 | #size-cells = <2>; |
| 135 | dma-coherent; |
| 136 | ranges = <0x01000000 0x00 0x00000000 0x00 0x7F000000 0x00 0x00800000>, |
| 137 | <0x02000000 0x00 0x70000000 0x00 0x70000000 0x00 0x0F000000>, |
| 138 | <0x42000000 0x30 0x00000000 0x30 0x00000000 0x1F 0xC0000000>; |
| 139 | #interrupt-cells = <1>; |
| 140 | interrupt-map-mask = <0 0 0 7>; |
| 141 | interrupt-map = <0 0 0 1 &gic 0 0 0 201 IRQ_TYPE_LEVEL_HIGH>, |
| 142 | <0 0 0 2 &gic 0 0 0 202 IRQ_TYPE_LEVEL_HIGH>, |
| 143 | <0 0 0 3 &gic 0 0 0 203 IRQ_TYPE_LEVEL_HIGH>, |
| 144 | <0 0 0 4 &gic 0 0 0 204 IRQ_TYPE_LEVEL_HIGH>; |
| 145 | msi-map = <0 &its_ccix 0 0x10000>; |
| 146 | iommu-map = <0 &smmu_ccix 0 0x10000>; |
| 147 | status = "okay"; |
| 148 | }; |
| 149 | |
| 150 | smmu_dp: iommu@2ce00000 { |
| 151 | compatible = "arm,smmu-v3"; |
| 152 | reg = <0 0x2ce00000 0 0x40000>; |
| 153 | interrupts = <GIC_SPI 76 IRQ_TYPE_EDGE_RISING>, |
Andre Przywara | be8d7fb | 2022-03-24 11:57:17 +0000 | [diff] [blame^] | 154 | <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>, |
| 155 | <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>; |
| 156 | interrupt-names = "eventq", "gerror", "cmdq-sync"; |
Manoj Kumar | 9952970 | 2021-09-15 12:42:49 +0530 | [diff] [blame] | 157 | #iommu-cells = <1>; |
| 158 | }; |
| 159 | |
| 160 | dp0: display@2cc00000 { |
| 161 | #address-cells = <1>; |
| 162 | #size-cells = <0>; |
| 163 | compatible = "arm,mali-d32"; |
| 164 | reg = <0 0x2cc00000 0 0x20000>; |
| 165 | interrupts = <0 69 4>; |
| 166 | interrupt-names = "DPU"; |
| 167 | clocks = <&dpu_aclk>; |
| 168 | clock-names = "aclk"; |
| 169 | iommus = <&smmu_dp 0>, <&smmu_dp 1>, <&smmu_dp 2>, <&smmu_dp 3>, |
| 170 | <&smmu_dp 8>; |
| 171 | |
| 172 | pl0: pipeline@0 { |
| 173 | reg = <0>; |
Anurag Koul | b7682b4 | 2021-12-03 10:16:47 +0000 | [diff] [blame] | 174 | clocks = <&scmi_clk 1>; |
Manoj Kumar | 9952970 | 2021-09-15 12:42:49 +0530 | [diff] [blame] | 175 | clock-names = "pxclk"; |
| 176 | pl_id = <0>; |
| 177 | ports { |
| 178 | #address-cells = <1>; |
| 179 | #size-cells = <0>; |
| 180 | port@0 { |
| 181 | reg = <0>; |
| 182 | dp_pl0_out0: endpoint { |
| 183 | remote-endpoint = <&tda998x_0_input>; |
| 184 | }; |
| 185 | }; |
| 186 | }; |
| 187 | }; |
| 188 | }; |
| 189 | |
| 190 | i2c@1c0f0000 { |
| 191 | compatible = "cdns,i2c-r1p14"; |
| 192 | reg = <0x0 0x1c0f0000 0x0 0x1000>; |
| 193 | #address-cells = <1>; |
| 194 | #size-cells = <0>; |
| 195 | clock-frequency = <100000>; |
| 196 | i2c-sda-hold-time-ns = <500>; |
| 197 | interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; |
| 198 | clocks = <&dpu_aclk>; |
| 199 | |
| 200 | hdmi-transmitter@70 { |
| 201 | compatible = "nxp,tda998x"; |
| 202 | reg = <0x70>; |
| 203 | video-ports = <0x234501>; |
| 204 | port { |
| 205 | tda998x_0_input: endpoint { |
| 206 | remote-endpoint = <&dp_pl0_out0>; |
| 207 | }; |
| 208 | }; |
| 209 | }; |
| 210 | }; |
| 211 | |
| 212 | dpu_aclk: dpu_aclk { |
| 213 | /* 77.1 MHz derived from 24 MHz reference clock */ |
| 214 | compatible = "fixed-clock"; |
| 215 | #clock-cells = <0>; |
| 216 | clock-frequency = <350000000>; |
| 217 | clock-output-names = "aclk"; |
| 218 | }; |
| 219 | |
Anurag Koul | b7682b4 | 2021-12-03 10:16:47 +0000 | [diff] [blame] | 220 | firmware { |
| 221 | scmi { |
| 222 | compatible = "arm,scmi"; |
| 223 | mbox-names = "tx", "rx"; |
| 224 | mboxes = <&mailbox 1 0 &mailbox 1 1>; |
| 225 | shmem = <&cpu_scp_hpri0 &cpu_scp_hpri1>; |
| 226 | #address-cells = <1>; |
| 227 | #size-cells = <0>; |
| 228 | scmi_dvfs: protocol@13 { |
| 229 | reg = <0x13>; |
| 230 | #clock-cells = <1>; |
| 231 | }; |
| 232 | scmi_clk: protocol@14 { |
| 233 | reg = <0x14>; |
| 234 | #clock-cells = <1>; |
| 235 | }; |
| 236 | }; |
Manoj Kumar | 9952970 | 2021-09-15 12:42:49 +0530 | [diff] [blame] | 237 | }; |
| 238 | }; |
| 239 | |
| 240 | &gic { |
| 241 | reg = <0x0 0x30000000 0 0x10000>, /* GICD */ |
| 242 | <0x0 0x300c0000 0 0x80000>; /* GICR */ |
| 243 | interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; |
| 244 | |
| 245 | its1: its@30040000 { |
| 246 | compatible = "arm,gic-v3-its"; |
| 247 | msi-controller; |
| 248 | #msi-cells = <1>; |
| 249 | reg = <0x0 0x30040000 0x0 0x20000>; |
| 250 | }; |
| 251 | |
| 252 | its2: its@30060000 { |
| 253 | compatible = "arm,gic-v3-its"; |
| 254 | msi-controller; |
| 255 | #msi-cells = <1>; |
| 256 | reg = <0x0 0x30060000 0x0 0x20000>; |
| 257 | }; |
| 258 | |
| 259 | its_ccix: its@30080000 { |
| 260 | compatible = "arm,gic-v3-its"; |
| 261 | msi-controller; |
| 262 | #msi-cells = <1>; |
| 263 | reg = <0x0 0x30080000 0x0 0x20000>; |
| 264 | }; |
| 265 | |
| 266 | its_pcie: its@300a0000 { |
| 267 | compatible = "arm,gic-v3-its"; |
| 268 | msi-controller; |
| 269 | #msi-cells = <1>; |
| 270 | reg = <0x0 0x300a0000 0x0 0x20000>; |
| 271 | }; |
| 272 | }; |