fix(morello): dts: fix SMMU IRQ ordering
The official SMMUv3 DT bindings require a certain order of the
interrupts, Linux' "make dtbs_check" reports:
============
.../morello-soc.dt.yaml: iommu@4f400000: interrupt-names: 'oneOf' conditional failed, one must be fixed:
['eventq', 'priq', 'cmdq-sync', 'gerror'] is too long
'combined' was expected
'gerror' was expected
'priq' was expected
'cmdq-sync' was expected
From schema: Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
============
Swap the order of the interrupt-names and their corresponding interrupts
values to improve bindings compliance.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: I2110b8509593a4f1aadff11bd518ec4a0f3f5d3c
1 file changed