rutigl@gmail.com | defbeed | 2023-03-19 09:19:05 +0200 | [diff] [blame] | 1 | # |
Madhukar Pappireddy | cc30710 | 2023-09-09 23:02:34 -0500 | [diff] [blame] | 2 | # Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved. |
rutigl@gmail.com | defbeed | 2023-03-19 09:19:05 +0200 | [diff] [blame] | 3 | # |
| 4 | # Copyright (c) 2017-2023 Nuvoton Ltd. |
| 5 | # |
| 6 | # SPDX-License-Identifier: BSD-3-Clause |
| 7 | # |
| 8 | |
| 9 | # This is a debug flag for bring-up. It allows reducing CPU numbers |
| 10 | # SECONDARY_BRINGUP := 1 |
| 11 | RESET_TO_BL31 := 1 |
Margarita Glushkin | f52f6ae | 2023-08-15 16:44:07 +0300 | [diff] [blame] | 12 | SPMD_SPM_AT_SEL2 := 0 |
rutigl@gmail.com | defbeed | 2023-03-19 09:19:05 +0200 | [diff] [blame] | 13 | #temporary until the RAM size is reduced |
| 14 | USE_COHERENT_MEM := 1 |
| 15 | |
| 16 | |
| 17 | $(eval $(call add_define,RESET_TO_BL31)) |
| 18 | |
| 19 | ifeq (${ARCH}, aarch64) |
| 20 | # On ARM standard platorms, the TSP can execute from Trusted SRAM, |
| 21 | # Trusted DRAM (if available) or the TZC secured area of DRAM. |
| 22 | # TZC secured DRAM is the default. |
| 23 | |
rutigl@gmail.com | defbeed | 2023-03-19 09:19:05 +0200 | [diff] [blame] | 24 | # Process ARM_BL31_IN_DRAM flag |
| 25 | ARM_BL31_IN_DRAM := 0 |
| 26 | $(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) |
| 27 | $(eval $(call add_define,ARM_BL31_IN_DRAM)) |
rutigl@gmail.com | defbeed | 2023-03-19 09:19:05 +0200 | [diff] [blame] | 28 | endif |
| 29 | |
rutigl@gmail.com | defbeed | 2023-03-19 09:19:05 +0200 | [diff] [blame] | 30 | # For the original power-state parameter format, the State-ID can be encoded |
| 31 | # according to the recommended encoding or zero. This flag determines which |
| 32 | # State-ID encoding to be parsed. |
| 33 | ARM_RECOM_STATE_ID_ENC := 0 |
| 34 | |
| 35 | # If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC |
| 36 | # need to be set. Else throw a build error. |
| 37 | ifeq (${PSCI_EXTENDED_STATE_ID}, 1) |
| 38 | ifeq (${ARM_RECOM_STATE_ID_ENC}, 0) |
| 39 | $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \ |
| 40 | PSCI_EXTENDED_STATE_ID is set for ARM platforms) |
| 41 | endif |
| 42 | endif |
| 43 | |
| 44 | # Process ARM_RECOM_STATE_ID_ENC flag |
| 45 | $(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC)) |
| 46 | $(eval $(call add_define,ARM_RECOM_STATE_ID_ENC)) |
| 47 | |
| 48 | # Process ARM_DISABLE_TRUSTED_WDOG flag |
| 49 | # By default, Trusted Watchdog is always enabled unless SPIN_ON_BL1_EXIT is set |
| 50 | ARM_DISABLE_TRUSTED_WDOG := 0 |
| 51 | ifeq (${SPIN_ON_BL1_EXIT}, 1) |
| 52 | ARM_DISABLE_TRUSTED_WDOG := 1 |
| 53 | endif |
| 54 | $(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG)) |
| 55 | $(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG)) |
| 56 | |
| 57 | # Process ARM_CONFIG_CNTACR |
| 58 | ARM_CONFIG_CNTACR := 1 |
| 59 | $(eval $(call assert_boolean,ARM_CONFIG_CNTACR)) |
| 60 | $(eval $(call add_define,ARM_CONFIG_CNTACR)) |
| 61 | |
| 62 | # Process ARM_BL31_IN_DRAM flag |
| 63 | ARM_BL31_IN_DRAM := 0 |
| 64 | $(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) |
| 65 | $(eval $(call add_define,ARM_BL31_IN_DRAM)) |
| 66 | |
| 67 | # Process ARM_PLAT_MT flag |
| 68 | ARM_PLAT_MT := 0 |
| 69 | $(eval $(call assert_boolean,ARM_PLAT_MT)) |
| 70 | $(eval $(call add_define,ARM_PLAT_MT)) |
| 71 | |
| 72 | # Use translation tables library v2 by default |
| 73 | ARM_XLAT_TABLES_LIB_V1 := 0 |
| 74 | $(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) |
| 75 | $(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) |
| 76 | |
| 77 | # Don't have the Linux kernel as a BL33 image by default |
| 78 | ARM_LINUX_KERNEL_AS_BL33 := 0 |
| 79 | $(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33)) |
| 80 | $(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33)) |
| 81 | |
| 82 | ifeq (${ARM_LINUX_KERNEL_AS_BL33},1) |
| 83 | ifeq (${ARCH},aarch64) |
| 84 | ifneq (${RESET_TO_BL31},1) |
| 85 | $(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_BL31=1.") |
| 86 | endif |
| 87 | else |
| 88 | ifneq (${RESET_TO_SP_MIN},1) |
| 89 | $(error "ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.") |
| 90 | endif |
| 91 | endif |
| 92 | |
| 93 | ifndef PRELOADED_BL33_BASE |
| 94 | $(error "PRELOADED_BL33_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.") |
| 95 | endif |
| 96 | |
| 97 | ifndef ARM_PRELOADED_DTB_BASE |
| 98 | $(error "ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.") |
| 99 | endif |
| 100 | |
| 101 | $(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) |
| 102 | endif |
| 103 | |
| 104 | # Use an implementation of SHA-256 with a smaller memory footprint |
| 105 | # but reduced speed. |
| 106 | $(eval $(call add_define,MBEDTLS_SHA256_SMALLER)) |
| 107 | |
| 108 | # Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images |
| 109 | # in the FIP if the platform requires. |
| 110 | ifneq ($(BL32_EXTRA1),) |
| 111 | $(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) |
| 112 | endif |
| 113 | ifneq ($(BL32_EXTRA2),) |
| 114 | $(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) |
| 115 | endif |
| 116 | |
| 117 | # Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms |
| 118 | ENABLE_PSCI_STAT := 1 |
| 119 | ENABLE_PMF := 1 |
| 120 | |
| 121 | # On ARM platforms, separate the code and read-only data sections to allow |
| 122 | # mapping the former as executable and the latter as execute-never. |
| 123 | SEPARATE_CODE_AND_RODATA := 1 |
| 124 | |
| 125 | # On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS |
| 126 | # and NOBITS sections of BL31 image are adjacent to each other and loaded |
| 127 | # into Trusted SRAM. |
| 128 | SEPARATE_NOBITS_REGION := 0 |
| 129 | |
| 130 | # In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load |
| 131 | # BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate |
| 132 | # the build to require that ARM_BL31_IN_DRAM is enabled as well. |
| 133 | ifeq ($(SEPARATE_NOBITS_REGION),1) |
| 134 | ifneq ($(ARM_BL31_IN_DRAM),1) |
| 135 | $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled) |
| 136 | endif |
| 137 | |
| 138 | ifneq ($(RECLAIM_INIT_CODE),0) |
| 139 | $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported) |
| 140 | endif |
| 141 | endif |
| 142 | |
| 143 | # Disable ARM Cryptocell by default |
| 144 | ARM_CRYPTOCELL_INTEG := 0 |
| 145 | $(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG)) |
| 146 | $(eval $(call add_define,ARM_CRYPTOCELL_INTEG)) |
| 147 | |
| 148 | # Enable PIE support for RESET_TO_BL31 case |
| 149 | ifeq (${RESET_TO_BL31},1) |
| 150 | ENABLE_PIE := 1 |
| 151 | endif |
| 152 | |
| 153 | # CryptoCell integration relies on coherent buffers for passing data from |
| 154 | # the AP CPU to the CryptoCell |
| 155 | |
| 156 | ifeq (${ARM_CRYPTOCELL_INTEG},1) |
| 157 | ifeq (${USE_COHERENT_MEM},0) |
| 158 | $(error "ARM_CRYPTOCELL_INTEG needs USE_COHERENT_MEM to be set.") |
| 159 | endif |
| 160 | endif |
| 161 | |
| 162 | PLAT_INCLUDES := -Iinclude/plat/nuvoton/npcm845x \ |
| 163 | -Iinclude/plat/nuvoton/common \ |
| 164 | -Iinclude/drivers/nuvoton/npcm845x \ |
| 165 | |
| 166 | ifeq (${ARCH}, aarch64) |
| 167 | PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64 |
| 168 | endif |
| 169 | |
| 170 | # Include GICv3 driver files |
| 171 | include drivers/arm/gic/v2/gicv2.mk |
| 172 | |
| 173 | NPCM850_GIC_SOURCES := ${GICV2_SOURCES} |
| 174 | |
| 175 | BL31_SOURCES +=lib/cpus/aarch64/cortex_a35.S \ |
| 176 | plat/common/plat_psci_common.c \ |
| 177 | drivers/ti/uart/aarch64/16550_console.S \ |
| 178 | plat/nuvoton/npcm845x/npcm845x_psci.c \ |
| 179 | plat/nuvoton/npcm845x/npcm845x_serial_port.c \ |
| 180 | plat/nuvoton/common/nuvoton_topology.c \ |
| 181 | plat/nuvoton/npcm845x/npcm845x_bl31_setup.c |
| 182 | |
| 183 | PLAT_BL_COMMON_SOURCES := drivers/delay_timer/delay_timer.c \ |
| 184 | drivers/delay_timer/generic_delay_timer.c \ |
| 185 | plat/common/plat_gicv2.c \ |
| 186 | plat/arm/common/arm_gicv2.c \ |
| 187 | plat/nuvoton/common/plat_nuvoton_gic.c \ |
| 188 | ${NPCM850_GIC_SOURCES} \ |
| 189 | plat/nuvoton/npcm845x/npcm845x_common.c \ |
| 190 | plat/nuvoton/common/nuvoton_helpers.S \ |
| 191 | lib/semihosting/semihosting.c \ |
| 192 | lib/semihosting/${ARCH}/semihosting_call.S \ |
| 193 | plat/arm/common/arm_common.c \ |
| 194 | plat/arm/common/arm_console.c |
| 195 | |
| 196 | ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) |
| 197 | PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \ |
| 198 | lib/xlat_tables/${ARCH}/xlat_tables.c |
| 199 | else |
| 200 | include lib/xlat_tables_v2/xlat_tables.mk |
| 201 | |
| 202 | PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} |
| 203 | endif |
| 204 | |
| 205 | ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \ |
| 206 | plat/arm/common/fconf/arm_fconf_io.c |
| 207 | |
| 208 | ifeq (${SPD},spmd) |
| 209 | ifeq (${SPMD_SPM_AT_SEL2},1) |
| 210 | ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c |
| 211 | endif |
| 212 | endif |
| 213 | |
| 214 | BL1_SOURCES += drivers/io/io_fip.c \ |
| 215 | drivers/io/io_memmap.c \ |
| 216 | drivers/io/io_storage.c \ |
| 217 | plat/arm/common/arm_bl1_setup.c \ |
| 218 | plat/arm/common/arm_err.c \ |
| 219 | ${ARM_IO_SOURCES} |
| 220 | |
| 221 | ifdef EL3_PAYLOAD_BASE |
| 222 | # Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs |
| 223 | # from their holding pen |
| 224 | BL1_SOURCES += plat/arm/common/arm_pm.c |
| 225 | endif |
| 226 | |
| 227 | BL2_SOURCES += drivers/delay_timer/delay_timer.c \ |
| 228 | drivers/delay_timer/generic_delay_timer.c \ |
| 229 | drivers/io/io_fip.c \ |
| 230 | drivers/io/io_memmap.c \ |
| 231 | drivers/io/io_storage.c \ |
| 232 | plat/arm/common/arm_bl2_setup.c \ |
| 233 | plat/arm/common/arm_err.c \ |
| 234 | ${ARM_IO_SOURCES} |
| 235 | |
| 236 | # Firmware Configuration Framework sources |
| 237 | include lib/fconf/fconf.mk |
| 238 | |
| 239 | # Add `libfdt` and Arm common helpers required for Dynamic Config |
| 240 | include lib/libfdt/libfdt.mk |
| 241 | |
| 242 | DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \ |
| 243 | plat/arm/common/arm_dyn_cfg_helpers.c \ |
| 244 | common/fdt_wrappers.c |
| 245 | |
| 246 | BL1_SOURCES += ${DYN_CFG_SOURCES} |
| 247 | BL2_SOURCES += ${DYN_CFG_SOURCES} |
| 248 | |
| 249 | ifeq (${BL2_AT_EL3},1) |
| 250 | BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c |
| 251 | endif |
| 252 | |
| 253 | # Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use |
| 254 | # the AArch32 descriptors. |
| 255 | BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c |
| 256 | BL2_SOURCES += plat/arm/common/arm_image_load.c \ |
| 257 | common/desc_image_load.c |
| 258 | |
| 259 | ifeq (${SPD},opteed) |
| 260 | BL2_SOURCES += lib/optee/optee_utils.c |
| 261 | endif |
| 262 | |
| 263 | BL2U_SOURCES += drivers/delay_timer/delay_timer.c \ |
| 264 | drivers/delay_timer/generic_delay_timer.c \ |
| 265 | plat/arm/common/arm_bl2u_setup.c |
| 266 | |
| 267 | BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \ |
| 268 | plat/nuvoton/common/nuvoton_pm.c \ |
| 269 | plat/nuvoton/common/nuvoton_topology.c \ |
| 270 | plat/common/plat_psci_common.c |
| 271 | |
| 272 | ifeq (${ENABLE_PMF}, 1) |
| 273 | ifeq (${ARCH}, aarch64) |
| 274 | BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c \ |
| 275 | plat/arm/common/arm_sip_svc.c \ |
Madhukar Pappireddy | cc30710 | 2023-09-09 23:02:34 -0500 | [diff] [blame] | 276 | plat/arm/common/plat_arm_sip_svc.c \ |
rutigl@gmail.com | defbeed | 2023-03-19 09:19:05 +0200 | [diff] [blame] | 277 | lib/pmf/pmf_smc.c |
| 278 | else |
| 279 | BL32_SOURCES += plat/arm/common/arm_sip_svc.c \ |
Madhukar Pappireddy | cc30710 | 2023-09-09 23:02:34 -0500 | [diff] [blame] | 280 | plat/arm/common/plat_arm_sip_svc.c \ |
rutigl@gmail.com | defbeed | 2023-03-19 09:19:05 +0200 | [diff] [blame] | 281 | lib/pmf/pmf_smc.c |
| 282 | endif |
| 283 | endif |
| 284 | |
| 285 | ifeq (${EL3_EXCEPTION_HANDLING},1) |
| 286 | BL31_SOURCES += plat/arm/common/aarch64/arm_ehf.c |
| 287 | endif |
| 288 | |
| 289 | ifeq (${SDEI_SUPPORT},1) |
| 290 | BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c |
| 291 | ifeq (${SDEI_IN_FCONF},1) |
| 292 | BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c |
| 293 | endif |
| 294 | endif |
| 295 | |
| 296 | # RAS sources |
| 297 | ifeq (${RAS_EXTENSION},1) |
| 298 | BL31_SOURCES += lib/extensions/ras/std_err_record.c \ |
| 299 | lib/extensions/ras/ras_common.c |
| 300 | endif |
| 301 | |
| 302 | # Pointer Authentication sources |
| 303 | ifeq (${ENABLE_PAUTH}, 1) |
Govindraj Raja | 5302069 | 2023-08-21 16:32:20 -0500 | [diff] [blame] | 304 | PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c |
rutigl@gmail.com | defbeed | 2023-03-19 09:19:05 +0200 | [diff] [blame] | 305 | endif |
| 306 | |
| 307 | ifeq (${SPD},spmd) |
| 308 | BL31_SOURCES += plat/common/plat_spmd_manifest.c \ |
| 309 | common/fdt_wrappers.c \ |
| 310 | ${LIBFDT_SRCS} |
| 311 | endif |
| 312 | |
| 313 | ifneq (${TRUSTED_BOARD_BOOT},0) |
| 314 | # Include common TBB sources |
| 315 | AUTH_SOURCES := drivers/auth/auth_mod.c \ |
| 316 | drivers/auth/crypto_mod.c \ |
| 317 | drivers/auth/img_parser_mod.c \ |
| 318 | lib/fconf/fconf_tbbr_getter.c |
| 319 | |
| 320 | # Include the selected chain of trust sources. |
| 321 | ifeq (${COT},tbbr) |
| 322 | AUTH_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c |
| 323 | BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_bl1.c |
| 324 | BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_bl2.c |
| 325 | else ifeq (${COT},dualroot) |
| 326 | AUTH_SOURCES += drivers/auth/dualroot/cot.c |
| 327 | else |
| 328 | $(error Unknown chain of trust ${COT}) |
| 329 | endif |
| 330 | |
| 331 | BL1_SOURCES += ${AUTH_SOURCES} \ |
| 332 | bl1/tbbr/tbbr_img_desc.c \ |
| 333 | plat/arm/common/arm_bl1_fwu.c \ |
| 334 | plat/common/tbbr/plat_tbbr.c |
| 335 | |
| 336 | BL2_SOURCES += ${AUTH_SOURCES} \ |
| 337 | plat/common/tbbr/plat_tbbr.c |
| 338 | |
| 339 | $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_)) |
| 340 | |
| 341 | # We expect to locate the *.mk files under the directories specified below |
| 342 | ifeq (${ARM_CRYPTOCELL_INTEG},0) |
| 343 | CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk |
| 344 | else |
| 345 | CRYPTO_LIB_MK := drivers/auth/cryptocell/cryptocell_crypto.mk |
| 346 | endif |
| 347 | |
| 348 | IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk |
| 349 | |
| 350 | $(info Including ${CRYPTO_LIB_MK}) |
| 351 | include ${CRYPTO_LIB_MK} |
| 352 | |
| 353 | $(info Including ${IMG_PARSER_LIB_MK}) |
| 354 | include ${IMG_PARSER_LIB_MK} |
| 355 | endif |
| 356 | |
rutigl@gmail.com | defbeed | 2023-03-19 09:19:05 +0200 | [diff] [blame] | 357 | ifeq (${MEASURED_BOOT},1) |
| 358 | MEASURED_BOOT_MK := drivers/measured_boot/measured_boot.mk |
| 359 | $(info Including ${MEASURED_BOOT_MK}) |
| 360 | include ${MEASURED_BOOT_MK} |
| 361 | endif |
| 362 | |
| 363 | ifeq (${EL3_EXCEPTION_HANDLING},1) |
| 364 | BL31_SOURCES += plat/arm/common/aarch64/arm_ehf.c |
| 365 | endif |
| 366 | |
| 367 | BL1_SOURCES := |
| 368 | BL2_SOURCES := |
| 369 | BL2U_SOURCES := |
| 370 | |
| 371 | DEBUG_CONSOLE ?= 0 |
| 372 | $(eval $(call add_define,DEBUG_CONSOLE)) |