Soby Mathew | feac8fc | 2015-09-29 15:47:16 +0100 | [diff] [blame] | 1 | /* |
Aditya Angadi | 7f8837b | 2019-12-31 14:23:53 +0530 | [diff] [blame] | 2 | * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. |
Soby Mathew | feac8fc | 2015-09-29 15:47:16 +0100 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Soby Mathew | feac8fc | 2015-09-29 15:47:16 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 7 | #ifndef CSS_PM_H |
| 8 | #define CSS_PM_H |
Soby Mathew | feac8fc | 2015-09-29 15:47:16 +0100 | [diff] [blame] | 9 | |
| 10 | #include <cdefs.h> |
Antonio Nino Diaz | 4b32e62 | 2018-08-16 16:52:57 +0100 | [diff] [blame] | 11 | #include <stdint.h> |
Soby Mathew | feac8fc | 2015-09-29 15:47:16 +0100 | [diff] [blame] | 12 | |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 13 | #include <lib/psci/psci.h> |
| 14 | |
Soby Mathew | 200fffd | 2016-10-21 11:34:59 +0100 | [diff] [blame] | 15 | /* Macros to read the CSS power domain state */ |
| 16 | #define CSS_CORE_PWR_STATE(state) (state)->pwr_domain_state[ARM_PWR_LVL0] |
| 17 | #define CSS_CLUSTER_PWR_STATE(state) (state)->pwr_domain_state[ARM_PWR_LVL1] |
Nariman Poushin | cd95626 | 2018-05-01 09:28:40 +0100 | [diff] [blame] | 18 | |
| 19 | static inline unsigned int css_system_pwr_state(const psci_power_state_t *state) |
| 20 | { |
| 21 | #if (PLAT_MAX_PWR_LVL == CSS_SYSTEM_PWR_DMN_LVL) |
| 22 | return state->pwr_domain_state[CSS_SYSTEM_PWR_DMN_LVL]; |
| 23 | #else |
| 24 | return 0; |
| 25 | #endif |
| 26 | } |
Soby Mathew | 200fffd | 2016-10-21 11:34:59 +0100 | [diff] [blame] | 27 | |
Soby Mathew | feac8fc | 2015-09-29 15:47:16 +0100 | [diff] [blame] | 28 | int css_pwr_domain_on(u_register_t mpidr); |
| 29 | void css_pwr_domain_on_finish(const psci_power_state_t *target_state); |
Madhukar Pappireddy | 2859b7d | 2019-06-10 16:54:36 -0500 | [diff] [blame] | 30 | void css_pwr_domain_on_finish_late(const psci_power_state_t *target_state); |
Soby Mathew | feac8fc | 2015-09-29 15:47:16 +0100 | [diff] [blame] | 31 | void css_pwr_domain_off(const psci_power_state_t *target_state); |
| 32 | void css_pwr_domain_suspend(const psci_power_state_t *target_state); |
| 33 | void css_pwr_domain_suspend_finish( |
| 34 | const psci_power_state_t *target_state); |
| 35 | void __dead2 css_system_off(void); |
| 36 | void __dead2 css_system_reset(void); |
| 37 | void css_cpu_standby(plat_local_state_t cpu_state); |
Soby Mathew | 61e8d0b | 2015-10-12 17:32:29 +0100 | [diff] [blame] | 38 | void css_get_sys_suspend_power_state(psci_power_state_t *req_state); |
Jeenu Viswambharan | 9cc4fc0 | 2016-08-04 09:43:15 +0100 | [diff] [blame] | 39 | int css_node_hw_state(u_register_t mpidr, unsigned int power_level); |
Soby Mathew | feac8fc | 2015-09-29 15:47:16 +0100 | [diff] [blame] | 40 | |
Roberto Vargas | 2b36b15 | 2018-02-12 12:36:17 +0000 | [diff] [blame] | 41 | /* |
| 42 | * This mapping array has to be exported by the platform. Each element at |
| 43 | * a given index maps that core to an SCMI power domain. |
| 44 | */ |
| 45 | extern const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[]; |
| 46 | |
Aditya Angadi | 7f8837b | 2019-12-31 14:23:53 +0530 | [diff] [blame] | 47 | #define SCMI_DOMAIN_ID_MASK U(0xFFFF) |
| 48 | #define SCMI_CHANNEL_ID_MASK U(0xFFFF) |
| 49 | #define SCMI_CHANNEL_ID_SHIFT U(16) |
| 50 | |
| 51 | #define SET_SCMI_CHANNEL_ID(n) (((n) & SCMI_CHANNEL_ID_MASK) << \ |
| 52 | SCMI_CHANNEL_ID_SHIFT) |
| 53 | #define SET_SCMI_DOMAIN_ID(n) ((n) & SCMI_DOMAIN_ID_MASK) |
| 54 | #define GET_SCMI_CHANNEL_ID(n) (((n) >> SCMI_CHANNEL_ID_SHIFT) & \ |
| 55 | SCMI_CHANNEL_ID_MASK) |
| 56 | #define GET_SCMI_DOMAIN_ID(n) ((n) & SCMI_DOMAIN_ID_MASK) |
| 57 | |
Antonio Nino Diaz | 5eb8837 | 2018-11-08 10:20:19 +0000 | [diff] [blame] | 58 | #endif /* CSS_PM_H */ |