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Soby Mathewfeac8fc2015-09-29 15:47:16 +01001/*
Roberto Vargas2b36b152018-02-12 12:36:17 +00002 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
Soby Mathewfeac8fc2015-09-29 15:47:16 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Soby Mathewfeac8fc2015-09-29 15:47:16 +01005 */
6
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +00007#ifndef CSS_PM_H
8#define CSS_PM_H
Soby Mathewfeac8fc2015-09-29 15:47:16 +01009
10#include <cdefs.h>
Antonio Nino Diaz4b32e622018-08-16 16:52:57 +010011#include <stdint.h>
Soby Mathewfeac8fc2015-09-29 15:47:16 +010012
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000013#include <lib/psci/psci.h>
14
Soby Mathew200fffd2016-10-21 11:34:59 +010015/* Macros to read the CSS power domain state */
16#define CSS_CORE_PWR_STATE(state) (state)->pwr_domain_state[ARM_PWR_LVL0]
17#define CSS_CLUSTER_PWR_STATE(state) (state)->pwr_domain_state[ARM_PWR_LVL1]
Nariman Poushincd956262018-05-01 09:28:40 +010018
19static inline unsigned int css_system_pwr_state(const psci_power_state_t *state)
20{
21#if (PLAT_MAX_PWR_LVL == CSS_SYSTEM_PWR_DMN_LVL)
22 return state->pwr_domain_state[CSS_SYSTEM_PWR_DMN_LVL];
23#else
24 return 0;
25#endif
26}
Soby Mathew200fffd2016-10-21 11:34:59 +010027
Soby Mathewfeac8fc2015-09-29 15:47:16 +010028int css_pwr_domain_on(u_register_t mpidr);
29void css_pwr_domain_on_finish(const psci_power_state_t *target_state);
Madhukar Pappireddy2859b7d2019-06-10 16:54:36 -050030void css_pwr_domain_on_finish_late(const psci_power_state_t *target_state);
Soby Mathewfeac8fc2015-09-29 15:47:16 +010031void css_pwr_domain_off(const psci_power_state_t *target_state);
32void css_pwr_domain_suspend(const psci_power_state_t *target_state);
33void css_pwr_domain_suspend_finish(
34 const psci_power_state_t *target_state);
35void __dead2 css_system_off(void);
36void __dead2 css_system_reset(void);
37void css_cpu_standby(plat_local_state_t cpu_state);
Soby Mathew61e8d0b2015-10-12 17:32:29 +010038void css_get_sys_suspend_power_state(psci_power_state_t *req_state);
Jeenu Viswambharan9cc4fc02016-08-04 09:43:15 +010039int css_node_hw_state(u_register_t mpidr, unsigned int power_level);
Soby Mathewfeac8fc2015-09-29 15:47:16 +010040
Roberto Vargas2b36b152018-02-12 12:36:17 +000041/*
42 * This mapping array has to be exported by the platform. Each element at
43 * a given index maps that core to an SCMI power domain.
44 */
45extern const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[];
46
Antonio Nino Diaz5eb88372018-11-08 10:20:19 +000047#endif /* CSS_PM_H */