Nishanth Menon | 0192f89 | 2016-10-14 01:13:34 +0000 | [diff] [blame] | 1 | # |
Alexei Fedorov | 2f13d6c | 2020-02-21 10:17:26 +0000 | [diff] [blame] | 2 | # Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. |
Nishanth Menon | 0192f89 | 2016-10-14 01:13:34 +0000 | [diff] [blame] | 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | # |
| 6 | |
| 7 | # We don't use BL1 or BL2, so BL31 is the first image to execute |
| 8 | RESET_TO_BL31 := 1 |
| 9 | # Only one core starts up at first |
| 10 | COLD_BOOT_SINGLE_CPU := 1 |
| 11 | # We can choose where a core starts executing |
| 12 | PROGRAMMABLE_RESET_ADDRESS:= 1 |
| 13 | |
| 14 | # System coherency is managed in hardware |
Andrew F. Davis | f86a5de | 2019-04-25 14:02:33 -0400 | [diff] [blame] | 15 | WARMBOOT_ENABLE_DCACHE_EARLY := 1 |
| 16 | USE_COHERENT_MEM := 1 |
Nishanth Menon | 0192f89 | 2016-10-14 01:13:34 +0000 | [diff] [blame] | 17 | |
Nishanth Menon | 0192f89 | 2016-10-14 01:13:34 +0000 | [diff] [blame] | 18 | # A53 erratum for SoC. (enable them all) |
| 19 | ERRATA_A53_826319 := 1 |
| 20 | ERRATA_A53_835769 := 1 |
| 21 | ERRATA_A53_836870 := 1 |
| 22 | ERRATA_A53_843419 := 1 |
| 23 | ERRATA_A53_855873 := 1 |
| 24 | |
Nishanth Menon | 4f9ef16 | 2018-06-22 06:36:29 -0500 | [diff] [blame] | 25 | # A72 Erratum for SoC |
| 26 | ERRATA_A72_859971 := 1 |
| 27 | |
Andrew F. Davis | 8d19f1c | 2019-05-14 15:38:11 -0500 | [diff] [blame] | 28 | CRASH_REPORTING := 1 |
| 29 | HANDLE_EA_EL3_FIRST := 1 |
| 30 | |
Andrew F. Davis | 26e8912 | 2019-01-22 14:16:03 -0600 | [diff] [blame] | 31 | # Split out RO data into a non-executable section |
| 32 | SEPARATE_CODE_AND_RODATA := 1 |
| 33 | |
Andrew F. Davis | 4ab7e01 | 2019-01-04 16:04:01 -0600 | [diff] [blame] | 34 | # Generate a Position Independent Executable |
| 35 | ENABLE_PIE := 1 |
| 36 | |
Nishanth Menon | ce97604 | 2016-10-14 01:13:44 +0000 | [diff] [blame] | 37 | TI_16550_MDR_QUIRK := 1 |
| 38 | $(eval $(call add_define,TI_16550_MDR_QUIRK)) |
| 39 | |
Jan Kiszka | b99c078 | 2020-05-20 07:35:48 +0200 | [diff] [blame] | 40 | K3_USART := 0 |
| 41 | $(eval $(call add_define,K3_USART)) |
| 42 | |
Andreas Dannenberg | 5e6d140 | 2019-01-14 13:20:15 -0600 | [diff] [blame] | 43 | # Allow customizing the UART baud rate |
| 44 | K3_USART_BAUD := 115200 |
| 45 | $(eval $(call add_define,K3_USART_BAUD)) |
| 46 | |
Nishanth Menon | 3ed1b28 | 2016-10-14 01:13:45 +0000 | [diff] [blame] | 47 | # Libraries |
| 48 | include lib/xlat_tables_v2/xlat_tables.mk |
| 49 | |
Nishanth Menon | 0192f89 | 2016-10-14 01:13:34 +0000 | [diff] [blame] | 50 | PLAT_INCLUDES += \ |
| 51 | -I${PLAT_PATH}/include \ |
Andrew F. Davis | 537d3ff | 2018-05-04 19:06:08 +0000 | [diff] [blame] | 52 | -I${PLAT_PATH}/common/drivers/sec_proxy \ |
Andrew F. Davis | a513b2a | 2018-05-04 19:06:09 +0000 | [diff] [blame] | 53 | -I${PLAT_PATH}/common/drivers/ti_sci \ |
Nishanth Menon | 0192f89 | 2016-10-14 01:13:34 +0000 | [diff] [blame] | 54 | |
Nishanth Menon | ce97604 | 2016-10-14 01:13:44 +0000 | [diff] [blame] | 55 | K3_CONSOLE_SOURCES += \ |
Nishanth Menon | ce97604 | 2016-10-14 01:13:44 +0000 | [diff] [blame] | 56 | drivers/ti/uart/aarch64/16550_console.S \ |
| 57 | ${PLAT_PATH}/common/k3_console.c \ |
| 58 | |
Alexei Fedorov | 84f1b5d | 2020-03-23 18:45:17 +0000 | [diff] [blame] | 59 | # Include GICv3 driver files |
| 60 | include drivers/arm/gic/v3/gicv3.mk |
| 61 | |
Nishanth Menon | f97ad37 | 2016-10-14 01:13:49 +0000 | [diff] [blame] | 62 | K3_GIC_SOURCES += \ |
Alexei Fedorov | 84f1b5d | 2020-03-23 18:45:17 +0000 | [diff] [blame] | 63 | ${GICV3_SOURCES} \ |
Nishanth Menon | f97ad37 | 2016-10-14 01:13:49 +0000 | [diff] [blame] | 64 | plat/common/plat_gicv3.c \ |
| 65 | ${PLAT_PATH}/common/k3_gicv3.c \ |
| 66 | |
Benjamin Fair | a42b61b | 2016-10-14 01:13:46 +0000 | [diff] [blame] | 67 | K3_PSCI_SOURCES += \ |
| 68 | plat/common/plat_psci_common.c \ |
| 69 | ${PLAT_PATH}/common/k3_psci.c \ |
| 70 | |
Andrew F. Davis | 537d3ff | 2018-05-04 19:06:08 +0000 | [diff] [blame] | 71 | K3_SEC_PROXY_SOURCES += \ |
| 72 | ${PLAT_PATH}/common/drivers/sec_proxy/sec_proxy.c \ |
| 73 | |
Andrew F. Davis | a513b2a | 2018-05-04 19:06:09 +0000 | [diff] [blame] | 74 | K3_TI_SCI_SOURCES += \ |
| 75 | ${PLAT_PATH}/common/drivers/ti_sci/ti_sci.c \ |
| 76 | |
Nishanth Menon | 0192f89 | 2016-10-14 01:13:34 +0000 | [diff] [blame] | 77 | PLAT_BL_COMMON_SOURCES += \ |
| 78 | lib/cpus/aarch64/cortex_a53.S \ |
Nishanth Menon | 4f9ef16 | 2018-06-22 06:36:29 -0500 | [diff] [blame] | 79 | lib/cpus/aarch64/cortex_a72.S \ |
Nishanth Menon | 3ed1b28 | 2016-10-14 01:13:45 +0000 | [diff] [blame] | 80 | ${XLAT_TABLES_LIB_SRCS} \ |
Nishanth Menon | ce97604 | 2016-10-14 01:13:44 +0000 | [diff] [blame] | 81 | ${K3_CONSOLE_SOURCES} \ |
Nishanth Menon | 0192f89 | 2016-10-14 01:13:34 +0000 | [diff] [blame] | 82 | |
| 83 | BL31_SOURCES += \ |
| 84 | ${PLAT_PATH}/common/k3_bl31_setup.c \ |
Benjamin Fair | f807a34 | 2016-10-18 14:32:06 -0500 | [diff] [blame] | 85 | ${PLAT_PATH}/common/k3_helpers.S \ |
Benjamin Fair | 42eea87 | 2016-10-14 01:13:47 +0000 | [diff] [blame] | 86 | ${PLAT_PATH}/common/k3_topology.c \ |
Nishanth Menon | f97ad37 | 2016-10-14 01:13:49 +0000 | [diff] [blame] | 87 | ${K3_GIC_SOURCES} \ |
Benjamin Fair | a42b61b | 2016-10-14 01:13:46 +0000 | [diff] [blame] | 88 | ${K3_PSCI_SOURCES} \ |
Andrew F. Davis | 537d3ff | 2018-05-04 19:06:08 +0000 | [diff] [blame] | 89 | ${K3_SEC_PROXY_SOURCES} \ |
Andrew F. Davis | a513b2a | 2018-05-04 19:06:09 +0000 | [diff] [blame] | 90 | ${K3_TI_SCI_SOURCES} \ |