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git01.mediatek.com / filogic / atf / 4f9ef1612c79a1a96bea69e3f17c1aceccf01572 / . / plat / ti / k3 / common / plat_common.mk
blob: 2e5f5845365c35da470b59df99462ecb11165714 [file] [log] [blame]
Nishanth Menon0192f892016-10-14 01:13:34 +0000[diff] [blame]1#
2# Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7# We don't use BL1 or BL2, so BL31 is the first image to execute
8RESET_TO_BL31 := 1
9# Only one core starts up at first
10COLD_BOOT_SINGLE_CPU := 1
11# We can choose where a core starts executing
12PROGRAMMABLE_RESET_ADDRESS:= 1
13
14# System coherency is managed in hardware
Andrew F. Davis7c461d72018-10-12 15:37:04 -0500[diff] [blame]15HW_ASSISTED_COHERENCY := 1
Nishanth Menon0192f892016-10-14 01:13:34 +0000[diff] [blame]16USE_COHERENT_MEM := 0
17
Nishanth Menon0192f892016-10-14 01:13:34 +0000[diff] [blame]18# A53 erratum for SoC. (enable them all)
19ERRATA_A53_826319 := 1
20ERRATA_A53_835769 := 1
21ERRATA_A53_836870 := 1
22ERRATA_A53_843419 := 1
23ERRATA_A53_855873 := 1
24
Nishanth Menon4f9ef162018-06-22 06:36:29 -0500[diff] [blame^]25# A72 Erratum for SoC
26ERRATA_A72_859971 := 1
27
Andrew F. Davis26e89122019-01-22 14:16:03 -0600[diff] [blame]28# Split out RO data into a non-executable section
29SEPARATE_CODE_AND_RODATA := 1
30
Andrew F. Davis7c461d72018-10-12 15:37:04 -0500[diff] [blame]31# Leave the caches enabled on core powerdown path
32TI_AM65X_WORKAROUND := 1
33$(eval $(call add_define,TI_AM65X_WORKAROUND))
34
Nishanth Menonce976042016-10-14 01:13:44 +0000[diff] [blame]35MULTI_CONSOLE_API := 1
36TI_16550_MDR_QUIRK := 1
37$(eval $(call add_define,TI_16550_MDR_QUIRK))
38
Andreas Dannenberg5e6d1402019-01-14 13:20:15 -0600[diff] [blame]39# Allow customizing the UART baud rate
40K3_USART_BAUD := 115200
41$(eval $(call add_define,K3_USART_BAUD))
42
Nishanth Menon3ed1b282016-10-14 01:13:45 +0000[diff] [blame]43# Libraries
44include lib/xlat_tables_v2/xlat_tables.mk
45
Nishanth Menon0192f892016-10-14 01:13:34 +0000[diff] [blame]46PLAT_INCLUDES += \
47 -I${PLAT_PATH}/include \
Andrew F. Davis537d3ff2018-05-04 19:06:08 +0000[diff] [blame]48 -I${PLAT_PATH}/common/drivers/sec_proxy \
Andrew F. Davisa513b2a2018-05-04 19:06:09 +0000[diff] [blame]49 -I${PLAT_PATH}/common/drivers/ti_sci \
Nishanth Menon0192f892016-10-14 01:13:34 +0000[diff] [blame]50
Nishanth Menonce976042016-10-14 01:13:44 +0000[diff] [blame]51K3_CONSOLE_SOURCES += \
Nishanth Menonce976042016-10-14 01:13:44 +0000[diff] [blame]52 drivers/ti/uart/aarch64/16550_console.S \
53 ${PLAT_PATH}/common/k3_console.c \
54
Nishanth Menonf97ad372016-10-14 01:13:49 +0000[diff] [blame]55K3_GIC_SOURCES += \
56 drivers/arm/gic/common/gic_common.c \
57 drivers/arm/gic/v3/gicv3_main.c \
58 drivers/arm/gic/v3/gicv3_helpers.c \
59 plat/common/plat_gicv3.c \
60 ${PLAT_PATH}/common/k3_gicv3.c \
61
Benjamin Faira42b61b2016-10-14 01:13:46 +0000[diff] [blame]62K3_PSCI_SOURCES += \
63 plat/common/plat_psci_common.c \
64 ${PLAT_PATH}/common/k3_psci.c \
65
Andrew F. Davis537d3ff2018-05-04 19:06:08 +0000[diff] [blame]66K3_SEC_PROXY_SOURCES += \
67 ${PLAT_PATH}/common/drivers/sec_proxy/sec_proxy.c \
68
Andrew F. Davisa513b2a2018-05-04 19:06:09 +0000[diff] [blame]69K3_TI_SCI_SOURCES += \
70 ${PLAT_PATH}/common/drivers/ti_sci/ti_sci.c \
71
Nishanth Menon0192f892016-10-14 01:13:34 +0000[diff] [blame]72PLAT_BL_COMMON_SOURCES += \
73 lib/cpus/aarch64/cortex_a53.S \
Nishanth Menon4f9ef162018-06-22 06:36:29 -0500[diff] [blame^]74 lib/cpus/aarch64/cortex_a72.S \
Nishanth Menon3ed1b282016-10-14 01:13:45 +0000[diff] [blame]75 ${XLAT_TABLES_LIB_SRCS} \
Nishanth Menonce976042016-10-14 01:13:44 +0000[diff] [blame]76 ${K3_CONSOLE_SOURCES} \
Nishanth Menon0192f892016-10-14 01:13:34 +0000[diff] [blame]77
78BL31_SOURCES += \
79 ${PLAT_PATH}/common/k3_bl31_setup.c \
Benjamin Fairf807a342016-10-18 14:32:06 -0500[diff] [blame]80 ${PLAT_PATH}/common/k3_helpers.S \
Benjamin Fair42eea872016-10-14 01:13:47 +0000[diff] [blame]81 ${PLAT_PATH}/common/k3_topology.c \
Nishanth Menonf97ad372016-10-14 01:13:49 +0000[diff] [blame]82 ${K3_GIC_SOURCES} \
Benjamin Faira42b61b2016-10-14 01:13:46 +0000[diff] [blame]83 ${K3_PSCI_SOURCES} \
Andrew F. Davis537d3ff2018-05-04 19:06:08 +0000[diff] [blame]84 ${K3_SEC_PROXY_SOURCES} \
Andrew F. Davisa513b2a2018-05-04 19:06:09 +0000[diff] [blame]85 ${K3_TI_SCI_SOURCES} \