blob: 8ba2e84f5c895b5ecc9fa9c03d9a9c07134de0bb [file] [log] [blame]
Nishanth Menon0192f892016-10-14 01:13:34 +00001#
2# Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7# We don't use BL1 or BL2, so BL31 is the first image to execute
8RESET_TO_BL31 := 1
9# Only one core starts up at first
10COLD_BOOT_SINGLE_CPU := 1
11# We can choose where a core starts executing
12PROGRAMMABLE_RESET_ADDRESS:= 1
13
14# System coherency is managed in hardware
15HW_ASSISTED_COHERENCY := 1
16USE_COHERENT_MEM := 0
17
18ERROR_DEPRECATED := 1
19ENABLE_PLAT_COMPAT := 0
20
21# A53 erratum for SoC. (enable them all)
22ERRATA_A53_826319 := 1
23ERRATA_A53_835769 := 1
24ERRATA_A53_836870 := 1
25ERRATA_A53_843419 := 1
26ERRATA_A53_855873 := 1
27
28PLAT_INCLUDES += \
29 -I${PLAT_PATH}/include \
30 -Iinclude/plat/arm/common/ \
31 -Iinclude/plat/arm/common/aarch64/ \
32
33PLAT_BL_COMMON_SOURCES += \
34 lib/cpus/aarch64/cortex_a53.S \
35
36BL31_SOURCES += \
37 ${PLAT_PATH}/common/k3_bl31_setup.c \