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Nishanth Menon0192f892016-10-14 01:13:34 +00001#
2# Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7# We don't use BL1 or BL2, so BL31 is the first image to execute
8RESET_TO_BL31 := 1
9# Only one core starts up at first
10COLD_BOOT_SINGLE_CPU := 1
11# We can choose where a core starts executing
12PROGRAMMABLE_RESET_ADDRESS:= 1
13
14# System coherency is managed in hardware
Andrew F. Davis7c461d72018-10-12 15:37:04 -050015HW_ASSISTED_COHERENCY := 1
Nishanth Menon0192f892016-10-14 01:13:34 +000016USE_COHERENT_MEM := 0
17
Nishanth Menon0192f892016-10-14 01:13:34 +000018# A53 erratum for SoC. (enable them all)
19ERRATA_A53_826319 := 1
20ERRATA_A53_835769 := 1
21ERRATA_A53_836870 := 1
22ERRATA_A53_843419 := 1
23ERRATA_A53_855873 := 1
24
Andrew F. Davis26e89122019-01-22 14:16:03 -060025# Split out RO data into a non-executable section
26SEPARATE_CODE_AND_RODATA := 1
27
Andrew F. Davis7c461d72018-10-12 15:37:04 -050028# Leave the caches enabled on core powerdown path
29TI_AM65X_WORKAROUND := 1
30$(eval $(call add_define,TI_AM65X_WORKAROUND))
31
Nishanth Menonce976042016-10-14 01:13:44 +000032MULTI_CONSOLE_API := 1
33TI_16550_MDR_QUIRK := 1
34$(eval $(call add_define,TI_16550_MDR_QUIRK))
35
Andreas Dannenberg5e6d1402019-01-14 13:20:15 -060036# Allow customizing the UART baud rate
37K3_USART_BAUD := 115200
38$(eval $(call add_define,K3_USART_BAUD))
39
Nishanth Menon3ed1b282016-10-14 01:13:45 +000040# Libraries
41include lib/xlat_tables_v2/xlat_tables.mk
42
Nishanth Menon0192f892016-10-14 01:13:34 +000043PLAT_INCLUDES += \
44 -I${PLAT_PATH}/include \
Andrew F. Davis537d3ff2018-05-04 19:06:08 +000045 -I${PLAT_PATH}/common/drivers/sec_proxy \
Andrew F. Davisa513b2a2018-05-04 19:06:09 +000046 -I${PLAT_PATH}/common/drivers/ti_sci \
Nishanth Menon0192f892016-10-14 01:13:34 +000047
Nishanth Menonce976042016-10-14 01:13:44 +000048K3_CONSOLE_SOURCES += \
Nishanth Menonce976042016-10-14 01:13:44 +000049 drivers/ti/uart/aarch64/16550_console.S \
50 ${PLAT_PATH}/common/k3_console.c \
51
Nishanth Menonf97ad372016-10-14 01:13:49 +000052K3_GIC_SOURCES += \
53 drivers/arm/gic/common/gic_common.c \
54 drivers/arm/gic/v3/gicv3_main.c \
55 drivers/arm/gic/v3/gicv3_helpers.c \
56 plat/common/plat_gicv3.c \
57 ${PLAT_PATH}/common/k3_gicv3.c \
58
Benjamin Faira42b61b2016-10-14 01:13:46 +000059K3_PSCI_SOURCES += \
60 plat/common/plat_psci_common.c \
61 ${PLAT_PATH}/common/k3_psci.c \
62
Andrew F. Davis537d3ff2018-05-04 19:06:08 +000063K3_SEC_PROXY_SOURCES += \
64 ${PLAT_PATH}/common/drivers/sec_proxy/sec_proxy.c \
65
Andrew F. Davisa513b2a2018-05-04 19:06:09 +000066K3_TI_SCI_SOURCES += \
67 ${PLAT_PATH}/common/drivers/ti_sci/ti_sci.c \
68
Nishanth Menon0192f892016-10-14 01:13:34 +000069PLAT_BL_COMMON_SOURCES += \
70 lib/cpus/aarch64/cortex_a53.S \
Nishanth Menon3ed1b282016-10-14 01:13:45 +000071 ${XLAT_TABLES_LIB_SRCS} \
Nishanth Menonce976042016-10-14 01:13:44 +000072 ${K3_CONSOLE_SOURCES} \
Nishanth Menon0192f892016-10-14 01:13:34 +000073
74BL31_SOURCES += \
75 ${PLAT_PATH}/common/k3_bl31_setup.c \
Benjamin Fairf807a342016-10-18 14:32:06 -050076 ${PLAT_PATH}/common/k3_helpers.S \
Benjamin Fair42eea872016-10-14 01:13:47 +000077 ${PLAT_PATH}/common/k3_topology.c \
Nishanth Menonf97ad372016-10-14 01:13:49 +000078 ${K3_GIC_SOURCES} \
Benjamin Faira42b61b2016-10-14 01:13:46 +000079 ${K3_PSCI_SOURCES} \
Andrew F. Davis537d3ff2018-05-04 19:06:08 +000080 ${K3_SEC_PROXY_SOURCES} \
Andrew F. Davisa513b2a2018-05-04 19:06:09 +000081 ${K3_TI_SCI_SOURCES} \