Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 1 | /* |
Soby Mathew | 7d5a2e7 | 2018-01-10 15:59:31 +0000 | [diff] [blame] | 2 | * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <arch.h> |
| 8 | #include <arch_helpers.h> |
| 9 | #include <arm_def.h> |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 10 | #include <assert.h> |
| 11 | #include <bl_common.h> |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 12 | #include <console.h> |
Yatharth Kochar | f9a0f16 | 2016-09-13 17:07:57 +0100 | [diff] [blame] | 13 | #include <debug.h> |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 14 | #include <mmio.h> |
| 15 | #include <plat_arm.h> |
| 16 | #include <platform.h> |
| 17 | |
Soby Mathew | a0fedc4 | 2016-06-16 14:52:04 +0100 | [diff] [blame] | 18 | #define BL31_END (uintptr_t)(&__BL31_END__) |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 19 | |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 20 | /* |
| 21 | * Placeholder variables for copying the arguments that have been passed to |
Juan Castillo | 7d19941 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 22 | * BL31 from BL2. |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 23 | */ |
| 24 | static entry_point_info_t bl32_image_ep_info; |
| 25 | static entry_point_info_t bl33_image_ep_info; |
| 26 | |
| 27 | |
| 28 | /* Weak definitions may be overridden in specific ARM standard platform */ |
Soby Mathew | 7d5a2e7 | 2018-01-10 15:59:31 +0000 | [diff] [blame] | 29 | #pragma weak bl31_early_platform_setup2 |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 30 | #pragma weak bl31_platform_setup |
| 31 | #pragma weak bl31_plat_arch_setup |
| 32 | #pragma weak bl31_plat_get_next_image_ep_info |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 33 | |
| 34 | |
| 35 | /******************************************************************************* |
| 36 | * Return a pointer to the 'entry_point_info' structure of the next image for the |
Juan Castillo | 7d19941 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 37 | * security state specified. BL33 corresponds to the non-secure image type |
| 38 | * while BL32 corresponds to the secure image type. A NULL pointer is returned |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 39 | * if the image does not exist. |
| 40 | ******************************************************************************/ |
| 41 | entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) |
| 42 | { |
| 43 | entry_point_info_t *next_image_info; |
| 44 | |
| 45 | assert(sec_state_is_valid(type)); |
| 46 | next_image_info = (type == NON_SECURE) |
| 47 | ? &bl33_image_ep_info : &bl32_image_ep_info; |
| 48 | /* |
| 49 | * None of the images on the ARM development platforms can have 0x0 |
| 50 | * as the entrypoint |
| 51 | */ |
| 52 | if (next_image_info->pc) |
| 53 | return next_image_info; |
| 54 | else |
| 55 | return NULL; |
| 56 | } |
| 57 | |
| 58 | /******************************************************************************* |
Juan Castillo | 7d19941 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 59 | * Perform any BL31 early platform setup common to ARM standard platforms. |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 60 | * Here is an opportunity to copy parameters passed by the calling EL (S-EL1 |
| 61 | * in BL2 & S-EL3 in BL1) before they are lost (potentially). This needs to be |
| 62 | * done before the MMU is initialized so that the memory layout can be used |
| 63 | * while creating page tables. BL2 has flushed this information to memory, so |
| 64 | * we are guaranteed to pick up good data. |
| 65 | ******************************************************************************/ |
Yatharth Kochar | f9a0f16 | 2016-09-13 17:07:57 +0100 | [diff] [blame] | 66 | #if LOAD_IMAGE_V2 |
Soby Mathew | 7d5a2e7 | 2018-01-10 15:59:31 +0000 | [diff] [blame] | 67 | void arm_bl31_early_platform_setup(void *from_bl2, uintptr_t soc_fw_config, |
| 68 | uintptr_t hw_config, void *plat_params_from_bl2) |
Yatharth Kochar | f9a0f16 | 2016-09-13 17:07:57 +0100 | [diff] [blame] | 69 | #else |
Soby Mathew | 7d5a2e7 | 2018-01-10 15:59:31 +0000 | [diff] [blame] | 70 | void arm_bl31_early_platform_setup(bl31_params_t *from_bl2, uintptr_t soc_fw_config, |
| 71 | uintptr_t hw_config, void *plat_params_from_bl2) |
Yatharth Kochar | f9a0f16 | 2016-09-13 17:07:57 +0100 | [diff] [blame] | 72 | #endif |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 73 | { |
| 74 | /* Initialize the console to provide early debug support */ |
| 75 | console_init(PLAT_ARM_BOOT_UART_BASE, PLAT_ARM_BOOT_UART_CLK_IN_HZ, |
| 76 | ARM_CONSOLE_BAUDRATE); |
| 77 | |
| 78 | #if RESET_TO_BL31 |
Juan Castillo | 7d19941 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 79 | /* There are no parameters from BL2 if BL31 is a reset vector */ |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 80 | assert(from_bl2 == NULL); |
| 81 | assert(plat_params_from_bl2 == NULL); |
| 82 | |
Juan Castillo | 456deef | 2015-11-06 10:01:37 +0000 | [diff] [blame] | 83 | #ifdef BL32_BASE |
Juan Castillo | 7d19941 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 84 | /* Populate entry point information for BL32 */ |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 85 | SET_PARAM_HEAD(&bl32_image_ep_info, |
| 86 | PARAM_EP, |
| 87 | VERSION_1, |
| 88 | 0); |
| 89 | SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); |
| 90 | bl32_image_ep_info.pc = BL32_BASE; |
| 91 | bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry(); |
Juan Castillo | 456deef | 2015-11-06 10:01:37 +0000 | [diff] [blame] | 92 | #endif /* BL32_BASE */ |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 93 | |
Juan Castillo | 7d19941 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 94 | /* Populate entry point information for BL33 */ |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 95 | SET_PARAM_HEAD(&bl33_image_ep_info, |
| 96 | PARAM_EP, |
| 97 | VERSION_1, |
| 98 | 0); |
| 99 | /* |
Juan Castillo | 7d19941 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 100 | * Tell BL31 where the non-trusted software image |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 101 | * is located and the entry state information |
| 102 | */ |
| 103 | bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); |
Soby Mathew | 4876ae3 | 2016-05-09 17:20:10 +0100 | [diff] [blame] | 104 | |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 105 | bl33_image_ep_info.spsr = arm_get_spsr_for_bl33_entry(); |
| 106 | SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); |
| 107 | |
Yatharth Kochar | f9a0f16 | 2016-09-13 17:07:57 +0100 | [diff] [blame] | 108 | #else /* RESET_TO_BL31 */ |
| 109 | |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 110 | /* |
| 111 | * In debug builds, we pass a special value in 'plat_params_from_bl2' |
Juan Castillo | 7d19941 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 112 | * to verify platform parameters from BL2 to BL31. |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 113 | * In release builds, it's not used. |
| 114 | */ |
| 115 | assert(((unsigned long long)plat_params_from_bl2) == |
| 116 | ARM_BL31_PLAT_PARAM_VAL); |
| 117 | |
Yatharth Kochar | f9a0f16 | 2016-09-13 17:07:57 +0100 | [diff] [blame] | 118 | # if LOAD_IMAGE_V2 |
| 119 | /* |
| 120 | * Check params passed from BL2 should not be NULL, |
| 121 | */ |
| 122 | bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2; |
| 123 | assert(params_from_bl2 != NULL); |
| 124 | assert(params_from_bl2->h.type == PARAM_BL_PARAMS); |
| 125 | assert(params_from_bl2->h.version >= VERSION_2); |
| 126 | |
| 127 | bl_params_node_t *bl_params = params_from_bl2->head; |
| 128 | |
| 129 | /* |
| 130 | * Copy BL33 and BL32 (if present), entry point information. |
| 131 | * They are stored in Secure RAM, in BL2's address space. |
| 132 | */ |
| 133 | while (bl_params) { |
| 134 | if (bl_params->image_id == BL32_IMAGE_ID) |
| 135 | bl32_image_ep_info = *bl_params->ep_info; |
| 136 | |
| 137 | if (bl_params->image_id == BL33_IMAGE_ID) |
| 138 | bl33_image_ep_info = *bl_params->ep_info; |
| 139 | |
| 140 | bl_params = bl_params->next_params_info; |
| 141 | } |
| 142 | |
| 143 | if (bl33_image_ep_info.pc == 0) |
| 144 | panic(); |
| 145 | |
| 146 | # else /* LOAD_IMAGE_V2 */ |
| 147 | |
| 148 | /* |
| 149 | * Check params passed from BL2 should not be NULL, |
| 150 | */ |
| 151 | assert(from_bl2 != NULL); |
| 152 | assert(from_bl2->h.type == PARAM_BL31); |
| 153 | assert(from_bl2->h.version >= VERSION_1); |
| 154 | |
Soby Mathew | 7d5a2e7 | 2018-01-10 15:59:31 +0000 | [diff] [blame] | 155 | /* Dynamic Config is not supported for LOAD_IMAGE_V1 */ |
| 156 | assert(soc_fw_config == 0); |
| 157 | assert(hw_config == 0); |
| 158 | |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 159 | /* |
Juan Castillo | 7d19941 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 160 | * Copy BL32 (if populated by BL2) and BL33 entry point information. |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 161 | * They are stored in Secure RAM, in BL2's address space. |
| 162 | */ |
Juan Castillo | 456deef | 2015-11-06 10:01:37 +0000 | [diff] [blame] | 163 | if (from_bl2->bl32_ep_info) |
| 164 | bl32_image_ep_info = *from_bl2->bl32_ep_info; |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 165 | bl33_image_ep_info = *from_bl2->bl33_ep_info; |
Yatharth Kochar | f9a0f16 | 2016-09-13 17:07:57 +0100 | [diff] [blame] | 166 | |
| 167 | # endif /* LOAD_IMAGE_V2 */ |
| 168 | #endif /* RESET_TO_BL31 */ |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 169 | } |
| 170 | |
Soby Mathew | 7d5a2e7 | 2018-01-10 15:59:31 +0000 | [diff] [blame] | 171 | void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, |
| 172 | u_register_t arg2, u_register_t arg3) |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 173 | { |
Soby Mathew | 7d5a2e7 | 2018-01-10 15:59:31 +0000 | [diff] [blame] | 174 | arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3); |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 175 | |
| 176 | /* |
Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 177 | * Initialize Interconnect for this cluster during cold boot. |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 178 | * No need for locks as no other CPU is active. |
| 179 | */ |
Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 180 | plat_arm_interconnect_init(); |
Sandrine Bailleux | da797f6 | 2015-05-14 14:13:05 +0100 | [diff] [blame] | 181 | |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 182 | /* |
Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 183 | * Enable Interconnect coherency for the primary CPU's cluster. |
Sandrine Bailleux | da797f6 | 2015-05-14 14:13:05 +0100 | [diff] [blame] | 184 | * Earlier bootloader stages might already do this (e.g. Trusted |
| 185 | * Firmware's BL1 does it) but we can't assume so. There is no harm in |
| 186 | * executing this code twice anyway. |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 187 | * Platform specific PSCI code will enable coherency for other |
| 188 | * clusters. |
| 189 | */ |
Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 190 | plat_arm_interconnect_enter_coherency(); |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 191 | } |
| 192 | |
| 193 | /******************************************************************************* |
Juan Castillo | 7d19941 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 194 | * Perform any BL31 platform setup common to ARM standard platforms |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 195 | ******************************************************************************/ |
| 196 | void arm_bl31_platform_setup(void) |
| 197 | { |
Achin Gupta | 1fa7eb6 | 2015-11-03 14:18:34 +0000 | [diff] [blame] | 198 | /* Initialize the GIC driver, cpu and distributor interfaces */ |
| 199 | plat_arm_gic_driver_init(); |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 200 | plat_arm_gic_init(); |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 201 | |
| 202 | #if RESET_TO_BL31 |
| 203 | /* |
| 204 | * Do initial security configuration to allow DRAM/device access |
| 205 | * (if earlier BL has not already done so). |
| 206 | */ |
| 207 | plat_arm_security_setup(); |
| 208 | |
| 209 | #endif /* RESET_TO_BL31 */ |
| 210 | |
| 211 | /* Enable and initialize the System level generic timer */ |
| 212 | mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF, |
| 213 | CNTCR_FCREQ(0) | CNTCR_EN); |
| 214 | |
| 215 | /* Allow access to the System counter timer module */ |
Soby Mathew | 61e8d0b | 2015-10-12 17:32:29 +0100 | [diff] [blame] | 216 | arm_configure_sys_timer(); |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 217 | |
| 218 | /* Initialize power controller before setting up topology */ |
| 219 | plat_arm_pwrc_setup(); |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 220 | } |
| 221 | |
Soby Mathew | 2fd66be | 2015-12-09 11:38:43 +0000 | [diff] [blame] | 222 | /******************************************************************************* |
Juan Castillo | 7d19941 | 2015-12-14 09:35:25 +0000 | [diff] [blame] | 223 | * Perform any BL31 platform runtime setup prior to BL31 exit common to ARM |
Soby Mathew | 2fd66be | 2015-12-09 11:38:43 +0000 | [diff] [blame] | 224 | * standard platforms |
| 225 | ******************************************************************************/ |
| 226 | void arm_bl31_plat_runtime_setup(void) |
| 227 | { |
| 228 | /* Initialize the runtime console */ |
| 229 | console_init(PLAT_ARM_BL31_RUN_UART_BASE, PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ, |
| 230 | ARM_CONSOLE_BAUDRATE); |
| 231 | } |
| 232 | |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 233 | void bl31_platform_setup(void) |
| 234 | { |
| 235 | arm_bl31_platform_setup(); |
| 236 | } |
| 237 | |
Soby Mathew | 2fd66be | 2015-12-09 11:38:43 +0000 | [diff] [blame] | 238 | void bl31_plat_runtime_setup(void) |
| 239 | { |
| 240 | arm_bl31_plat_runtime_setup(); |
| 241 | } |
| 242 | |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 243 | /******************************************************************************* |
Sandrine Bailleux | 4a1267a | 2016-05-18 16:11:47 +0100 | [diff] [blame] | 244 | * Perform the very early platform specific architectural setup shared between |
| 245 | * ARM standard platforms. This only does basic initialization. Later |
| 246 | * architectural setup (bl31_arch_setup()) does not do anything platform |
| 247 | * specific. |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 248 | ******************************************************************************/ |
| 249 | void arm_bl31_plat_arch_setup(void) |
| 250 | { |
Sandrine Bailleux | ecdc4d3 | 2016-07-08 14:38:16 +0100 | [diff] [blame] | 251 | arm_setup_page_tables(BL31_BASE, |
| 252 | BL31_END - BL31_BASE, |
| 253 | BL_CODE_BASE, |
Masahiro Yamada | 51bef61 | 2017-01-18 02:10:08 +0900 | [diff] [blame] | 254 | BL_CODE_END, |
Sandrine Bailleux | ecdc4d3 | 2016-07-08 14:38:16 +0100 | [diff] [blame] | 255 | BL_RO_DATA_BASE, |
Masahiro Yamada | 51bef61 | 2017-01-18 02:10:08 +0900 | [diff] [blame] | 256 | BL_RO_DATA_END |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 257 | #if USE_COHERENT_MEM |
Masahiro Yamada | 0fac5af | 2016-12-28 16:11:41 +0900 | [diff] [blame] | 258 | , BL_COHERENT_RAM_BASE, |
| 259 | BL_COHERENT_RAM_END |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 260 | #endif |
| 261 | ); |
Sandrine Bailleux | 4a1267a | 2016-05-18 16:11:47 +0100 | [diff] [blame] | 262 | enable_mmu_el3(0); |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 263 | } |
| 264 | |
| 265 | void bl31_plat_arch_setup(void) |
| 266 | { |
| 267 | arm_bl31_plat_arch_setup(); |
| 268 | } |