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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Yatharth Kochara65be2f2015-10-09 18:06:13 +01002 * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#ifndef __BL_COMMON_H__
32#define __BL_COMMON_H__
33
Vikram Kanigirida567432014-04-15 18:08:08 +010034#define SECURE 0x0
35#define NON_SECURE 0x1
Juan Castillof558cac2014-06-05 09:45:36 +010036#define sec_state_is_valid(s) (((s) == SECURE) || ((s) == NON_SECURE))
Achin Gupta4f6ad662013-10-25 09:08:21 +010037
38#define UP 1
39#define DOWN 0
40
41/*******************************************************************************
Sandrine Bailleux467d0572014-06-24 14:02:34 +010042 * Constants to identify the location of a memory region in a given memory
43 * layout.
44******************************************************************************/
45#define TOP 0x1
46#define BOTTOM !TOP
Achin Gupta4f6ad662013-10-25 09:08:21 +010047
Sandrine Bailleuxba6980a2013-12-02 15:41:25 +000048/******************************************************************************
Sandrine Bailleuxba6980a2013-12-02 15:41:25 +000049 * Corresponds to the function ID of the only SMC that the BL1 exception
50 * handlers service. That's why the chosen value is the first function ID of
51 * the ARM SMC64 range.
52 *****************************************************************************/
53#define RUN_IMAGE 0xC0000000
54
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +010055/*******************************************************************************
56 * Constants that allow assembler code to access members of and the
Vikram Kanigirida567432014-04-15 18:08:08 +010057 * 'entry_point_info' structure at their correct offsets.
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +010058 ******************************************************************************/
Vikram Kanigirida567432014-04-15 18:08:08 +010059#define ENTRY_POINT_INFO_PC_OFFSET 0x08
60#define ENTRY_POINT_INFO_ARGS_OFFSET 0x18
Sandrine Bailleuxba6980a2013-12-02 15:41:25 +000061
Yatharth Kochara65be2f2015-10-09 18:06:13 +010062/* The following are used to set/get image attributes. */
63#define EXECUTABLE (0x1)
64#define NON_EXECUTABLE (0x0)
65#define PARAM_EP_EXECUTE_MASK (0x1)
66#define PARAM_EP_EXECUTE_SHIFT (0x1)
67#define PARAM_EP_SECURITY_MASK (0x1)
68#define PARAM_EP_SECURITY_SHIFT (0x0)
69
Vikram Kanigirida567432014-04-15 18:08:08 +010070#define GET_SECURITY_STATE(x) (x & PARAM_EP_SECURITY_MASK)
71#define SET_SECURITY_STATE(x, security) \
72 ((x) = ((x) & ~PARAM_EP_SECURITY_MASK) | (security))
73
Yatharth Kochara65be2f2015-10-09 18:06:13 +010074#define GET_EXEC_STATE(x) \
75 (((x) >> PARAM_EP_EXECUTE_SHIFT) & PARAM_EP_EXECUTE_MASK)
76
77#define SET_EXEC_STATE(x) \
78 (((x) & PARAM_EP_EXECUTE_MASK) << PARAM_EP_EXECUTE_SHIFT)
79
80#define GET_SEC_STATE(x) \
81 (((x) >> PARAM_EP_SECURITY_SHIFT) & PARAM_EP_SECURITY_MASK)
82
83#define SET_SEC_STATE(x) \
84 (((x) & PARAM_EP_SECURITY_MASK) << PARAM_EP_SECURITY_SHIFT)
85
86/*
87 * The following are used for image state attributes.
88 * Image can only be in one of the following state.
89 */
90#define IMAGE_STATE_RESET 0
91#define IMAGE_STATE_COPIED 1
92#define IMAGE_STATE_COPYING 2
93#define IMAGE_STATE_AUTHENTICATED 3
94#define IMAGE_STATE_EXECUTED 4
95#define IMAGE_STATE_INTERRUPTED 5
96
Andrew Thoelke4e126072014-06-04 21:10:52 +010097#define EP_EE_MASK 0x2
98#define EP_EE_LITTLE 0x0
99#define EP_EE_BIG 0x2
100#define EP_GET_EE(x) (x & EP_EE_MASK)
101#define EP_SET_EE(x, ee) ((x) = ((x) & ~EP_EE_MASK) | (ee))
102
103#define EP_ST_MASK 0x4
104#define EP_ST_DISABLE 0x0
105#define EP_ST_ENABLE 0x4
106#define EP_GET_ST(x) (x & EP_ST_MASK)
107#define EP_SET_ST(x, ee) ((x) = ((x) & ~EP_ST_MASK) | (ee))
108
Vikram Kanigirida567432014-04-15 18:08:08 +0100109#define PARAM_EP 0x01
110#define PARAM_IMAGE_BINARY 0x02
111#define PARAM_BL31 0x03
Dan Handley2bd4ef22014-04-09 13:14:54 +0100112
Vikram Kanigirida567432014-04-15 18:08:08 +0100113#define VERSION_1 0x01
114
Yatharth Kochara65be2f2015-10-09 18:06:13 +0100115#define INVALID_IMAGE_ID (0xFFFFFFFF)
116
Vikram Kanigirida567432014-04-15 18:08:08 +0100117#define SET_PARAM_HEAD(_p, _type, _ver, _attr) do { \
118 (_p)->h.type = (uint8_t)(_type); \
119 (_p)->h.version = (uint8_t)(_ver); \
120 (_p)->h.size = (uint16_t)sizeof(*_p); \
121 (_p)->h.attr = (uint32_t)(_attr) ; \
122 } while (0)
123
Yatharth Kochar6c0566c2015-10-02 17:56:48 +0100124/*******************************************************************************
125 * Constants to indicate type of exception to the common exception handler.
126 ******************************************************************************/
127#define SYNC_EXCEPTION_SP_EL0 0x0
128#define IRQ_SP_EL0 0x1
129#define FIQ_SP_EL0 0x2
130#define SERROR_SP_EL0 0x3
131#define SYNC_EXCEPTION_SP_ELX 0x4
132#define IRQ_SP_ELX 0x5
133#define FIQ_SP_ELX 0x6
134#define SERROR_SP_ELX 0x7
135#define SYNC_EXCEPTION_AARCH64 0x8
136#define IRQ_AARCH64 0x9
137#define FIQ_AARCH64 0xa
138#define SERROR_AARCH64 0xb
139#define SYNC_EXCEPTION_AARCH32 0xc
140#define IRQ_AARCH32 0xd
141#define FIQ_AARCH32 0xe
142#define SERROR_AARCH32 0xf
143
Vikram Kanigirida567432014-04-15 18:08:08 +0100144#ifndef __ASSEMBLY__
Dan Handley2bd4ef22014-04-09 13:14:54 +0100145#include <cdefs.h> /* For __dead2 */
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +0100146#include <cassert.h>
Vikram Kanigirida567432014-04-15 18:08:08 +0100147#include <stdint.h>
Sandrine Bailleux467d0572014-06-24 14:02:34 +0100148#include <stddef.h>
Achin Guptae4d084e2014-02-19 17:18:23 +0000149
Vikram Kanigiri725b1332015-03-04 10:34:27 +0000150#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
151
Dan Handleyf05c1b52015-04-27 11:49:22 +0100152/*
153 * Declarations of linker defined symbols to help determine memory layout of
154 * BL images
155 */
156extern unsigned long __RO_START__;
157extern unsigned long __RO_END__;
158#if IMAGE_BL2
159extern unsigned long __BL2_END__;
160#elif IMAGE_BL31
161extern unsigned long __BL31_END__;
162#elif IMAGE_BL32
163extern unsigned long __BL32_END__;
164#endif /* IMAGE_BLX */
165
166#if USE_COHERENT_MEM
167extern unsigned long __COHERENT_RAM_START__;
168extern unsigned long __COHERENT_RAM_END__;
169#endif
170
171
Achin Gupta4f6ad662013-10-25 09:08:21 +0100172/*******************************************************************************
173 * Structure used for telling the next BL how much of a particular type of
174 * memory is available for its use and how much is already used.
175 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100176typedef struct meminfo {
Sandrine Bailleux467d0572014-06-24 14:02:34 +0100177 uint64_t total_base;
178 size_t total_size;
179 uint64_t free_base;
180 size_t free_size;
Dan Handleye2712bc2014-04-10 15:37:22 +0100181} meminfo_t;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100182
Dan Handleye2712bc2014-04-10 15:37:22 +0100183typedef struct aapcs64_params {
Achin Gupta4f6ad662013-10-25 09:08:21 +0100184 unsigned long arg0;
185 unsigned long arg1;
186 unsigned long arg2;
187 unsigned long arg3;
188 unsigned long arg4;
189 unsigned long arg5;
190 unsigned long arg6;
191 unsigned long arg7;
Dan Handleye2712bc2014-04-10 15:37:22 +0100192} aapcs64_params_t;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100193
Vikram Kanigirida567432014-04-15 18:08:08 +0100194/***************************************************************************
195 * This structure provides version information and the size of the
196 * structure, attributes for the structure it represents
197 ***************************************************************************/
198typedef struct param_header {
199 uint8_t type; /* type of the structure */
200 uint8_t version; /* version of this structure */
201 uint16_t size; /* size of this structure in bytes */
202 uint32_t attr; /* attributes: unused bits SBZ */
203} param_header_t;
204
205/*****************************************************************************
206 * This structure represents the superset of information needed while
207 * switching exception levels. The only two mechanisms to do so are
208 * ERET & SMC. Security state is indicated using bit zero of header
209 * attribute
210 * NOTE: BL1 expects entrypoint followed by spsr while processing
211 * SMC to jump to BL31 from the start of entry_point_info
212 *****************************************************************************/
213typedef struct entry_point_info {
214 param_header_t h;
215 uintptr_t pc;
216 uint32_t spsr;
Dan Handleye2712bc2014-04-10 15:37:22 +0100217 aapcs64_params_t args;
Vikram Kanigirida567432014-04-15 18:08:08 +0100218} entry_point_info_t;
219
220/*****************************************************************************
221 * Image info binary provides information from the image loader that
222 * can be used by the firmware to manage available trusted RAM.
223 * More advanced firmware image formats can provide additional
224 * information that enables optimization or greater flexibility in the
225 * common firmware code
226 *****************************************************************************/
227typedef struct image_info {
228 param_header_t h;
229 uintptr_t image_base; /* physical address of base of image */
230 uint32_t image_size; /* bytes read from image file */
Yatharth Kochara65be2f2015-10-09 18:06:13 +0100231 uint32_t copied_size; /* image size copied in blocks */
Vikram Kanigirida567432014-04-15 18:08:08 +0100232} image_info_t;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100233
Yatharth Kochara65be2f2015-10-09 18:06:13 +0100234/*****************************************************************************
235 * The image descriptor struct definition.
236 *****************************************************************************/
237typedef struct image_desc {
238 /* Contains unique image id for the image. */
239 unsigned int image_id;
240 image_info_t image_info;
241 entry_point_info_t ep_info;
242 /*
243 * This member contains Image state information.
244 * Refer IMAGE_STATE_XXX defined above.
245 */
246 unsigned int state;
247} image_desc_t;
248
Achin Gupta4f6ad662013-10-25 09:08:21 +0100249/*******************************************************************************
Achin Guptae4d084e2014-02-19 17:18:23 +0000250 * This structure represents the superset of information that can be passed to
251 * BL31 e.g. while passing control to it from BL2. The BL32 parameters will be
Vikram Kanigirida567432014-04-15 18:08:08 +0100252 * populated only if BL2 detects its presence. A pointer to a structure of this
Sandrine Bailleuxacde8b02015-05-19 11:54:45 +0100253 * type should be passed in X0 to BL3-1's cold boot entrypoint.
Vikram Kanigirida567432014-04-15 18:08:08 +0100254 *
Sandrine Bailleuxacde8b02015-05-19 11:54:45 +0100255 * Use of this structure and the X0 parameter is not mandatory: the BL3-1
Vikram Kanigirida567432014-04-15 18:08:08 +0100256 * platform code can use other mechanisms to provide the necessary information
257 * about BL3-2 and BL3-3 to the common and SPD code.
258 *
259 * BL3-1 image information is mandatory if this structure is used. If either of
260 * the optional BL3-2 and BL3-3 image information is not provided, this is
261 * indicated by the respective image_info pointers being zero.
Achin Guptae4d084e2014-02-19 17:18:23 +0000262 ******************************************************************************/
Vikram Kanigirida567432014-04-15 18:08:08 +0100263typedef struct bl31_params {
264 param_header_t h;
265 image_info_t *bl31_image_info;
266 entry_point_info_t *bl32_ep_info;
267 image_info_t *bl32_image_info;
268 entry_point_info_t *bl33_ep_info;
269 image_info_t *bl33_image_info;
270} bl31_params_t;
271
272
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +0100273/*
Vikram Kanigirida567432014-04-15 18:08:08 +0100274 * Compile time assertions related to the 'entry_point_info' structure to
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +0100275 * ensure that the assembler and the compiler view of the offsets of
276 * the structure members is the same.
277 */
Vikram Kanigirida567432014-04-15 18:08:08 +0100278CASSERT(ENTRY_POINT_INFO_PC_OFFSET ==
279 __builtin_offsetof(entry_point_info_t, pc), \
280 assert_BL31_pc_offset_mismatch);
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +0100281
Vikram Kanigirida567432014-04-15 18:08:08 +0100282CASSERT(ENTRY_POINT_INFO_ARGS_OFFSET == \
283 __builtin_offsetof(entry_point_info_t, args), \
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +0100284 assert_BL31_args_offset_mismatch);
285
Vikram Kanigirida567432014-04-15 18:08:08 +0100286CASSERT(sizeof(unsigned long) ==
287 __builtin_offsetof(entry_point_info_t, spsr) - \
288 __builtin_offsetof(entry_point_info_t, pc), \
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +0100289 assert_entrypoint_and_spsr_should_be_adjacent);
290
Achin Guptae4d084e2014-02-19 17:18:23 +0000291/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +0100292 * Function & variable prototypes
293 ******************************************************************************/
Dan Handleya17fefa2014-05-14 12:38:32 +0100294unsigned long page_align(unsigned long, unsigned);
Juan Castillo3a66aca2015-04-13 17:36:19 +0100295unsigned long image_size(unsigned int image_id);
Sandrine Bailleux467d0572014-06-24 14:02:34 +0100296int load_image(meminfo_t *mem_layout,
Juan Castillo3a66aca2015-04-13 17:36:19 +0100297 unsigned int image_id,
Juan Castilloa08a5e72015-05-19 11:54:12 +0100298 uintptr_t image_base,
Sandrine Bailleux467d0572014-06-24 14:02:34 +0100299 image_info_t *image_data,
300 entry_point_info_t *entry_point_info);
Juan Castilloa08a5e72015-05-19 11:54:12 +0100301int load_auth_image(meminfo_t *mem_layout,
302 unsigned int image_name,
303 uintptr_t image_base,
304 image_info_t *image_data,
305 entry_point_info_t *entry_point_info);
Jon Medhurstecf0a712014-02-17 12:18:24 +0000306extern const char build_message[];
Juan Castillo04be3a52014-06-30 11:41:46 +0100307extern const char version_string[];
Achin Gupta4f6ad662013-10-25 09:08:21 +0100308
Sandrine Bailleux467d0572014-06-24 14:02:34 +0100309void reserve_mem(uint64_t *free_base, size_t *free_size,
310 uint64_t addr, size_t size);
311
Sandrine Bailleuxb2e224c2015-09-28 17:03:06 +0100312void print_entry_point_info(const entry_point_info_t *ep_info);
313
Achin Gupta4f6ad662013-10-25 09:08:21 +0100314#endif /*__ASSEMBLY__*/
315
316#endif /* __BL_COMMON_H__ */