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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#ifndef __BL_COMMON_H__
32#define __BL_COMMON_H__
33
Vikram Kanigirida567432014-04-15 18:08:08 +010034#define SECURE 0x0
35#define NON_SECURE 0x1
Juan Castillof558cac2014-06-05 09:45:36 +010036#define sec_state_is_valid(s) (((s) == SECURE) || ((s) == NON_SECURE))
Achin Gupta4f6ad662013-10-25 09:08:21 +010037
38#define UP 1
39#define DOWN 0
40
41/*******************************************************************************
Sandrine Bailleux467d0572014-06-24 14:02:34 +010042 * Constants to identify the location of a memory region in a given memory
43 * layout.
44******************************************************************************/
45#define TOP 0x1
46#define BOTTOM !TOP
Achin Gupta4f6ad662013-10-25 09:08:21 +010047
Sandrine Bailleuxba6980a2013-12-02 15:41:25 +000048/******************************************************************************
Sandrine Bailleuxba6980a2013-12-02 15:41:25 +000049 * Corresponds to the function ID of the only SMC that the BL1 exception
50 * handlers service. That's why the chosen value is the first function ID of
51 * the ARM SMC64 range.
52 *****************************************************************************/
53#define RUN_IMAGE 0xC0000000
54
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +010055/*******************************************************************************
56 * Constants that allow assembler code to access members of and the
Vikram Kanigirida567432014-04-15 18:08:08 +010057 * 'entry_point_info' structure at their correct offsets.
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +010058 ******************************************************************************/
Vikram Kanigirida567432014-04-15 18:08:08 +010059#define ENTRY_POINT_INFO_PC_OFFSET 0x08
60#define ENTRY_POINT_INFO_ARGS_OFFSET 0x18
Sandrine Bailleuxba6980a2013-12-02 15:41:25 +000061
Andrew Thoelke4e126072014-06-04 21:10:52 +010062#define PARAM_EP_SECURITY_MASK 0x1
Vikram Kanigirida567432014-04-15 18:08:08 +010063#define GET_SECURITY_STATE(x) (x & PARAM_EP_SECURITY_MASK)
64#define SET_SECURITY_STATE(x, security) \
65 ((x) = ((x) & ~PARAM_EP_SECURITY_MASK) | (security))
66
Andrew Thoelke4e126072014-06-04 21:10:52 +010067#define EP_EE_MASK 0x2
68#define EP_EE_LITTLE 0x0
69#define EP_EE_BIG 0x2
70#define EP_GET_EE(x) (x & EP_EE_MASK)
71#define EP_SET_EE(x, ee) ((x) = ((x) & ~EP_EE_MASK) | (ee))
72
73#define EP_ST_MASK 0x4
74#define EP_ST_DISABLE 0x0
75#define EP_ST_ENABLE 0x4
76#define EP_GET_ST(x) (x & EP_ST_MASK)
77#define EP_SET_ST(x, ee) ((x) = ((x) & ~EP_ST_MASK) | (ee))
78
Vikram Kanigirida567432014-04-15 18:08:08 +010079#define PARAM_EP 0x01
80#define PARAM_IMAGE_BINARY 0x02
81#define PARAM_BL31 0x03
Dan Handley2bd4ef22014-04-09 13:14:54 +010082
Vikram Kanigirida567432014-04-15 18:08:08 +010083#define VERSION_1 0x01
84
85#define SET_PARAM_HEAD(_p, _type, _ver, _attr) do { \
86 (_p)->h.type = (uint8_t)(_type); \
87 (_p)->h.version = (uint8_t)(_ver); \
88 (_p)->h.size = (uint16_t)sizeof(*_p); \
89 (_p)->h.attr = (uint32_t)(_attr) ; \
90 } while (0)
91
Yatharth Kochar6c0566c2015-10-02 17:56:48 +010092/*******************************************************************************
93 * Constants to indicate type of exception to the common exception handler.
94 ******************************************************************************/
95#define SYNC_EXCEPTION_SP_EL0 0x0
96#define IRQ_SP_EL0 0x1
97#define FIQ_SP_EL0 0x2
98#define SERROR_SP_EL0 0x3
99#define SYNC_EXCEPTION_SP_ELX 0x4
100#define IRQ_SP_ELX 0x5
101#define FIQ_SP_ELX 0x6
102#define SERROR_SP_ELX 0x7
103#define SYNC_EXCEPTION_AARCH64 0x8
104#define IRQ_AARCH64 0x9
105#define FIQ_AARCH64 0xa
106#define SERROR_AARCH64 0xb
107#define SYNC_EXCEPTION_AARCH32 0xc
108#define IRQ_AARCH32 0xd
109#define FIQ_AARCH32 0xe
110#define SERROR_AARCH32 0xf
111
Vikram Kanigirida567432014-04-15 18:08:08 +0100112#ifndef __ASSEMBLY__
Dan Handley2bd4ef22014-04-09 13:14:54 +0100113#include <cdefs.h> /* For __dead2 */
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +0100114#include <cassert.h>
Vikram Kanigirida567432014-04-15 18:08:08 +0100115#include <stdint.h>
Sandrine Bailleux467d0572014-06-24 14:02:34 +0100116#include <stddef.h>
Achin Guptae4d084e2014-02-19 17:18:23 +0000117
Vikram Kanigiri725b1332015-03-04 10:34:27 +0000118#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
119
Dan Handleyf05c1b52015-04-27 11:49:22 +0100120/*
121 * Declarations of linker defined symbols to help determine memory layout of
122 * BL images
123 */
124extern unsigned long __RO_START__;
125extern unsigned long __RO_END__;
126#if IMAGE_BL2
127extern unsigned long __BL2_END__;
128#elif IMAGE_BL31
129extern unsigned long __BL31_END__;
130#elif IMAGE_BL32
131extern unsigned long __BL32_END__;
132#endif /* IMAGE_BLX */
133
134#if USE_COHERENT_MEM
135extern unsigned long __COHERENT_RAM_START__;
136extern unsigned long __COHERENT_RAM_END__;
137#endif
138
139
Achin Gupta4f6ad662013-10-25 09:08:21 +0100140/*******************************************************************************
141 * Structure used for telling the next BL how much of a particular type of
142 * memory is available for its use and how much is already used.
143 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100144typedef struct meminfo {
Sandrine Bailleux467d0572014-06-24 14:02:34 +0100145 uint64_t total_base;
146 size_t total_size;
147 uint64_t free_base;
148 size_t free_size;
Dan Handleye2712bc2014-04-10 15:37:22 +0100149} meminfo_t;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100150
Dan Handleye2712bc2014-04-10 15:37:22 +0100151typedef struct aapcs64_params {
Achin Gupta4f6ad662013-10-25 09:08:21 +0100152 unsigned long arg0;
153 unsigned long arg1;
154 unsigned long arg2;
155 unsigned long arg3;
156 unsigned long arg4;
157 unsigned long arg5;
158 unsigned long arg6;
159 unsigned long arg7;
Dan Handleye2712bc2014-04-10 15:37:22 +0100160} aapcs64_params_t;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100161
Vikram Kanigirida567432014-04-15 18:08:08 +0100162/***************************************************************************
163 * This structure provides version information and the size of the
164 * structure, attributes for the structure it represents
165 ***************************************************************************/
166typedef struct param_header {
167 uint8_t type; /* type of the structure */
168 uint8_t version; /* version of this structure */
169 uint16_t size; /* size of this structure in bytes */
170 uint32_t attr; /* attributes: unused bits SBZ */
171} param_header_t;
172
173/*****************************************************************************
174 * This structure represents the superset of information needed while
175 * switching exception levels. The only two mechanisms to do so are
176 * ERET & SMC. Security state is indicated using bit zero of header
177 * attribute
178 * NOTE: BL1 expects entrypoint followed by spsr while processing
179 * SMC to jump to BL31 from the start of entry_point_info
180 *****************************************************************************/
181typedef struct entry_point_info {
182 param_header_t h;
183 uintptr_t pc;
184 uint32_t spsr;
Dan Handleye2712bc2014-04-10 15:37:22 +0100185 aapcs64_params_t args;
Vikram Kanigirida567432014-04-15 18:08:08 +0100186} entry_point_info_t;
187
188/*****************************************************************************
189 * Image info binary provides information from the image loader that
190 * can be used by the firmware to manage available trusted RAM.
191 * More advanced firmware image formats can provide additional
192 * information that enables optimization or greater flexibility in the
193 * common firmware code
194 *****************************************************************************/
195typedef struct image_info {
196 param_header_t h;
197 uintptr_t image_base; /* physical address of base of image */
198 uint32_t image_size; /* bytes read from image file */
199} image_info_t;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100200
201/*******************************************************************************
Achin Guptae4d084e2014-02-19 17:18:23 +0000202 * This structure represents the superset of information that can be passed to
203 * BL31 e.g. while passing control to it from BL2. The BL32 parameters will be
Vikram Kanigirida567432014-04-15 18:08:08 +0100204 * populated only if BL2 detects its presence. A pointer to a structure of this
Sandrine Bailleuxacde8b02015-05-19 11:54:45 +0100205 * type should be passed in X0 to BL3-1's cold boot entrypoint.
Vikram Kanigirida567432014-04-15 18:08:08 +0100206 *
Sandrine Bailleuxacde8b02015-05-19 11:54:45 +0100207 * Use of this structure and the X0 parameter is not mandatory: the BL3-1
Vikram Kanigirida567432014-04-15 18:08:08 +0100208 * platform code can use other mechanisms to provide the necessary information
209 * about BL3-2 and BL3-3 to the common and SPD code.
210 *
211 * BL3-1 image information is mandatory if this structure is used. If either of
212 * the optional BL3-2 and BL3-3 image information is not provided, this is
213 * indicated by the respective image_info pointers being zero.
Achin Guptae4d084e2014-02-19 17:18:23 +0000214 ******************************************************************************/
Vikram Kanigirida567432014-04-15 18:08:08 +0100215typedef struct bl31_params {
216 param_header_t h;
217 image_info_t *bl31_image_info;
218 entry_point_info_t *bl32_ep_info;
219 image_info_t *bl32_image_info;
220 entry_point_info_t *bl33_ep_info;
221 image_info_t *bl33_image_info;
222} bl31_params_t;
223
224
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +0100225/*
Vikram Kanigirida567432014-04-15 18:08:08 +0100226 * Compile time assertions related to the 'entry_point_info' structure to
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +0100227 * ensure that the assembler and the compiler view of the offsets of
228 * the structure members is the same.
229 */
Vikram Kanigirida567432014-04-15 18:08:08 +0100230CASSERT(ENTRY_POINT_INFO_PC_OFFSET ==
231 __builtin_offsetof(entry_point_info_t, pc), \
232 assert_BL31_pc_offset_mismatch);
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +0100233
Vikram Kanigirida567432014-04-15 18:08:08 +0100234CASSERT(ENTRY_POINT_INFO_ARGS_OFFSET == \
235 __builtin_offsetof(entry_point_info_t, args), \
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +0100236 assert_BL31_args_offset_mismatch);
237
Vikram Kanigirida567432014-04-15 18:08:08 +0100238CASSERT(sizeof(unsigned long) ==
239 __builtin_offsetof(entry_point_info_t, spsr) - \
240 __builtin_offsetof(entry_point_info_t, pc), \
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +0100241 assert_entrypoint_and_spsr_should_be_adjacent);
242
Achin Guptae4d084e2014-02-19 17:18:23 +0000243/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +0100244 * Function & variable prototypes
245 ******************************************************************************/
Dan Handleya17fefa2014-05-14 12:38:32 +0100246unsigned long page_align(unsigned long, unsigned);
Juan Castillo3a66aca2015-04-13 17:36:19 +0100247unsigned long image_size(unsigned int image_id);
Sandrine Bailleux467d0572014-06-24 14:02:34 +0100248int load_image(meminfo_t *mem_layout,
Juan Castillo3a66aca2015-04-13 17:36:19 +0100249 unsigned int image_id,
Juan Castilloa08a5e72015-05-19 11:54:12 +0100250 uintptr_t image_base,
Sandrine Bailleux467d0572014-06-24 14:02:34 +0100251 image_info_t *image_data,
252 entry_point_info_t *entry_point_info);
Juan Castilloa08a5e72015-05-19 11:54:12 +0100253int load_auth_image(meminfo_t *mem_layout,
254 unsigned int image_name,
255 uintptr_t image_base,
256 image_info_t *image_data,
257 entry_point_info_t *entry_point_info);
Jon Medhurstecf0a712014-02-17 12:18:24 +0000258extern const char build_message[];
Juan Castillo04be3a52014-06-30 11:41:46 +0100259extern const char version_string[];
Achin Gupta4f6ad662013-10-25 09:08:21 +0100260
Sandrine Bailleux467d0572014-06-24 14:02:34 +0100261void reserve_mem(uint64_t *free_base, size_t *free_size,
262 uint64_t addr, size_t size);
263
Sandrine Bailleuxb2e224c2015-09-28 17:03:06 +0100264void print_entry_point_info(const entry_point_info_t *ep_info);
265
Achin Gupta4f6ad662013-10-25 09:08:21 +0100266#endif /*__ASSEMBLY__*/
267
268#endif /* __BL_COMMON_H__ */