Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 1 | /* |
Arvind Ram Prakash | faa857d | 2025-01-28 17:21:17 -0600 | [diff] [blame] | 2 | * Copyright (c) 2017-2025, Arm Limited and Contributors. All rights reserved. |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
Govindraj Raja | 988a7c7 | 2025-01-21 12:13:20 -0600 | [diff] [blame] | 7 | #ifndef ERRATA_H |
| 8 | #define ERRATA_H |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 9 | |
Boyan Karatotev | 821364e | 2023-01-27 09:35:10 +0000 | [diff] [blame] | 10 | #include <lib/cpus/cpu_ops.h> |
| 11 | |
Boyan Karatotev | 821364e | 2023-01-27 09:35:10 +0000 | [diff] [blame] | 12 | #define ERRATUM_WA_FUNC_SIZE CPU_WORD_SIZE |
| 13 | #define ERRATUM_CHECK_FUNC_SIZE CPU_WORD_SIZE |
| 14 | #define ERRATUM_ID_SIZE 4 |
| 15 | #define ERRATUM_CVE_SIZE 2 |
| 16 | #define ERRATUM_CHOSEN_SIZE 1 |
| 17 | #define ERRATUM_MITIGATED_SIZE 1 |
| 18 | |
| 19 | #define ERRATUM_WA_FUNC 0 |
| 20 | #define ERRATUM_CHECK_FUNC ERRATUM_WA_FUNC + ERRATUM_WA_FUNC_SIZE |
| 21 | #define ERRATUM_ID ERRATUM_CHECK_FUNC + ERRATUM_CHECK_FUNC_SIZE |
| 22 | #define ERRATUM_CVE ERRATUM_ID + ERRATUM_ID_SIZE |
| 23 | #define ERRATUM_CHOSEN ERRATUM_CVE + ERRATUM_CVE_SIZE |
| 24 | #define ERRATUM_MITIGATED ERRATUM_CHOSEN + ERRATUM_CHOSEN_SIZE |
| 25 | #define ERRATUM_ENTRY_SIZE ERRATUM_MITIGATED + ERRATUM_MITIGATED_SIZE |
| 26 | |
Arvind Ram Prakash | 2b43393 | 2024-08-05 16:04:37 -0500 | [diff] [blame] | 27 | /* Errata status */ |
| 28 | #define ERRATA_NOT_APPLIES 0 |
| 29 | #define ERRATA_APPLIES 1 |
| 30 | #define ERRATA_MISSING 2 |
| 31 | |
Julius Werner | 53456fc | 2019-07-09 13:49:11 -0700 | [diff] [blame] | 32 | #ifndef __ASSEMBLER__ |
Boyan Karatotev | 29fa56d | 2023-01-27 09:38:15 +0000 | [diff] [blame] | 33 | #include <lib/cassert.h> |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 34 | |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 35 | void print_errata_status(void); |
Roberto Vargas | 0571270 | 2018-02-12 12:36:17 +0000 | [diff] [blame] | 36 | |
Boyan Karatotev | 29fa56d | 2023-01-27 09:38:15 +0000 | [diff] [blame] | 37 | /* |
| 38 | * NOTE that this structure will be different on AArch32 and AArch64. The |
| 39 | * uintptr_t will reflect the change and the alignment will be correct in both. |
| 40 | */ |
| 41 | struct erratum_entry { |
| 42 | uintptr_t (*wa_func)(uint64_t cpu_rev); |
| 43 | uintptr_t (*check_func)(uint64_t cpu_rev); |
| 44 | /* Will fit CVEs with up to 10 character in the ID field */ |
| 45 | uint32_t id; |
| 46 | /* Denote CVEs with their year or errata with 0 */ |
| 47 | uint16_t cve; |
| 48 | uint8_t chosen; |
| 49 | /* TODO(errata ABI): placeholder for the mitigated field */ |
| 50 | uint8_t _mitigated; |
| 51 | } __packed; |
| 52 | |
| 53 | CASSERT(sizeof(struct erratum_entry) == ERRATUM_ENTRY_SIZE, |
| 54 | assert_erratum_entry_asm_c_different_sizes); |
Govindraj Raja | 988a7c7 | 2025-01-21 12:13:20 -0600 | [diff] [blame] | 55 | |
| 56 | /* |
| 57 | * Runtime errata helpers. |
| 58 | */ |
| 59 | #if ERRATA_A75_764081 |
| 60 | bool errata_a75_764081_applies(void); |
| 61 | #else |
| 62 | static inline bool errata_a75_764081_applies(void) |
| 63 | { |
| 64 | return false; |
| 65 | } |
| 66 | #endif |
| 67 | |
| 68 | #if ERRATA_A520_2938996 || ERRATA_X4_2726228 |
| 69 | unsigned int check_if_affected_core(void); |
| 70 | #endif |
| 71 | |
| 72 | int check_wa_cve_2024_7881(void); |
Govindraj Raja | 4c3a461 | 2025-01-29 15:01:10 -0600 | [diff] [blame] | 73 | bool errata_ich_vmcr_el2_applies(void); |
Govindraj Raja | 988a7c7 | 2025-01-21 12:13:20 -0600 | [diff] [blame] | 74 | |
Boyan Karatotev | 821364e | 2023-01-27 09:35:10 +0000 | [diff] [blame] | 75 | #else |
| 76 | |
| 77 | /* |
| 78 | * errata framework macro helpers |
| 79 | * |
| 80 | * NOTE an erratum and CVE id could clash. However, both numbers are very large |
| 81 | * and the probablity is minuscule. Working around this makes code very |
| 82 | * complicated and extremely difficult to read so it is not considered. In the |
| 83 | * unlikely event that this does happen, prepending the CVE id with a 0 should |
| 84 | * resolve the conflict |
| 85 | */ |
| 86 | #define ERRATUM(id) 0, id |
| 87 | #define CVE(year, id) year, id |
| 88 | #define NO_ISB 1 |
| 89 | #define NO_ASSERT 0 |
Boyan Karatotev | cea0c26 | 2023-04-04 11:29:00 +0100 | [diff] [blame] | 90 | #define NO_APPLY_AT_RESET 0 |
| 91 | #define APPLY_AT_RESET 1 |
Harrison Mutai | de3fa1e | 2023-06-26 16:25:21 +0100 | [diff] [blame] | 92 | #define GET_CPU_REV 1 |
| 93 | #define NO_GET_CPU_REV 0 |
| 94 | |
Boyan Karatotev | cea0c26 | 2023-04-04 11:29:00 +0100 | [diff] [blame] | 95 | /* useful for errata that end up always being worked around */ |
| 96 | #define ERRATUM_ALWAYS_CHOSEN 1 |
Boyan Karatotev | 821364e | 2023-01-27 09:35:10 +0000 | [diff] [blame] | 97 | |
Julius Werner | 53456fc | 2019-07-09 13:49:11 -0700 | [diff] [blame] | 98 | #endif /* __ASSEMBLER__ */ |
Jeenu Viswambharan | d5ec367 | 2017-01-03 11:01:51 +0000 | [diff] [blame] | 99 | |
johpow01 | 85ea43d | 2020-10-07 15:08:01 -0500 | [diff] [blame] | 100 | /* Macro to get CPU revision code for checking errata version compatibility. */ |
| 101 | #define CPU_REV(r, p) ((r << 4) | p) |
| 102 | |
Govindraj Raja | 988a7c7 | 2025-01-21 12:13:20 -0600 | [diff] [blame] | 103 | #endif /* ERRATA_H */ |